diff options
author | Andrew Lunn <andrew@lunn.ch> | 2011-12-07 15:48:06 -0500 |
---|---|---|
committer | Nicolas Pitre <nico@fluxnic.net> | 2011-12-13 18:46:55 -0500 |
commit | 45173d5ed4c9a397db31623bf6469efbd3a239cd (patch) | |
tree | d4efe8af8c7b23ed2a97d2686a88037ea6bc7758 | |
parent | b6d1c33a31deb1784c1d34070db6e84fd6f9d870 (diff) |
ARM: Orion: mbus_dram_info consolidation
Move the *_mbus_dram_info structure into the orion platform and call it
orion_mbus_dram_info everywhere.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Michael Walle <michael@walle.cc>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
-rw-r--r-- | arch/arm/mach-dove/addr-map.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-dove/common.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-dove/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-dove/pcie.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/addr-map.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/common.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/pcie.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-mv78xx0/addr-map.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-mv78xx0/common.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-mv78xx0/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-mv78xx0/pcie.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/addr-map.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/common.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/pci.c | 5 | ||||
-rw-r--r-- | arch/arm/plat-orion/addr-map.c | 9 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/addr-map.h | 3 |
18 files changed, 50 insertions, 55 deletions
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c index 1584726088e4..98b8c83b09ab 100644 --- a/arch/arm/mach-dove/addr-map.c +++ b/arch/arm/mach-dove/addr-map.c | |||
@@ -35,8 +35,6 @@ | |||
35 | #define ATTR_PCIE_MEM 0xe8 | 35 | #define ATTR_PCIE_MEM 0xe8 |
36 | #define ATTR_SCRATCHPAD 0x0 | 36 | #define ATTR_SCRATCHPAD 0x0 |
37 | 37 | ||
38 | struct mbus_dram_target_info dove_mbus_dram_info; | ||
39 | |||
40 | static inline void __iomem *ddr_map_sc(int i) | 38 | static inline void __iomem *ddr_map_sc(int i) |
41 | { | 39 | { |
42 | return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4)); | 40 | return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4)); |
@@ -102,7 +100,7 @@ void __init dove_setup_cpu_mbus(void) | |||
102 | /* | 100 | /* |
103 | * Setup MBUS dram target info. | 101 | * Setup MBUS dram target info. |
104 | */ | 102 | */ |
105 | dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; | 103 | orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; |
106 | 104 | ||
107 | for (i = 0, cs = 0; i < 2; i++) { | 105 | for (i = 0, cs = 0; i < 2; i++) { |
108 | u32 map = readl(ddr_map_sc(i)); | 106 | u32 map = readl(ddr_map_sc(i)); |
@@ -113,7 +111,7 @@ void __init dove_setup_cpu_mbus(void) | |||
113 | if (map & 1) { | 111 | if (map & 1) { |
114 | struct mbus_dram_window *w; | 112 | struct mbus_dram_window *w; |
115 | 113 | ||
116 | w = &dove_mbus_dram_info.cs[cs++]; | 114 | w = &orion_mbus_dram_info.cs[cs++]; |
117 | w->cs_index = i; | 115 | w->cs_index = i; |
118 | w->mbus_attr = 0; /* CS address decoding done inside */ | 116 | w->mbus_attr = 0; /* CS address decoding done inside */ |
119 | /* the DDR controller, no need to */ | 117 | /* the DDR controller, no need to */ |
@@ -122,5 +120,5 @@ void __init dove_setup_cpu_mbus(void) | |||
122 | w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4); | 120 | w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4); |
123 | } | 121 | } |
124 | } | 122 | } |
125 | dove_mbus_dram_info.num_cs = cs; | 123 | orion_mbus_dram_info.num_cs = cs; |
126 | } | 124 | } |
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index a9e0dae86a26..29c1881c8acb 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/irq.h> | 30 | #include <linux/irq.h> |
31 | #include <plat/time.h> | 31 | #include <plat/time.h> |
32 | #include <plat/common.h> | 32 | #include <plat/common.h> |
33 | #include <plat/addr-map.h> | ||
33 | #include "common.h" | 34 | #include "common.h" |
34 | 35 | ||
35 | static int get_tclk(void); | 36 | static int get_tclk(void); |
@@ -71,7 +72,7 @@ void __init dove_map_io(void) | |||
71 | ****************************************************************************/ | 72 | ****************************************************************************/ |
72 | void __init dove_ehci0_init(void) | 73 | void __init dove_ehci0_init(void) |
73 | { | 74 | { |
74 | orion_ehci_init(&dove_mbus_dram_info, | 75 | orion_ehci_init(&orion_mbus_dram_info, |
75 | DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0); | 76 | DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0); |
76 | } | 77 | } |
77 | 78 | ||
@@ -80,7 +81,7 @@ void __init dove_ehci0_init(void) | |||
80 | ****************************************************************************/ | 81 | ****************************************************************************/ |
81 | void __init dove_ehci1_init(void) | 82 | void __init dove_ehci1_init(void) |
82 | { | 83 | { |
83 | orion_ehci_1_init(&dove_mbus_dram_info, | 84 | orion_ehci_1_init(&orion_mbus_dram_info, |
84 | DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1); | 85 | DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1); |
85 | } | 86 | } |
86 | 87 | ||
@@ -89,7 +90,7 @@ void __init dove_ehci1_init(void) | |||
89 | ****************************************************************************/ | 90 | ****************************************************************************/ |
90 | void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) | 91 | void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) |
91 | { | 92 | { |
92 | orion_ge00_init(eth_data, &dove_mbus_dram_info, | 93 | orion_ge00_init(eth_data, &orion_mbus_dram_info, |
93 | DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, | 94 | DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, |
94 | 0, get_tclk()); | 95 | 0, get_tclk()); |
95 | } | 96 | } |
@@ -107,7 +108,7 @@ void __init dove_rtc_init(void) | |||
107 | ****************************************************************************/ | 108 | ****************************************************************************/ |
108 | void __init dove_sata_init(struct mv_sata_platform_data *sata_data) | 109 | void __init dove_sata_init(struct mv_sata_platform_data *sata_data) |
109 | { | 110 | { |
110 | orion_sata_init(sata_data, &dove_mbus_dram_info, | 111 | orion_sata_init(sata_data, &orion_mbus_dram_info, |
111 | DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA); | 112 | DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA); |
112 | 113 | ||
113 | } | 114 | } |
@@ -198,7 +199,7 @@ struct sys_timer dove_timer = { | |||
198 | ****************************************************************************/ | 199 | ****************************************************************************/ |
199 | void __init dove_xor0_init(void) | 200 | void __init dove_xor0_init(void) |
200 | { | 201 | { |
201 | orion_xor0_init(&dove_mbus_dram_info, | 202 | orion_xor0_init(&orion_mbus_dram_info, |
202 | DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE, | 203 | DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE, |
203 | IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01); | 204 | IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01); |
204 | } | 205 | } |
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h index 6a2046e44706..7322371d3908 100644 --- a/arch/arm/mach-dove/common.h +++ b/arch/arm/mach-dove/common.h | |||
@@ -15,7 +15,6 @@ struct mv643xx_eth_platform_data; | |||
15 | struct mv_sata_platform_data; | 15 | struct mv_sata_platform_data; |
16 | 16 | ||
17 | extern struct sys_timer dove_timer; | 17 | extern struct sys_timer dove_timer; |
18 | extern struct mbus_dram_target_info dove_mbus_dram_info; | ||
19 | 18 | ||
20 | /* | 19 | /* |
21 | * Basic Dove init functions used early by machine-setup. | 20 | * Basic Dove init functions used early by machine-setup. |
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c index aa2b3a09a51d..42e7d22a00f5 100644 --- a/arch/arm/mach-dove/pcie.c +++ b/arch/arm/mach-dove/pcie.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <plat/pcie.h> | 19 | #include <plat/pcie.h> |
20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
21 | #include <mach/bridge-regs.h> | 21 | #include <mach/bridge-regs.h> |
22 | #include <plat/addr-map.h> | ||
22 | #include "common.h" | 23 | #include "common.h" |
23 | 24 | ||
24 | struct pcie_port { | 25 | struct pcie_port { |
@@ -50,7 +51,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) | |||
50 | */ | 51 | */ |
51 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); | 52 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); |
52 | 53 | ||
53 | orion_pcie_setup(pp->base, &dove_mbus_dram_info); | 54 | orion_pcie_setup(pp->base, &orion_mbus_dram_info); |
54 | 55 | ||
55 | /* | 56 | /* |
56 | * IORESOURCE_IO | 57 | * IORESOURCE_IO |
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c index 935392f7e13f..e9a7180863d9 100644 --- a/arch/arm/mach-kirkwood/addr-map.c +++ b/arch/arm/mach-kirkwood/addr-map.c | |||
@@ -35,8 +35,6 @@ | |||
35 | #define ATTR_PCIE1_MEM 0xd8 | 35 | #define ATTR_PCIE1_MEM 0xd8 |
36 | #define ATTR_SRAM 0x01 | 36 | #define ATTR_SRAM 0x01 |
37 | 37 | ||
38 | struct mbus_dram_target_info kirkwood_mbus_dram_info; | ||
39 | |||
40 | /* | 38 | /* |
41 | * Description of the windows needed by the platform code | 39 | * Description of the windows needed by the platform code |
42 | */ | 40 | */ |
@@ -88,6 +86,5 @@ void __init kirkwood_setup_cpu_mbus(void) | |||
88 | /* | 86 | /* |
89 | * Setup MBUS dram target info. | 87 | * Setup MBUS dram target info. |
90 | */ | 88 | */ |
91 | orion_setup_cpu_mbus_target(&addr_map_cfg, &kirkwood_mbus_dram_info, | 89 | orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE); |
92 | DDR_WINDOW_CPU_BASE); | ||
93 | } | 90 | } |
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index b9632ee57b06..dd63fac9ed02 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <plat/orion_nand.h> | 30 | #include <plat/orion_nand.h> |
31 | #include <plat/common.h> | 31 | #include <plat/common.h> |
32 | #include <plat/time.h> | 32 | #include <plat/time.h> |
33 | #include <plat/addr-map.h> | ||
33 | #include "common.h" | 34 | #include "common.h" |
34 | 35 | ||
35 | /***************************************************************************** | 36 | /***************************************************************************** |
@@ -73,7 +74,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED; | |||
73 | void __init kirkwood_ehci_init(void) | 74 | void __init kirkwood_ehci_init(void) |
74 | { | 75 | { |
75 | kirkwood_clk_ctrl |= CGC_USB0; | 76 | kirkwood_clk_ctrl |= CGC_USB0; |
76 | orion_ehci_init(&kirkwood_mbus_dram_info, | 77 | orion_ehci_init(&orion_mbus_dram_info, |
77 | USB_PHYS_BASE, IRQ_KIRKWOOD_USB); | 78 | USB_PHYS_BASE, IRQ_KIRKWOOD_USB); |
78 | } | 79 | } |
79 | 80 | ||
@@ -85,7 +86,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) | |||
85 | { | 86 | { |
86 | kirkwood_clk_ctrl |= CGC_GE0; | 87 | kirkwood_clk_ctrl |= CGC_GE0; |
87 | 88 | ||
88 | orion_ge00_init(eth_data, &kirkwood_mbus_dram_info, | 89 | orion_ge00_init(eth_data, &orion_mbus_dram_info, |
89 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, | 90 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, |
90 | IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk); | 91 | IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk); |
91 | } | 92 | } |
@@ -99,7 +100,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) | |||
99 | 100 | ||
100 | kirkwood_clk_ctrl |= CGC_GE1; | 101 | kirkwood_clk_ctrl |= CGC_GE1; |
101 | 102 | ||
102 | orion_ge01_init(eth_data, &kirkwood_mbus_dram_info, | 103 | orion_ge01_init(eth_data, &orion_mbus_dram_info, |
103 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, | 104 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, |
104 | IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk); | 105 | IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk); |
105 | } | 106 | } |
@@ -178,7 +179,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) | |||
178 | if (sata_data->n_ports > 1) | 179 | if (sata_data->n_ports > 1) |
179 | kirkwood_clk_ctrl |= CGC_SATA1; | 180 | kirkwood_clk_ctrl |= CGC_SATA1; |
180 | 181 | ||
181 | orion_sata_init(sata_data, &kirkwood_mbus_dram_info, | 182 | orion_sata_init(sata_data, &orion_mbus_dram_info, |
182 | SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); | 183 | SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); |
183 | } | 184 | } |
184 | 185 | ||
@@ -221,7 +222,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) | |||
221 | mvsdio_data->clock = 100000000; | 222 | mvsdio_data->clock = 100000000; |
222 | else | 223 | else |
223 | mvsdio_data->clock = 200000000; | 224 | mvsdio_data->clock = 200000000; |
224 | mvsdio_data->dram = &kirkwood_mbus_dram_info; | 225 | mvsdio_data->dram = &orion_mbus_dram_info; |
225 | kirkwood_clk_ctrl |= CGC_SDIO; | 226 | kirkwood_clk_ctrl |= CGC_SDIO; |
226 | kirkwood_sdio.dev.platform_data = mvsdio_data; | 227 | kirkwood_sdio.dev.platform_data = mvsdio_data; |
227 | platform_device_register(&kirkwood_sdio); | 228 | platform_device_register(&kirkwood_sdio); |
@@ -285,7 +286,7 @@ static void __init kirkwood_xor0_init(void) | |||
285 | { | 286 | { |
286 | kirkwood_clk_ctrl |= CGC_XOR0; | 287 | kirkwood_clk_ctrl |= CGC_XOR0; |
287 | 288 | ||
288 | orion_xor0_init(&kirkwood_mbus_dram_info, | 289 | orion_xor0_init(&orion_mbus_dram_info, |
289 | XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, | 290 | XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, |
290 | IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); | 291 | IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); |
291 | } | 292 | } |
@@ -364,7 +365,7 @@ static struct resource kirkwood_i2s_resources[] = { | |||
364 | }; | 365 | }; |
365 | 366 | ||
366 | static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { | 367 | static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { |
367 | .dram = &kirkwood_mbus_dram_info, | 368 | .dram = &orion_mbus_dram_info, |
368 | .burst = 128, | 369 | .burst = 128, |
369 | }; | 370 | }; |
370 | 371 | ||
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index b9b0f0968a36..4756b945106b 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h | |||
@@ -30,7 +30,6 @@ void kirkwood_init(void); | |||
30 | void kirkwood_init_early(void); | 30 | void kirkwood_init_early(void); |
31 | void kirkwood_init_irq(void); | 31 | void kirkwood_init_irq(void); |
32 | 32 | ||
33 | extern struct mbus_dram_target_info kirkwood_mbus_dram_info; | ||
34 | void kirkwood_setup_cpu_mbus(void); | 33 | void kirkwood_setup_cpu_mbus(void); |
35 | 34 | ||
36 | void kirkwood_enable_pcie(void); | 35 | void kirkwood_enable_pcie(void); |
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 74b992d810ea..8def894f3296 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <asm/mach/pci.h> | 17 | #include <asm/mach/pci.h> |
18 | #include <plat/pcie.h> | 18 | #include <plat/pcie.h> |
19 | #include <mach/bridge-regs.h> | 19 | #include <mach/bridge-regs.h> |
20 | #include <plat/addr-map.h> | ||
20 | #include "common.h" | 21 | #include "common.h" |
21 | 22 | ||
22 | void kirkwood_enable_pcie(void) | 23 | void kirkwood_enable_pcie(void) |
@@ -208,7 +209,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | |||
208 | */ | 209 | */ |
209 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); | 210 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); |
210 | 211 | ||
211 | orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info); | 212 | orion_pcie_setup(pp->base, &orion_mbus_dram_info); |
212 | 213 | ||
213 | return 1; | 214 | return 1; |
214 | } | 215 | } |
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c index 6b14555e5766..62b53d710efd 100644 --- a/arch/arm/mach-mv78xx0/addr-map.c +++ b/arch/arm/mach-mv78xx0/addr-map.c | |||
@@ -37,8 +37,6 @@ | |||
37 | #define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4)) | 37 | #define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4)) |
38 | #define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4)) | 38 | #define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4)) |
39 | 39 | ||
40 | struct mbus_dram_target_info mv78xx0_mbus_dram_info; | ||
41 | |||
42 | static void __init __iomem *win_cfg_base(int win) | 40 | static void __init __iomem *win_cfg_base(int win) |
43 | { | 41 | { |
44 | /* | 42 | /* |
@@ -73,11 +71,9 @@ void __init mv78xx0_setup_cpu_mbus(void) | |||
73 | */ | 71 | */ |
74 | if (mv78xx0_core_index() == 0) | 72 | if (mv78xx0_core_index() == 0) |
75 | orion_setup_cpu_mbus_target(&addr_map_cfg, | 73 | orion_setup_cpu_mbus_target(&addr_map_cfg, |
76 | &mv78xx0_mbus_dram_info, | ||
77 | DDR_WINDOW_CPU0_BASE); | 74 | DDR_WINDOW_CPU0_BASE); |
78 | else | 75 | else |
79 | orion_setup_cpu_mbus_target(&addr_map_cfg, | 76 | orion_setup_cpu_mbus_target(&addr_map_cfg, |
80 | &mv78xx0_mbus_dram_info, | ||
81 | DDR_WINDOW_CPU1_BASE); | 77 | DDR_WINDOW_CPU1_BASE); |
82 | } | 78 | } |
83 | 79 | ||
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 23d3980ef59d..be0c232ea0d8 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <plat/orion_nand.h> | 23 | #include <plat/orion_nand.h> |
24 | #include <plat/time.h> | 24 | #include <plat/time.h> |
25 | #include <plat/common.h> | 25 | #include <plat/common.h> |
26 | #include <plat/addr-map.h> | ||
26 | #include "common.h" | 27 | #include "common.h" |
27 | 28 | ||
28 | static int get_tclk(void); | 29 | static int get_tclk(void); |
@@ -169,7 +170,7 @@ void __init mv78xx0_map_io(void) | |||
169 | ****************************************************************************/ | 170 | ****************************************************************************/ |
170 | void __init mv78xx0_ehci0_init(void) | 171 | void __init mv78xx0_ehci0_init(void) |
171 | { | 172 | { |
172 | orion_ehci_init(&mv78xx0_mbus_dram_info, | 173 | orion_ehci_init(&orion_mbus_dram_info, |
173 | USB0_PHYS_BASE, IRQ_MV78XX0_USB_0); | 174 | USB0_PHYS_BASE, IRQ_MV78XX0_USB_0); |
174 | } | 175 | } |
175 | 176 | ||
@@ -179,7 +180,7 @@ void __init mv78xx0_ehci0_init(void) | |||
179 | ****************************************************************************/ | 180 | ****************************************************************************/ |
180 | void __init mv78xx0_ehci1_init(void) | 181 | void __init mv78xx0_ehci1_init(void) |
181 | { | 182 | { |
182 | orion_ehci_1_init(&mv78xx0_mbus_dram_info, | 183 | orion_ehci_1_init(&orion_mbus_dram_info, |
183 | USB1_PHYS_BASE, IRQ_MV78XX0_USB_1); | 184 | USB1_PHYS_BASE, IRQ_MV78XX0_USB_1); |
184 | } | 185 | } |
185 | 186 | ||
@@ -189,7 +190,7 @@ void __init mv78xx0_ehci1_init(void) | |||
189 | ****************************************************************************/ | 190 | ****************************************************************************/ |
190 | void __init mv78xx0_ehci2_init(void) | 191 | void __init mv78xx0_ehci2_init(void) |
191 | { | 192 | { |
192 | orion_ehci_2_init(&mv78xx0_mbus_dram_info, | 193 | orion_ehci_2_init(&orion_mbus_dram_info, |
193 | USB2_PHYS_BASE, IRQ_MV78XX0_USB_2); | 194 | USB2_PHYS_BASE, IRQ_MV78XX0_USB_2); |
194 | } | 195 | } |
195 | 196 | ||
@@ -199,7 +200,7 @@ void __init mv78xx0_ehci2_init(void) | |||
199 | ****************************************************************************/ | 200 | ****************************************************************************/ |
200 | void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) | 201 | void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) |
201 | { | 202 | { |
202 | orion_ge00_init(eth_data, &mv78xx0_mbus_dram_info, | 203 | orion_ge00_init(eth_data, &orion_mbus_dram_info, |
203 | GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM, | 204 | GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM, |
204 | IRQ_MV78XX0_GE_ERR, get_tclk()); | 205 | IRQ_MV78XX0_GE_ERR, get_tclk()); |
205 | } | 206 | } |
@@ -210,7 +211,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) | |||
210 | ****************************************************************************/ | 211 | ****************************************************************************/ |
211 | void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) | 212 | void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) |
212 | { | 213 | { |
213 | orion_ge01_init(eth_data, &mv78xx0_mbus_dram_info, | 214 | orion_ge01_init(eth_data, &orion_mbus_dram_info, |
214 | GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM, | 215 | GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM, |
215 | NO_IRQ, get_tclk()); | 216 | NO_IRQ, get_tclk()); |
216 | } | 217 | } |
@@ -234,7 +235,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) | |||
234 | eth_data->duplex = DUPLEX_FULL; | 235 | eth_data->duplex = DUPLEX_FULL; |
235 | } | 236 | } |
236 | 237 | ||
237 | orion_ge10_init(eth_data, &mv78xx0_mbus_dram_info, | 238 | orion_ge10_init(eth_data, &orion_mbus_dram_info, |
238 | GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM, | 239 | GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM, |
239 | NO_IRQ, get_tclk()); | 240 | NO_IRQ, get_tclk()); |
240 | } | 241 | } |
@@ -258,7 +259,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) | |||
258 | eth_data->duplex = DUPLEX_FULL; | 259 | eth_data->duplex = DUPLEX_FULL; |
259 | } | 260 | } |
260 | 261 | ||
261 | orion_ge11_init(eth_data, &mv78xx0_mbus_dram_info, | 262 | orion_ge11_init(eth_data, &orion_mbus_dram_info, |
262 | GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM, | 263 | GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM, |
263 | NO_IRQ, get_tclk()); | 264 | NO_IRQ, get_tclk()); |
264 | } | 265 | } |
@@ -277,7 +278,7 @@ void __init mv78xx0_i2c_init(void) | |||
277 | ****************************************************************************/ | 278 | ****************************************************************************/ |
278 | void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data) | 279 | void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data) |
279 | { | 280 | { |
280 | orion_sata_init(sata_data, &mv78xx0_mbus_dram_info, | 281 | orion_sata_init(sata_data, &orion_mbus_dram_info, |
281 | SATA_PHYS_BASE, IRQ_MV78XX0_SATA); | 282 | SATA_PHYS_BASE, IRQ_MV78XX0_SATA); |
282 | } | 283 | } |
283 | 284 | ||
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h index 632e63d65e7a..f2ca59c75c6f 100644 --- a/arch/arm/mach-mv78xx0/common.h +++ b/arch/arm/mach-mv78xx0/common.h | |||
@@ -23,7 +23,6 @@ void mv78xx0_init(void); | |||
23 | void mv78xx0_init_early(void); | 23 | void mv78xx0_init_early(void); |
24 | void mv78xx0_init_irq(void); | 24 | void mv78xx0_init_irq(void); |
25 | 25 | ||
26 | extern struct mbus_dram_target_info mv78xx0_mbus_dram_info; | ||
27 | void mv78xx0_setup_cpu_mbus(void); | 26 | void mv78xx0_setup_cpu_mbus(void); |
28 | void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size, | 27 | void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size, |
29 | int maj, int min); | 28 | int maj, int min); |
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index c51af1cac300..9208667c478a 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
16 | #include <asm/mach/pci.h> | 16 | #include <asm/mach/pci.h> |
17 | #include <plat/pcie.h> | 17 | #include <plat/pcie.h> |
18 | #include <plat/addr-map.h> | ||
18 | #include "common.h" | 19 | #include "common.h" |
19 | 20 | ||
20 | struct pcie_port { | 21 | struct pcie_port { |
@@ -153,7 +154,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) | |||
153 | * Generic PCIe unit setup. | 154 | * Generic PCIe unit setup. |
154 | */ | 155 | */ |
155 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); | 156 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); |
156 | orion_pcie_setup(pp->base, &mv78xx0_mbus_dram_info); | 157 | orion_pcie_setup(pp->base, &orion_mbus_dram_info); |
157 | 158 | ||
158 | sys->resource[0] = &pp->res[0]; | 159 | sys->resource[0] = &pp->res[0]; |
159 | sys->resource[1] = &pp->res[1]; | 160 | sys->resource[1] = &pp->res[1]; |
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 73ceb49de894..3638e5c12b7e 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c | |||
@@ -56,7 +56,6 @@ | |||
56 | #define ATTR_DEV_BOOT 0xf | 56 | #define ATTR_DEV_BOOT 0xf |
57 | #define ATTR_SRAM 0x0 | 57 | #define ATTR_SRAM 0x0 |
58 | 58 | ||
59 | struct mbus_dram_target_info orion5x_mbus_dram_info; | ||
60 | static int __initdata win_alloc_count; | 59 | static int __initdata win_alloc_count; |
61 | 60 | ||
62 | static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg, | 61 | static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg, |
@@ -114,8 +113,7 @@ void __init orion5x_setup_cpu_mbus_bridge(void) | |||
114 | /* | 113 | /* |
115 | * Setup MBUS dram target info. | 114 | * Setup MBUS dram target info. |
116 | */ | 115 | */ |
117 | orion_setup_cpu_mbus_target(&addr_map_cfg, &orion5x_mbus_dram_info, | 116 | orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE); |
118 | ORION5X_DDR_WINDOW_CPU_BASE); | ||
119 | } | 117 | } |
120 | 118 | ||
121 | void __init orion5x_setup_dev_boot_win(u32 base, u32 size) | 119 | void __init orion5x_setup_dev_boot_win(u32 base, u32 size) |
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 47ca0ee44a6a..acac255f9a1b 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <plat/orion_nand.h> | 31 | #include <plat/orion_nand.h> |
32 | #include <plat/time.h> | 32 | #include <plat/time.h> |
33 | #include <plat/common.h> | 33 | #include <plat/common.h> |
34 | #include <plat/addr-map.h> | ||
34 | #include "common.h" | 35 | #include "common.h" |
35 | 36 | ||
36 | /***************************************************************************** | 37 | /***************************************************************************** |
@@ -71,7 +72,7 @@ void __init orion5x_map_io(void) | |||
71 | ****************************************************************************/ | 72 | ****************************************************************************/ |
72 | void __init orion5x_ehci0_init(void) | 73 | void __init orion5x_ehci0_init(void) |
73 | { | 74 | { |
74 | orion_ehci_init(&orion5x_mbus_dram_info, | 75 | orion_ehci_init(&orion_mbus_dram_info, |
75 | ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL); | 76 | ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL); |
76 | } | 77 | } |
77 | 78 | ||
@@ -81,7 +82,7 @@ void __init orion5x_ehci0_init(void) | |||
81 | ****************************************************************************/ | 82 | ****************************************************************************/ |
82 | void __init orion5x_ehci1_init(void) | 83 | void __init orion5x_ehci1_init(void) |
83 | { | 84 | { |
84 | orion_ehci_1_init(&orion5x_mbus_dram_info, | 85 | orion_ehci_1_init(&orion_mbus_dram_info, |
85 | ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL); | 86 | ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL); |
86 | } | 87 | } |
87 | 88 | ||
@@ -91,7 +92,7 @@ void __init orion5x_ehci1_init(void) | |||
91 | ****************************************************************************/ | 92 | ****************************************************************************/ |
92 | void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) | 93 | void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) |
93 | { | 94 | { |
94 | orion_ge00_init(eth_data, &orion5x_mbus_dram_info, | 95 | orion_ge00_init(eth_data, &orion_mbus_dram_info, |
95 | ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, | 96 | ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, |
96 | IRQ_ORION5X_ETH_ERR, orion5x_tclk); | 97 | IRQ_ORION5X_ETH_ERR, orion5x_tclk); |
97 | } | 98 | } |
@@ -121,7 +122,7 @@ void __init orion5x_i2c_init(void) | |||
121 | ****************************************************************************/ | 122 | ****************************************************************************/ |
122 | void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) | 123 | void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) |
123 | { | 124 | { |
124 | orion_sata_init(sata_data, &orion5x_mbus_dram_info, | 125 | orion_sata_init(sata_data, &orion_mbus_dram_info, |
125 | ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA); | 126 | ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA); |
126 | } | 127 | } |
127 | 128 | ||
@@ -158,7 +159,7 @@ void __init orion5x_uart1_init(void) | |||
158 | ****************************************************************************/ | 159 | ****************************************************************************/ |
159 | void __init orion5x_xor_init(void) | 160 | void __init orion5x_xor_init(void) |
160 | { | 161 | { |
161 | orion_xor0_init(&orion5x_mbus_dram_info, | 162 | orion_xor0_init(&orion_mbus_dram_info, |
162 | ORION5X_XOR_PHYS_BASE, | 163 | ORION5X_XOR_PHYS_BASE, |
163 | ORION5X_XOR_PHYS_BASE + 0x200, | 164 | ORION5X_XOR_PHYS_BASE + 0x200, |
164 | IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1); | 165 | IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1); |
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 465e8a458bfb..889d80c7a151 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h | |||
@@ -20,7 +20,6 @@ extern struct sys_timer orion5x_timer; | |||
20 | * functions to map its interfaces and by the machine-setup to map its on- | 20 | * functions to map its interfaces and by the machine-setup to map its on- |
21 | * board devices. Details in /mach-orion/addr-map.c | 21 | * board devices. Details in /mach-orion/addr-map.c |
22 | */ | 22 | */ |
23 | extern struct mbus_dram_target_info orion5x_mbus_dram_info; | ||
24 | void orion5x_setup_cpu_mbus_bridge(void); | 23 | void orion5x_setup_cpu_mbus_bridge(void); |
25 | void orion5x_setup_dev_boot_win(u32 base, u32 size); | 24 | void orion5x_setup_dev_boot_win(u32 base, u32 size); |
26 | void orion5x_setup_dev0_win(u32 base, u32 size); | 25 | void orion5x_setup_dev0_win(u32 base, u32 size); |
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index bc4a920e26ee..ddfa01acdaaa 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/irq.h> | 18 | #include <asm/irq.h> |
19 | #include <asm/mach/pci.h> | 19 | #include <asm/mach/pci.h> |
20 | #include <plat/pcie.h> | 20 | #include <plat/pcie.h> |
21 | #include <plat/addr-map.h> | ||
21 | #include "common.h" | 22 | #include "common.h" |
22 | 23 | ||
23 | /***************************************************************************** | 24 | /***************************************************************************** |
@@ -145,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys) | |||
145 | /* | 146 | /* |
146 | * Generic PCIe unit setup. | 147 | * Generic PCIe unit setup. |
147 | */ | 148 | */ |
148 | orion_pcie_setup(PCIE_BASE, &orion5x_mbus_dram_info); | 149 | orion_pcie_setup(PCIE_BASE, &orion_mbus_dram_info); |
149 | 150 | ||
150 | /* | 151 | /* |
151 | * Check whether to apply Orion-1/Orion-NAS PCIe config | 152 | * Check whether to apply Orion-1/Orion-NAS PCIe config |
@@ -477,7 +478,7 @@ static int __init pci_setup(struct pci_sys_data *sys) | |||
477 | /* | 478 | /* |
478 | * Point PCI unit MBUS decode windows to DRAM space. | 479 | * Point PCI unit MBUS decode windows to DRAM space. |
479 | */ | 480 | */ |
480 | orion5x_setup_pci_wins(&orion5x_mbus_dram_info); | 481 | orion5x_setup_pci_wins(&orion_mbus_dram_info); |
481 | 482 | ||
482 | /* | 483 | /* |
483 | * Master + Slave enable | 484 | * Master + Slave enable |
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c index d3abb34a10aa..c27ad88bc400 100644 --- a/arch/arm/plat-orion/addr-map.c +++ b/arch/arm/plat-orion/addr-map.c | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <plat/addr-map.h> | 15 | #include <plat/addr-map.h> |
16 | 16 | ||
17 | struct mbus_dram_target_info orion_mbus_dram_info; | ||
18 | |||
17 | /* | 19 | /* |
18 | * DDR target is the same on all Orion platforms. | 20 | * DDR target is the same on all Orion platforms. |
19 | */ | 21 | */ |
@@ -134,14 +136,13 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg, | |||
134 | * Setup MBUS dram target info. | 136 | * Setup MBUS dram target info. |
135 | */ | 137 | */ |
136 | void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, | 138 | void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, |
137 | struct mbus_dram_target_info *info, | ||
138 | const u32 ddr_window_cpu_base) | 139 | const u32 ddr_window_cpu_base) |
139 | { | 140 | { |
140 | void __iomem *addr; | 141 | void __iomem *addr; |
141 | int i; | 142 | int i; |
142 | int cs; | 143 | int cs; |
143 | 144 | ||
144 | info->mbus_dram_target_id = TARGET_DDR; | 145 | orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; |
145 | 146 | ||
146 | addr = (void __iomem *)ddr_window_cpu_base; | 147 | addr = (void __iomem *)ddr_window_cpu_base; |
147 | 148 | ||
@@ -155,12 +156,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, | |||
155 | if (size & 1) { | 156 | if (size & 1) { |
156 | struct mbus_dram_window *w; | 157 | struct mbus_dram_window *w; |
157 | 158 | ||
158 | w = &info->cs[cs++]; | 159 | w = &orion_mbus_dram_info.cs[cs++]; |
159 | w->cs_index = i; | 160 | w->cs_index = i; |
160 | w->mbus_attr = 0xf & ~(1 << i); | 161 | w->mbus_attr = 0xf & ~(1 << i); |
161 | w->base = base & 0xffff0000; | 162 | w->base = base & 0xffff0000; |
162 | w->size = (size | 0x0000ffff) + 1; | 163 | w->size = (size | 0x0000ffff) + 1; |
163 | } | 164 | } |
164 | } | 165 | } |
165 | info->num_cs = cs; | 166 | orion_mbus_dram_info.num_cs = cs; |
166 | } | 167 | } |
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h index 55e40f43f1e6..fd556f77562c 100644 --- a/arch/arm/plat-orion/include/plat/addr-map.h +++ b/arch/arm/plat-orion/include/plat/addr-map.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef __PLAT_ADDR_MAP_H | 11 | #ifndef __PLAT_ADDR_MAP_H |
12 | #define __PLAT_ADDR_MAP_H | 12 | #define __PLAT_ADDR_MAP_H |
13 | 13 | ||
14 | extern struct mbus_dram_target_info orion_mbus_dram_info; | ||
15 | |||
14 | struct orion_addr_map_cfg { | 16 | struct orion_addr_map_cfg { |
15 | const int num_wins; /* Total number of windows */ | 17 | const int num_wins; /* Total number of windows */ |
16 | const int remappable_wins; | 18 | const int remappable_wins; |
@@ -47,6 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg, | |||
47 | const u8 attr, const int remap); | 49 | const u8 attr, const int remap); |
48 | 50 | ||
49 | void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, | 51 | void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, |
50 | struct mbus_dram_target_info *info, | ||
51 | const u32 ddr_window_cpu_base); | 52 | const u32 ddr_window_cpu_base); |
52 | #endif | 53 | #endif |