aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorHaojian Zhuang <haojian.zhuang@marvell.com>2011-10-17 09:26:55 -0400
committerHaojian Zhuang <hzhuang1@hexinfolabs.org>2011-11-15 06:09:36 -0500
commit389eda15e0f41112d7c44213b3c4f8bd1c9398bc (patch)
treed35d07f3d5f1104d6f0ed3dc95a6ded7de72a270
parentbe24168f144122b3730beab257fa058745d14cb4 (diff)
ARM: pxa: add clk support in gpio driver
Support clk in gpio driver. There's no gpio clock in PXA25x and PXA27x. So use dummy clk instead. And move the gpio edge initialization into gpio driver for arch-mmp. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
-rw-r--r--arch/arm/mach-mmp/mmp2.c11
-rw-r--r--arch/arm/mach-mmp/pxa168.c11
-rw-r--r--arch/arm/mach-mmp/pxa910.c11
-rw-r--r--arch/arm/mach-pxa/pxa25x.c1
-rw-r--r--arch/arm/mach-pxa/pxa27x.c1
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/pxa95x.c2
-rw-r--r--drivers/gpio/gpio-pxa.c26
8 files changed, 37 insertions, 28 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 1ed222d3e22b..617c60a170a4 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -93,18 +93,9 @@ void mmp2_clear_pmic_int(void)
93 __raw_writel(data, mfpr_pmic); 93 __raw_writel(data, mfpr_pmic);
94} 94}
95 95
96static void __init mmp2_init_gpio(void)
97{
98 int i;
99
100 /* enable GPIO clock */
101 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
102}
103
104void __init mmp2_init_irq(void) 96void __init mmp2_init_irq(void)
105{ 97{
106 mmp2_init_icu(); 98 mmp2_init_icu();
107 mmp2_init_gpio();
108} 99}
109 100
110static void sdhc_clk_enable(struct clk *clk) 101static void sdhc_clk_enable(struct clk *clk)
@@ -141,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
141static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); 132static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
142static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); 133static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
143static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 134static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
135static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
144 136
145static APMU_CLK(nand, NAND, 0xbf, 100000000); 137static APMU_CLK(nand, NAND, 0xbf, 100000000);
146static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); 138static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -160,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {
160 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 152 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
161 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 153 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
162 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 154 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
155 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
163 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), 156 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
164 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), 157 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
165 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), 158 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index fefdfe59c07c..84245035f351 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -43,18 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
43 MFP_ADDR_END, 43 MFP_ADDR_END,
44}; 44};
45 45
46static void __init pxa168_init_gpio(void)
47{
48 int i;
49
50 /* enable GPIO clock */
51 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
52}
53
54void __init pxa168_init_irq(void) 46void __init pxa168_init_irq(void)
55{ 47{
56 icu_init_irq(); 48 icu_init_irq();
57 pxa168_init_gpio();
58} 49}
59 50
60/* APB peripheral clocks */ 51/* APB peripheral clocks */
@@ -72,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
72static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); 63static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
73static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); 64static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
74static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); 65static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
66static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
75static APBC_CLK(keypad, PXA168_KPC, 0, 32000); 67static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
76 68
77static APMU_CLK(nand, NAND, 0x19b, 156000000); 69static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -97,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {
97 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), 89 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
98 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
99 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), 91 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
92 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
100 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), 93 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
101 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), 94 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
102 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), 95 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 7b992ced095c..3241a25784d0 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -77,18 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
77 MFP_ADDR_END, 77 MFP_ADDR_END,
78}; 78};
79 79
80static void __init pxa910_init_gpio(void)
81{
82 int i;
83
84 /* enable GPIO clock */
85 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
86}
87
88void __init pxa910_init_irq(void) 80void __init pxa910_init_irq(void)
89{ 81{
90 icu_init_irq(); 82 icu_init_irq();
91 pxa910_init_gpio();
92} 83}
93 84
94/* APB peripheral clocks */ 85/* APB peripheral clocks */
@@ -100,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
100static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); 91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
101static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); 92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
102static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
94static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
103 95
104static APMU_CLK(nand, NAND, 0x19b, 156000000); 96static APMU_CLK(nand, NAND, 0x19b, 156000000);
105static APMU_CLK(u2o, USB, 0x1b, 480000000); 97static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -115,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = {
115 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 107 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
116 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 108 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
117 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 109 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
110 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
118 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), 111 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
119}; 112};
120 113
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 91e4f6c03766..8a775f631c55 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -209,6 +209,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
212 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
212}; 213};
213 214
214static struct clk_lookup pxa25x_hwuart_clkreg = 215static struct clk_lookup pxa25x_hwuart_clkreg =
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index aed6cbcf3866..6c49e66057e3 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -230,6 +230,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
233 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
233}; 234};
234 235
235#ifdef CONFIG_PM 236#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 06cfe348c709..4f402afa6609 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -55,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
55static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); 55static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
56static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); 56static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
57static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); 57static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);
58 59
59static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); 60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
60static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); 61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -87,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
87 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), 88 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
88 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), 89 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
89 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), 90 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
91 INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
90}; 92};
91 93
92#ifdef CONFIG_PM 94#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 0961093dd033..d082a583df78 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -211,6 +211,7 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
211static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); 211static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
212static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); 212static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
213static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); 213static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
214 215
215static struct clk_lookup pxa95x_clkregs[] = { 216static struct clk_lookup pxa95x_clkregs[] = {
216 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), 217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
@@ -229,6 +230,7 @@ static struct clk_lookup pxa95x_clkregs[] = {
229 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), 230 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
230 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), 231 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
231 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), 232 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
233 INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
232}; 234};
233 235
234void __init pxa95x_init_irq(void) 236void __init pxa95x_init_irq(void)
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index bfd755531f7a..b2d3ee1d183a 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -11,6 +11,8 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/clk.h>
15#include <linux/err.h>
14#include <linux/gpio.h> 16#include <linux/gpio.h>
15#include <linux/gpio-pxa.h> 17#include <linux/gpio-pxa.h>
16#include <linux/init.h> 18#include <linux/init.h>
@@ -466,7 +468,8 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
466{ 468{
467 struct pxa_gpio_chip *c; 469 struct pxa_gpio_chip *c;
468 struct resource *res; 470 struct resource *res;
469 int gpio, irq; 471 struct clk *clk;
472 int gpio, irq, ret;
470 int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0; 473 int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
471 474
472 pxa_last_gpio = pxa_gpio_nums(); 475 pxa_last_gpio = pxa_gpio_nums();
@@ -489,6 +492,27 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
489 if (irq0 > 0) 492 if (irq0 > 0)
490 gpio_offset = 2; 493 gpio_offset = 2;
491 494
495 clk = clk_get(&pdev->dev, NULL);
496 if (IS_ERR(clk)) {
497 dev_err(&pdev->dev, "Error %ld to get gpio clock\n",
498 PTR_ERR(clk));
499 iounmap(gpio_reg_base);
500 return PTR_ERR(clk);
501 }
502 ret = clk_prepare(clk);
503 if (ret) {
504 clk_put(clk);
505 iounmap(gpio_reg_base);
506 return ret;
507 }
508 ret = clk_enable(clk);
509 if (ret) {
510 clk_unprepare(clk);
511 clk_put(clk);
512 iounmap(gpio_reg_base);
513 return ret;
514 }
515
492 /* Initialize GPIO chips */ 516 /* Initialize GPIO chips */
493 pxa_init_gpio_chip(pxa_last_gpio); 517 pxa_init_gpio_chip(pxa_last_gpio);
494 518