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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-06-23 04:40:04 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-06-29 15:15:19 -0400
commit2c21fd4b333e4c780a46edcd6d1e85bfc6cdf371 (patch)
tree13ceefadd0221f1494f708dcf16b8bfd74955295
parent2fc90f6133a87da8177636866557d4cc5f56e661 (diff)
PCI MSI: shorten PCI_MSIX_ENTRY_* symbol names
These names are too long! Drop _OFFSET to save some bytes/lines. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r--drivers/pci/msi.c18
-rw-r--r--drivers/pci/msi.h10
2 files changed, 13 insertions, 15 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 628c14150d49..a088fc6f5838 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -151,7 +151,7 @@ static void msix_mask_irq(struct msi_desc *desc, u32 flag)
151{ 151{
152 u32 mask_bits = desc->masked; 152 u32 mask_bits = desc->masked;
153 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + 153 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
154 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; 154 PCI_MSIX_ENTRY_VECTOR_CTRL;
155 mask_bits &= ~1; 155 mask_bits &= ~1;
156 mask_bits |= flag; 156 mask_bits |= flag;
157 writel(mask_bits, desc->mask_base + offset); 157 writel(mask_bits, desc->mask_base + offset);
@@ -188,9 +188,9 @@ void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
188 void __iomem *base = entry->mask_base + 188 void __iomem *base = entry->mask_base +
189 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; 189 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
190 190
191 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); 191 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
192 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); 192 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
193 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET); 193 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
194 } else { 194 } else {
195 struct pci_dev *dev = entry->dev; 195 struct pci_dev *dev = entry->dev;
196 int pos = entry->msi_attrib.pos; 196 int pos = entry->msi_attrib.pos;
@@ -225,11 +225,9 @@ void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
225 base = entry->mask_base + 225 base = entry->mask_base +
226 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; 226 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
227 227
228 writel(msg->address_lo, 228 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
229 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); 229 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
230 writel(msg->address_hi, 230 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
231 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
232 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
233 } else { 231 } else {
234 struct pci_dev *dev = entry->dev; 232 struct pci_dev *dev = entry->dev;
235 int pos = entry->msi_attrib.pos; 233 int pos = entry->msi_attrib.pos;
@@ -493,7 +491,7 @@ static int msix_capability_init(struct pci_dev *dev,
493 set_irq_msi(entry->irq, entry); 491 set_irq_msi(entry->irq, entry);
494 j = entries[i].entry; 492 j = entries[i].entry;
495 entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE + 493 entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE +
496 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); 494 PCI_MSIX_ENTRY_VECTOR_CTRL);
497 msix_mask_irq(entry, 1); 495 msix_mask_irq(entry, 1);
498 i++; 496 i++;
499 } 497 }
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index a0662842550b..de27c1cb5a2b 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -6,11 +6,11 @@
6#ifndef MSI_H 6#ifndef MSI_H
7#define MSI_H 7#define MSI_H
8 8
9#define PCI_MSIX_ENTRY_SIZE 16 9#define PCI_MSIX_ENTRY_SIZE 16
10#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0 10#define PCI_MSIX_ENTRY_LOWER_ADDR 0
11#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4 11#define PCI_MSIX_ENTRY_UPPER_ADDR 4
12#define PCI_MSIX_ENTRY_DATA_OFFSET 8 12#define PCI_MSIX_ENTRY_DATA 8
13#define PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET 12 13#define PCI_MSIX_ENTRY_VECTOR_CTRL 12
14 14
15#define msi_control_reg(base) (base + PCI_MSI_FLAGS) 15#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
16#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) 16#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)