xHCI 1.0: Max Exit Latency Too Large Error

This is a new TRB Completion Code of the xHCI spec 1.0.
Asserted by the Evalute Context Command if the proposed Max Exit Latency would
not allow the periodic endpoints of the Device Slot to be scheduled.

Signed-off-by: Alex He <alex.he@amd.com>
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>

2 files changed, 8 insertions, 1 deletions

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 3abf33223b1c..013e113b818a 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1560,6 +1560,11 @@ static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
                 ret = -EINVAL;
                 break;
+        case COMP_MEL_ERR:
+                /* Max Exit Latency too large error */
+                dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
+                ret = -EINVAL;
+                break;
         case COMP_SUCCESS:
                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
                 ret = 0;
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 33a49d5d6c22..e12db7cfb9bb 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -881,7 +881,9 @@ struct xhci_transfer_event {
 #define COMP_STOP_INVAL 27
 /* Control Abort Error - Debug Capability - control pipe aborted */
 #define COMP_DBG_ABORT  28
-/* TRB type 29 and 30 reserved */
+/* Max Exit Latency Too Large Error */
+#define COMP_MEL_ERR    29
+/* TRB type 30 reserved */
 /* Isoc Buffer Overrun - an isoc IN ep sent more data than could fit in TD */
 #define COMP_BUFF_OVER  31
 /* Event Lost Error - xHC has an "internal event overrun condition" */