diff options
author | Huang Ying <ying.huang@intel.com> | 2011-12-07 22:25:40 -0500 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2012-01-17 03:54:15 -0500 |
commit | 04c25997c97e57d95d1f5a7a6e5fff2411dbd48b (patch) | |
tree | 9cd7a85d459dcfa56e7a465a556dd813d0cfecc9 | |
parent | 805a6af8dba5dfdd35ec35dc52ec0122400b2610 (diff) |
ACPI, Add 64bit read/write support to atomicio on i386
There is no 64bit read/write support in ACPI atomicio because
readq/writeq is used to implement 64bit read/write, but readq/writeq
is not available on i386. This patch implement 64bit read/write
support in atomicio via two readl/writel.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
-rw-r--r-- | drivers/acpi/atomicio.c | 36 |
1 files changed, 30 insertions, 6 deletions
diff --git a/drivers/acpi/atomicio.c b/drivers/acpi/atomicio.c index cfc0cc10af39..1016f186c17c 100644 --- a/drivers/acpi/atomicio.c +++ b/drivers/acpi/atomicio.c | |||
@@ -260,6 +260,21 @@ int acpi_post_unmap_gar(struct acpi_generic_address *reg) | |||
260 | } | 260 | } |
261 | EXPORT_SYMBOL_GPL(acpi_post_unmap_gar); | 261 | EXPORT_SYMBOL_GPL(acpi_post_unmap_gar); |
262 | 262 | ||
263 | #ifdef readq | ||
264 | static inline u64 read64(const volatile void __iomem *addr) | ||
265 | { | ||
266 | return readq(addr); | ||
267 | } | ||
268 | #else | ||
269 | static inline u64 read64(const volatile void __iomem *addr) | ||
270 | { | ||
271 | u64 l, h; | ||
272 | l = readl(addr); | ||
273 | h = readl(addr+4); | ||
274 | return l | (h << 32); | ||
275 | } | ||
276 | #endif | ||
277 | |||
263 | /* | 278 | /* |
264 | * Can be used in atomic (including NMI) or process context. RCU read | 279 | * Can be used in atomic (including NMI) or process context. RCU read |
265 | * lock can only be released after the IO memory area accessing. | 280 | * lock can only be released after the IO memory area accessing. |
@@ -280,11 +295,9 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width) | |||
280 | case 32: | 295 | case 32: |
281 | *val = readl(addr); | 296 | *val = readl(addr); |
282 | break; | 297 | break; |
283 | #ifdef readq | ||
284 | case 64: | 298 | case 64: |
285 | *val = readq(addr); | 299 | *val = read64(addr); |
286 | break; | 300 | break; |
287 | #endif | ||
288 | default: | 301 | default: |
289 | return -EINVAL; | 302 | return -EINVAL; |
290 | } | 303 | } |
@@ -293,6 +306,19 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width) | |||
293 | return 0; | 306 | return 0; |
294 | } | 307 | } |
295 | 308 | ||
309 | #ifdef writeq | ||
310 | static inline void write64(u64 val, volatile void __iomem *addr) | ||
311 | { | ||
312 | writeq(val, addr); | ||
313 | } | ||
314 | #else | ||
315 | static inline void write64(u64 val, volatile void __iomem *addr) | ||
316 | { | ||
317 | writel(val, addr); | ||
318 | writel(val>>32, addr+4); | ||
319 | } | ||
320 | #endif | ||
321 | |||
296 | static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width) | 322 | static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width) |
297 | { | 323 | { |
298 | void __iomem *addr; | 324 | void __iomem *addr; |
@@ -309,11 +335,9 @@ static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width) | |||
309 | case 32: | 335 | case 32: |
310 | writel(val, addr); | 336 | writel(val, addr); |
311 | break; | 337 | break; |
312 | #ifdef writeq | ||
313 | case 64: | 338 | case 64: |
314 | writeq(val, addr); | 339 | write64(val, addr); |
315 | break; | 340 | break; |
316 | #endif | ||
317 | default: | 341 | default: |
318 | return -EINVAL; | 342 | return -EINVAL; |
319 | } | 343 | } |