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authorDaniel Walker <dwalker@codeaurora.org>2010-02-25 14:38:39 -0500
committerDaniel Walker <dwalker@codeaurora.org>2010-05-12 12:13:44 -0400
commita32d2feb80bb2d186d415ed8bb4997148add0bd1 (patch)
tree2fbd2c6569df9431708a77763e472e8c72703ad2
parent8d747cdb3d4db7fd7a0740986567a50fb232931a (diff)
arm: msm: add board file for QSD8x50 SURF and FFA
This adds a basic board file without Kconfig changes. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c176
1 files changed, 176 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
new file mode 100644
index 000000000000..a5e862c6ef7b
--- /dev/null
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -0,0 +1,176 @@
1/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 */
17
18#include <linux/kernel.h>
19#include <linux/irq.h>
20#include <linux/gpio.h>
21#include <linux/platform_device.h>
22#include <linux/bootmem.h>
23#include <linux/delay.h>
24
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <asm/io.h>
28#include <asm/setup.h>
29
30#include <mach/vreg.h>
31#include <mach/mpp.h>
32#include <mach/gpio.h>
33#include <mach/board.h>
34#include <mach/dma.h>
35#include <mach/memory.h>
36
37#include "devices.h"
38#include "timer.h"
39#include "socinfo.h"
40#include "proc_comm.h"
41
42#define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000)
43
44static struct resource smc91x_resources[] = {
45 [0] = {
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct platform_device smc91x_device = {
54 .name = "smc91x",
55 .id = 0,
56 .num_resources = ARRAY_SIZE(smc91x_resources),
57 .resource = smc91x_resources,
58};
59
60static struct platform_device *devices[] __initdata = {
61 &smc91x_device,
62 &msm_device_smd,
63 &msm_device_dmov,
64 &msm_device_nand,
65};
66
67static void __init qsd8x50_init_irq(void)
68{
69 msm_init_irq();
70}
71
72static void __init qsd8x50_init_host(void)
73{
74 if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa())
75 return;
76
77 vreg_usb = vreg_get(NULL, "boost");
78
79 if (IS_ERR(vreg_usb)) {
80 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
81 __func__, PTR_ERR(vreg_usb));
82 return;
83 }
84
85 platform_device_register(&msm_device_hsusb_otg);
86}
87
88static void __init qsd8x50_cfg_smc91x(void)
89{
90 int rc = 0;
91
92 if (machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf()) {
93 smc91x_resources[0].start = 0x70000300;
94 smc91x_resources[0].end = 0x700003ff;
95 smc91x_resources[1].start = MSM_GPIO_TO_INT(156);
96 smc91x_resources[1].end = MSM_GPIO_TO_INT(156);
97 } else if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
98 smc91x_resources[0].start = 0x84000300;
99 smc91x_resources[0].end = 0x840003ff;
100 smc91x_resources[1].start = MSM_GPIO_TO_INT(87);
101 smc91x_resources[1].end = MSM_GPIO_TO_INT(87);
102
103 rc = gpio_tlmm_config(GPIO_CFG(87, 0, GPIO_INPUT,
104 GPIO_PULL_DOWN, GPIO_2MA),
105 GPIO_ENABLE);
106 if (rc) {
107 printk(KERN_ERR "%s: gpio_tlmm_config=%d\n",
108 __func__, rc);
109 }
110 } else
111 printk(KERN_ERR "%s: invalid machine type\n", __func__);
112}
113
114static void __init qsd8x50_init(void)
115{
116 if (socinfo_init() < 0)
117 printk(KERN_ERR "%s: socinfo_init() failed!\n",
118 __func__);
119 qsd8x50_cfg_smc91x();
120 platform_add_devices(devices, ARRAY_SIZE(devices));
121}
122
123static void __init qsd8x50_map_io(void)
124{
125 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
126 msm_map_qsd8x50_io();
127 msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50);
128}
129
130MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
131#ifdef CONFIG_MSM_DEBUG_UART
132 .phys_io = MSM_DEBUG_UART_PHYS,
133 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
134#endif
135 .boot_params = PHYS_OFFSET + 0x100,
136 .map_io = qsd8x50_map_io,
137 .init_irq = qsd8x50_init_irq,
138 .init_machine = qsd8x50_init,
139 .timer = &msm_timer,
140MACHINE_END
141
142MACHINE_START(QSD8X50_FFA, "QCT QSD8X50 FFA")
143#ifdef CONFIG_MSM_DEBUG_UART
144 .phys_io = MSM_DEBUG_UART_PHYS,
145 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
146#endif
147 .boot_params = PHYS_OFFSET + 0x100,
148 .map_io = qsd8x50_map_io,
149 .init_irq = qsd8x50_init_irq,
150 .init_machine = qsd8x50_init,
151 .timer = &msm_timer,
152MACHINE_END
153
154MACHINE_START(QSD8X50A_SURF, "QCT QSD8X50A SURF")
155#ifdef CONFIG_MSM_DEBUG_UART
156 .phys_io = MSM_DEBUG_UART_PHYS,
157 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
158#endif
159 .boot_params = PHYS_OFFSET + 0x100,
160 .map_io = qsd8x50_map_io,
161 .init_irq = qsd8x50_init_irq,
162 .init_machine = qsd8x50_init,
163 .timer = &msm_timer,
164MACHINE_END
165
166MACHINE_START(QSD8X50A_FFA, "QCT QSD8X50A FFA")
167#ifdef CONFIG_MSM_DEBUG_UART
168 .phys_io = MSM_DEBUG_UART_PHYS,
169 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
170#endif
171 .boot_params = PHYS_OFFSET + 0x100,
172 .map_io = qsd8x50_map_io,
173 .init_irq = qsd8x50_init_irq,
174 .init_machine = qsd8x50_init,
175 .timer = &msm_timer,
176MACHINE_END