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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2009-10-19 18:25:31 -0400
committerTony Lindgren <tony@atomide.com>2009-10-19 18:25:31 -0400
commit233fd64e7f42a7b8e827ee02528474e0fabfebdc (patch)
tree1fefbe2daf7c74a7112f00c8c2f8194bb75423c1
parentb0002e0e37de53782580a7587ad26b2131555653 (diff)
omap: Split OMAP2_IO_ADDRESS to L3 and L4
This patch splits OMAP2_IO_ADDRESS to OMAP2_L3_IO_ADDRESS and OMAP2_L4_IO_ADDRESS to reclaim more IO space. The omap_read*() and omap_write*() functions will work only over L4 address space. Current omap kernel stack uses these functions only to access registers over L4 io address space Note that these macros should only be used when ioremap does not work. Please use ioremap instead in all new code. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/cm.h6
-rw-r--r--arch/arm/mach-omap2/pm-debug.c3
-rw-r--r--arch/arm/mach-omap2/prm.h6
-rw-r--r--arch/arm/mach-omap2/sdrc.h9
-rw-r--r--arch/arm/mach-omap2/sram242x.S4
-rw-r--r--arch/arm/mach-omap2/sram243x.S4
-rw-r--r--arch/arm/plat-omap/common.c44
-rw-r--r--arch/arm/plat-omap/include/mach/control.h15
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S6
-rw-r--r--arch/arm/plat-omap/include/mach/io.h6
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h6
-rw-r--r--arch/arm/plat-omap/io.c12
-rw-r--r--arch/arm/plat-omap/sram.c20
13 files changed, 75 insertions, 66 deletions
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index cfd0b726ba44..a2fcfcc253cc 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -17,11 +17,11 @@
17#include "prcm-common.h" 17#include "prcm-common.h"
18 18
19#define OMAP2420_CM_REGADDR(module, reg) \ 19#define OMAP2420_CM_REGADDR(module, reg) \
20 OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) 20 OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
21#define OMAP2430_CM_REGADDR(module, reg) \ 21#define OMAP2430_CM_REGADDR(module, reg) \
22 OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) 22 OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
23#define OMAP34XX_CM_REGADDR(module, reg) \ 23#define OMAP34XX_CM_REGADDR(module, reg) \
24 OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) 24 OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
25 25
26/* 26/*
27 * Architecture-specific global CM registers 27 * Architecture-specific global CM registers
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 2fc4d6abbd0a..deed1ddd039a 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -51,7 +51,8 @@ int omap2_pm_debug;
51 regs[reg_count++].val = __raw_readl(reg) 51 regs[reg_count++].val = __raw_readl(reg)
52#define DUMP_INTC_REG(reg, off) \ 52#define DUMP_INTC_REG(reg, off) \
53 regs[reg_count].name = #reg; \ 53 regs[reg_count].name = #reg; \
54 regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) 54 regs[reg_count++].val = \
55 __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
55 56
56static int __init pm_dbg_init(void); 57static int __init pm_dbg_init(void);
57 58
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 03c467c35f54..a117f853ea39 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -17,11 +17,11 @@
17#include "prcm-common.h" 17#include "prcm-common.h"
18 18
19#define OMAP2420_PRM_REGADDR(module, reg) \ 19#define OMAP2420_PRM_REGADDR(module, reg) \
20 OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) 20 OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
21#define OMAP2430_PRM_REGADDR(module, reg) \ 21#define OMAP2430_PRM_REGADDR(module, reg) \
22 OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) 22 OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
23#define OMAP34XX_PRM_REGADDR(module, reg) \ 23#define OMAP34XX_PRM_REGADDR(module, reg) \
24 OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) 24 OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
25 25
26/* 26/*
27 * Architecture-specific global PRM registers 27 * Architecture-specific global PRM registers
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 0837eda5f2b6..345183dbc7fb 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -48,9 +48,12 @@ static inline u32 sms_read_reg(u16 reg)
48 return __raw_readl(OMAP_SMS_REGADDR(reg)); 48 return __raw_readl(OMAP_SMS_REGADDR(reg));
49} 49}
50#else 50#else
51#define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) 51#define OMAP242X_SDRC_REGADDR(reg) \
52#define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) 52 OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
53#define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) 53#define OMAP243X_SDRC_REGADDR(reg) \
54 OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
55#define OMAP34XX_SDRC_REGADDR(reg) \
56 OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
54#endif /* __ASSEMBLER__ */ 57#endif /* __ASSEMBLER__ */
55 58
56#endif 59#endif
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index 9b62208658bc..92e6e1a12af8 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
128prcm_mask_val: 128prcm_mask_val:
129 .word 0xFFFF3FFC 129 .word 0xFFFF3FFC
130omap242x_sdi_timer_32ksynct_cr: 130omap242x_sdi_timer_32ksynct_cr:
131 .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) 131 .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
132ENTRY(omap242x_sram_ddr_init_sz) 132ENTRY(omap242x_sram_ddr_init_sz)
133 .word . - omap242x_sram_ddr_init 133 .word . - omap242x_sram_ddr_init
134 134
@@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
224ddr_prcm_mask_val: 224ddr_prcm_mask_val:
225 .word 0xFFFF3FFC 225 .word 0xFFFF3FFC
226omap242x_srs_timer_32ksynct: 226omap242x_srs_timer_32ksynct:
227 .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) 227 .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
228 228
229ENTRY(omap242x_sram_reprogram_sdrc_sz) 229ENTRY(omap242x_sram_reprogram_sdrc_sz)
230 .word . - omap242x_sram_reprogram_sdrc 230 .word . - omap242x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index df2cd9277c00..ab4973695c71 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
128prcm_mask_val: 128prcm_mask_val:
129 .word 0xFFFF3FFC 129 .word 0xFFFF3FFC
130omap243x_sdi_timer_32ksynct_cr: 130omap243x_sdi_timer_32ksynct_cr:
131 .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) 131 .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
132ENTRY(omap243x_sram_ddr_init_sz) 132ENTRY(omap243x_sram_ddr_init_sz)
133 .word . - omap243x_sram_ddr_init 133 .word . - omap243x_sram_ddr_init
134 134
@@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
224ddr_prcm_mask_val: 224ddr_prcm_mask_val:
225 .word 0xFFFF3FFC 225 .word 0xFFFF3FFC
226omap243x_srs_timer_32ksynct: 226omap243x_srs_timer_32ksynct:
227 .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) 227 .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
228 228
229ENTRY(omap243x_sram_reprogram_sdrc_sz) 229ENTRY(omap243x_sram_reprogram_sdrc_sz)
230 .word . - omap243x_sram_reprogram_sdrc 230 .word . - omap243x_sram_reprogram_sdrc
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index fdcb1cfd0c35..8b3ef17183e2 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -227,12 +227,12 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
227 227
228static struct omap_globals omap242x_globals = { 228static struct omap_globals omap242x_globals = {
229 .class = OMAP242X_CLASS, 229 .class = OMAP242X_CLASS,
230 .tap = OMAP2_IO_ADDRESS(0x48014000), 230 .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
231 .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), 231 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
232 .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), 232 .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
233 .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), 233 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
234 .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), 234 .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
235 .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), 235 .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
236}; 236};
237 237
238void __init omap2_set_globals_242x(void) 238void __init omap2_set_globals_242x(void)
@@ -245,12 +245,12 @@ void __init omap2_set_globals_242x(void)
245 245
246static struct omap_globals omap243x_globals = { 246static struct omap_globals omap243x_globals = {
247 .class = OMAP243X_CLASS, 247 .class = OMAP243X_CLASS,
248 .tap = OMAP2_IO_ADDRESS(0x4900a000), 248 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
249 .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), 249 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
250 .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), 250 .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
251 .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), 251 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
252 .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), 252 .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
253 .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), 253 .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
254}; 254};
255 255
256void __init omap2_set_globals_243x(void) 256void __init omap2_set_globals_243x(void)
@@ -263,12 +263,12 @@ void __init omap2_set_globals_243x(void)
263 263
264static struct omap_globals omap343x_globals = { 264static struct omap_globals omap343x_globals = {
265 .class = OMAP343X_CLASS, 265 .class = OMAP343X_CLASS,
266 .tap = OMAP2_IO_ADDRESS(0x4830A000), 266 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
267 .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), 267 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
268 .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), 268 .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
269 .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), 269 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
270 .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), 270 .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
271 .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), 271 .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
272}; 272};
273 273
274void __init omap2_set_globals_343x(void) 274void __init omap2_set_globals_343x(void)
@@ -280,10 +280,10 @@ void __init omap2_set_globals_343x(void)
280#if defined(CONFIG_ARCH_OMAP4) 280#if defined(CONFIG_ARCH_OMAP4)
281static struct omap_globals omap4_globals = { 281static struct omap_globals omap4_globals = {
282 .class = OMAP443X_CLASS, 282 .class = OMAP443X_CLASS,
283 .tap = OMAP2_IO_ADDRESS(0x4830a000), 283 .tap = OMAP2_L4_IO_ADDRESS(0x4830a000),
284 .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE), 284 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
285 .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE), 285 .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
286 .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE), 286 .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
287}; 287};
288 288
289void __init omap2_set_globals_443x(void) 289void __init omap2_set_globals_443x(void)
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 826d317cdbec..805819f3a868 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -20,15 +20,18 @@
20 20
21#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
22#define OMAP242X_CTRL_REGADDR(reg) \ 22#define OMAP242X_CTRL_REGADDR(reg) \
23 OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 23 OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
24#define OMAP243X_CTRL_REGADDR(reg) \ 24#define OMAP243X_CTRL_REGADDR(reg) \
25 OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 25 OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
26#define OMAP343X_CTRL_REGADDR(reg) \ 26#define OMAP343X_CTRL_REGADDR(reg) \
27 OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 27 OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
28#else 28#else
29#define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 29#define OMAP242X_CTRL_REGADDR(reg) \
30#define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 30 OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
31#define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 31#define OMAP243X_CTRL_REGADDR(reg) \
32 OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
33#define OMAP343X_CTRL_REGADDR(reg) \
34 OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
32#endif /* __ASSEMBLY__ */ 35#endif /* __ASSEMBLY__ */
33 36
34/* 37/*
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 3bad928c6315..2aea5665f58f 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -68,9 +68,9 @@
68 68
69/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ 69/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
70#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) 70#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
71#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE) 71#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
72#elif defined(CONFIG_ARCH_OMAP34XX) 72#elif defined(CONFIG_ARCH_OMAP34XX)
73#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE) 73#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
74#endif 74#endif
75#if defined(CONFIG_ARCH_OMAP4) 75#if defined(CONFIG_ARCH_OMAP4)
76#include <mach/omap44xx.h> 76#include <mach/omap44xx.h>
@@ -104,7 +104,7 @@
104 104
105 .endm 105 .endm
106#else 106#else
107#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) 107#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
108 108
109 /* 109 /*
110 * The interrupt numbering scheme is defined in the 110 * The interrupt numbering scheme is defined in the
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 8d32df32b0b1..c475be75267e 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -63,9 +63,11 @@
63#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 63#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
64#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) 64#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
65 65
66#define OMAP2_IO_OFFSET 0x90000000 66#define OMAP2_L3_IO_OFFSET 0x90000000
67#define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */ 67#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
68 68
69#define OMAP2_L4_IO_OFFSET 0x90000000
70#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
69/* 71/*
70 * ---------------------------------------------------------------------------- 72 * ----------------------------------------------------------------------------
71 * Omap1 specific IO mapping 73 * Omap1 specific IO mapping
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 1c09c78a48f2..7b58a5f78ce4 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -80,11 +80,11 @@
80 */ 80 */
81 81
82#define OMAP242X_SMS_REGADDR(reg) \ 82#define OMAP242X_SMS_REGADDR(reg) \
83 (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg) 83 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
84#define OMAP243X_SMS_REGADDR(reg) \ 84#define OMAP243X_SMS_REGADDR(reg) \
85 (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg) 85 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
86#define OMAP343X_SMS_REGADDR(reg) \ 86#define OMAP343X_SMS_REGADDR(reg) \
87 (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg) 87 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
88 88
89/* SMS register offsets - read/write with sms_{read,write}_reg() */ 89/* SMS register offsets - read/write with sms_{read,write}_reg() */
90 90
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 23a205f4a2b1..eb74ab286081 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -142,7 +142,7 @@ u8 omap_readb(u32 pa)
142 if (cpu_class_is_omap1()) 142 if (cpu_class_is_omap1())
143 return __raw_readb(OMAP1_IO_ADDRESS(pa)); 143 return __raw_readb(OMAP1_IO_ADDRESS(pa));
144 else 144 else
145 return __raw_readb(OMAP2_IO_ADDRESS(pa)); 145 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
146} 146}
147EXPORT_SYMBOL(omap_readb); 147EXPORT_SYMBOL(omap_readb);
148 148
@@ -151,7 +151,7 @@ u16 omap_readw(u32 pa)
151 if (cpu_class_is_omap1()) 151 if (cpu_class_is_omap1())
152 return __raw_readw(OMAP1_IO_ADDRESS(pa)); 152 return __raw_readw(OMAP1_IO_ADDRESS(pa));
153 else 153 else
154 return __raw_readw(OMAP2_IO_ADDRESS(pa)); 154 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
155} 155}
156EXPORT_SYMBOL(omap_readw); 156EXPORT_SYMBOL(omap_readw);
157 157
@@ -160,7 +160,7 @@ u32 omap_readl(u32 pa)
160 if (cpu_class_is_omap1()) 160 if (cpu_class_is_omap1())
161 return __raw_readl(OMAP1_IO_ADDRESS(pa)); 161 return __raw_readl(OMAP1_IO_ADDRESS(pa));
162 else 162 else
163 return __raw_readl(OMAP2_IO_ADDRESS(pa)); 163 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
164} 164}
165EXPORT_SYMBOL(omap_readl); 165EXPORT_SYMBOL(omap_readl);
166 166
@@ -169,7 +169,7 @@ void omap_writeb(u8 v, u32 pa)
169 if (cpu_class_is_omap1()) 169 if (cpu_class_is_omap1())
170 __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); 170 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
171 else 171 else
172 __raw_writeb(v, OMAP2_IO_ADDRESS(pa)); 172 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
173} 173}
174EXPORT_SYMBOL(omap_writeb); 174EXPORT_SYMBOL(omap_writeb);
175 175
@@ -178,7 +178,7 @@ void omap_writew(u16 v, u32 pa)
178 if (cpu_class_is_omap1()) 178 if (cpu_class_is_omap1())
179 __raw_writew(v, OMAP1_IO_ADDRESS(pa)); 179 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
180 else 180 else
181 __raw_writew(v, OMAP2_IO_ADDRESS(pa)); 181 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
182} 182}
183EXPORT_SYMBOL(omap_writew); 183EXPORT_SYMBOL(omap_writew);
184 184
@@ -187,6 +187,6 @@ void omap_writel(u32 v, u32 pa)
187 if (cpu_class_is_omap1()) 187 if (cpu_class_is_omap1())
188 __raw_writel(v, OMAP1_IO_ADDRESS(pa)); 188 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
189 else 189 else
190 __raw_writel(v, OMAP2_IO_ADDRESS(pa)); 190 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
191} 191}
192EXPORT_SYMBOL(omap_writel); 192EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 75d1f26e5b17..93bdbaf7b3a4 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -56,16 +56,16 @@
56#define SRAM_BOOTLOADER_SZ 0x80 56#define SRAM_BOOTLOADER_SZ 0x80
57#endif 57#endif
58 58
59#define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048) 59#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
60#define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050) 60#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
61#define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058) 61#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
62 62
63#define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848) 63#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
64#define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850) 64#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
65#define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858) 65#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
66#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880) 66#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
67#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048) 67#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
68#define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0) 68#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
69 69
70#define GP_DEVICE 0x300 70#define GP_DEVICE 0x300
71 71