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authorArnd Bergmann <arnd@arndb.de>2012-03-19 17:00:48 -0400
committerArnd Bergmann <arnd@arndb.de>2012-03-19 17:00:48 -0400
commited1b4acc43b0c3289faa30cf184f322ab70a5be3 (patch)
treefc953baee9a383fe7f92c50e34a7a0c641f096a9
parent849ad9d819f668d4bb6314f102bd92d16ab98622 (diff)
parent279b658525abd06645938fb607860de42c4cf31e (diff)
Merge branch 'for-3.4/cleanup-and-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/cleanups
* 'for-3.4/cleanup-and-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: ARM: tegra: select USB_ULPI if USB is selected arm/tegra: pcie: fix return value of function arm/tegra: add timeout to PCIe PLL lock detection loop arm/tegra: fix harmony pinmux for PCIe
-rw-r--r--arch/arm/mach-tegra/Kconfig4
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/pcie.c16
3 files changed, 17 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index d2cb4b037f7f..6ae78821fd8e 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -8,7 +8,7 @@ config ARCH_TEGRA_2x_SOC
8 select ARM_GIC 8 select ARM_GIC
9 select ARCH_REQUIRE_GPIOLIB 9 select ARCH_REQUIRE_GPIOLIB
10 select USB_ARCH_HAS_EHCI if USB_SUPPORT 10 select USB_ARCH_HAS_EHCI if USB_SUPPORT
11 select USB_ULPI if USB_SUPPORT 11 select USB_ULPI if USB
12 select USB_ULPI_VIEWPORT if USB_SUPPORT 12 select USB_ULPI_VIEWPORT if USB_SUPPORT
13 select ARM_ERRATA_720789 13 select ARM_ERRATA_720789
14 select ARM_ERRATA_742230 14 select ARM_ERRATA_742230
@@ -28,7 +28,7 @@ config ARCH_TEGRA_3x_SOC
28 select ARM_GIC 28 select ARM_GIC
29 select ARCH_REQUIRE_GPIOLIB 29 select ARCH_REQUIRE_GPIOLIB
30 select USB_ARCH_HAS_EHCI if USB_SUPPORT 30 select USB_ARCH_HAS_EHCI if USB_SUPPORT
31 select USB_ULPI if USB_SUPPORT 31 select USB_ULPI if USB
32 select USB_ULPI_VIEWPORT if USB_SUPPORT 32 select USB_ULPI_VIEWPORT if USB_SUPPORT
33 select USE_OF 33 select USE_OF
34 select ARM_ERRATA_743622 34 select ARM_ERRATA_743622
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 465808c8ac0b..1af85bccc0f1 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
53 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 53 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
54 {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 54 {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
55 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 55 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 56 {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
57 {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 57 {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
58 {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 58 {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
59 {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 59 {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
113 {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 113 {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
114 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 114 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
115 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 115 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
116 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 117 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 118 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
119 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 119 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
120 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 120 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
121 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 121 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index af8b63435727..91536996c3f0 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void)
585 afi_writel(0, AFI_MSI_BAR_SZ); 585 afi_writel(0, AFI_MSI_BAR_SZ);
586} 586}
587 587
588static void tegra_pcie_enable_controller(void) 588static int tegra_pcie_enable_controller(void)
589{ 589{
590 u32 val, reg; 590 u32 val, reg;
591 int i; 591 int i, timeout;
592 592
593 /* Enable slot clock and pulse the reset signals */ 593 /* Enable slot clock and pulse the reset signals */
594 for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) { 594 for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) {
@@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void)
639 pads_writel(0xfa5cfa5c, 0xc8); 639 pads_writel(0xfa5cfa5c, 0xc8);
640 640
641 /* Wait for the PLL to lock */ 641 /* Wait for the PLL to lock */
642 timeout = 300;
642 do { 643 do {
643 val = pads_readl(PADS_PLL_CTL); 644 val = pads_readl(PADS_PLL_CTL);
645 usleep_range(1000, 1000);
646 if (--timeout == 0) {
647 pr_err("Tegra PCIe error: timeout waiting for PLL\n");
648 return -EBUSY;
649 }
644 } while (!(val & PADS_PLL_CTL_LOCKDET)); 650 } while (!(val & PADS_PLL_CTL_LOCKDET));
645 651
646 /* turn off IDDQ override */ 652 /* turn off IDDQ override */
@@ -671,7 +677,7 @@ static void tegra_pcie_enable_controller(void)
671 /* Disable all execptions */ 677 /* Disable all execptions */
672 afi_writel(0, AFI_FPCI_ERROR_MASKS); 678 afi_writel(0, AFI_FPCI_ERROR_MASKS);
673 679
674 return; 680 return 0;
675} 681}
676 682
677static void tegra_pcie_xclk_clamp(bool clamp) 683static void tegra_pcie_xclk_clamp(bool clamp)
@@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
921 if (err) 927 if (err)
922 return err; 928 return err;
923 929
924 tegra_pcie_enable_controller(); 930 err = tegra_pcie_enable_controller();
931 if (err)
932 return err;
925 933
926 /* setup the AFI address translations */ 934 /* setup the AFI address translations */
927 tegra_pcie_setup_translations(); 935 tegra_pcie_setup_translations();