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authorKonstantin Porotchkin <kostap@marvell.com>2011-03-27 05:54:49 -0400
committerNicolas Pitre <nico@fluxnic.net>2011-03-27 09:22:52 -0400
commitdc7b602dd481cad61fc4f18874bbdc5b04b5ee3e (patch)
tree6fe062cd8ff26d8aa85d98a3b644e2ebc132a10c
parent7780c803bd103895a9c1c9a3c91db5b45c66e367 (diff)
Fix the broken build for Marvell Dove platform.
Remove call to the old GPIO init function. Fix old MPP control offset value. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Acked-by: Saeed Bishara <saeed.bishara@gmail.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h2
-rw-r--r--arch/arm/mach-dove/mpp.c3
2 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index e5fcdd3f5bf5..b20ec9af7882 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -136,7 +136,7 @@
136#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) 136#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
137#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) 137#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
138#define DOVE_NAND_GPIO_EN (1 << 0) 138#define DOVE_NAND_GPIO_EN (1 << 0)
139#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40) 139#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_LO_VIRT_BASE + 0x40)
140#define DOVE_SPI_GPIO_SEL (1 << 5) 140#define DOVE_SPI_GPIO_SEL (1 << 5)
141#define DOVE_UART1_GPIO_SEL (1 << 4) 141#define DOVE_UART1_GPIO_SEL (1 << 4)
142#define DOVE_AU1_GPIO_SEL (1 << 3) 142#define DOVE_AU1_GPIO_SEL (1 << 3)
diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c
index 71db2bdf2f28..c66c76346904 100644
--- a/arch/arm/mach-dove/mpp.c
+++ b/arch/arm/mach-dove/mpp.c
@@ -147,9 +147,6 @@ void __init dove_mpp_conf(unsigned int *mpp_list)
147 u32 pmu_sig_ctrl[PMU_SIG_REGS]; 147 u32 pmu_sig_ctrl[PMU_SIG_REGS];
148 int i; 148 int i;
149 149
150 /* Initialize gpiolib. */
151 orion_gpio_init();
152
153 for (i = 0; i < MPP_NR_REGS; i++) 150 for (i = 0; i < MPP_NR_REGS; i++)
154 mpp_ctrl[i] = readl(MPP_CTRL(i)); 151 mpp_ctrl[i] = readl(MPP_CTRL(i));
155 152