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authorIlya Yanok <yanok@emcraft.com>2010-07-08 06:10:39 -0400
committerKumar Gala <galak@kernel.crashing.org>2010-08-04 15:18:50 -0400
commitba4d1275d1ad89a17cd529f7755e227ead52be4e (patch)
tree4eda380c74a48d16226616b19df9f6d392dee769
parente3b5e0d552b34d65e15b20610273b200555eea53 (diff)
powerpc/mpc8308rdb: support for MPC8308RDB board from Freescale
This patch adds support for MPC8308RDB development board from Freescale. Supported devices: DUART Dual Ethernet NOR and NAND flashes I2C USB in peripheral mode PCIE support is broken by the commit 3da34aa ("powerpc/fsl: Support unique MSI addresses per PCIe Root Complex"). Works after revert. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat
-rw-r--r--arch/powerpc/boot/dts/mpc8308rdb.dts303
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig8
-rw-r--r--arch/powerpc/platforms/83xx/Makefile1
-rw-r--r--arch/powerpc/platforms/83xx/mpc830x_rdb.c94
4 files changed, 406 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts
new file mode 100644
index 000000000000..a97eb2db5a18
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8308rdb.dts
@@ -0,0 +1,303 @@
1/*
2 * MPC8308RDB Device Tree Source
3 *
4 * Copyright 2009 Freescale Semiconductor Inc.
5 * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14
15/ {
16 compatible = "fsl,mpc8308rdb";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8308@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <16384>;
38 i-cache-size = <16384>;
39 timebase-frequency = <0>; // from bootloader
40 bus-frequency = <0>; // from bootloader
41 clock-frequency = <0>; // from bootloader
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x08000000>; // 128MB at 0
48 };
49
50 localbus@e0005000 {
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
57
58 // CS0 and CS1 are swapped when
59 // booting from nand, but the
60 // addresses are the same.
61 ranges = <0x0 0x0 0xfe000000 0x00800000
62 0x1 0x0 0xe0600000 0x00002000
63 0x2 0x0 0xf0000000 0x00020000
64 0x3 0x0 0xfa000000 0x00008000>;
65
66 flash@0,0 {
67 #address-cells = <1>;
68 #size-cells = <1>;
69 compatible = "cfi-flash";
70 reg = <0x0 0x0 0x800000>;
71 bank-width = <2>;
72 device-width = <1>;
73
74 u-boot@0 {
75 reg = <0x0 0x60000>;
76 read-only;
77 };
78 env@60000 {
79 reg = <0x60000 0x10000>;
80 };
81 env1@70000 {
82 reg = <0x70000 0x10000>;
83 };
84 kernel@80000 {
85 reg = <0x80000 0x200000>;
86 };
87 dtb@280000 {
88 reg = <0x280000 0x10000>;
89 };
90 ramdisk@290000 {
91 reg = <0x290000 0x570000>;
92 };
93 };
94
95 nand@1,0 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 compatible = "fsl,mpc8315-fcm-nand",
99 "fsl,elbc-fcm-nand";
100 reg = <0x1 0x0 0x2000>;
101
102 jffs2@0 {
103 reg = <0x0 0x2000000>;
104 };
105 };
106 };
107
108 immr@e0000000 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 device_type = "soc";
112 compatible = "fsl,mpc8315-immr", "simple-bus";
113 ranges = <0 0xe0000000 0x00100000>;
114 reg = <0xe0000000 0x00000200>;
115 bus-frequency = <0>;
116
117 i2c@3000 {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 cell-index = <0>;
121 compatible = "fsl-i2c";
122 reg = <0x3000 0x100>;
123 interrupts = <14 0x8>;
124 interrupt-parent = <&ipic>;
125 dfsrr;
126 rtc@68 {
127 compatible = "dallas,ds1339";
128 reg = <0x68>;
129 };
130 };
131
132 usb@23000 {
133 compatible = "fsl-usb2-dr";
134 reg = <0x23000 0x1000>;
135 #address-cells = <1>;
136 #size-cells = <0>;
137 interrupt-parent = <&ipic>;
138 interrupts = <38 0x8>;
139 dr_mode = "peripheral";
140 phy_type = "ulpi";
141 };
142
143 enet0: ethernet@24000 {
144 #address-cells = <1>;
145 #size-cells = <1>;
146 ranges = <0x0 0x24000 0x1000>;
147
148 cell-index = <0>;
149 device_type = "network";
150 model = "eTSEC";
151 compatible = "gianfar";
152 reg = <0x24000 0x1000>;
153 local-mac-address = [ 00 00 00 00 00 00 ];
154 interrupts = <32 0x8 33 0x8 34 0x8>;
155 interrupt-parent = <&ipic>;
156 tbi-handle = < &tbi0 >;
157 phy-handle = < &phy2 >;
158 fsl,magic-packet;
159
160 mdio@520 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "fsl,gianfar-mdio";
164 reg = <0x520 0x20>;
165 phy2: ethernet-phy@2 {
166 interrupt-parent = <&ipic>;
167 interrupts = <17 0x8>;
168 reg = <0x2>;
169 device_type = "ethernet-phy";
170 };
171 tbi0: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176 };
177
178 enet1: ethernet@25000 {
179 #address-cells = <1>;
180 #size-cells = <1>;
181 cell-index = <1>;
182 device_type = "network";
183 model = "eTSEC";
184 compatible = "gianfar";
185 reg = <0x25000 0x1000>;
186 ranges = <0x0 0x25000 0x1000>;
187 local-mac-address = [ 00 00 00 00 00 00 ];
188 interrupts = <35 0x8 36 0x8 37 0x8>;
189 interrupt-parent = <&ipic>;
190 tbi-handle = < &tbi1 >;
191 /* Vitesse 7385 isn't on the MDIO bus */
192 fixed-link = <1 1 1000 0 0>;
193 fsl,magic-packet;
194
195 mdio@520 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 compatible = "fsl,gianfar-tbi";
199 reg = <0x520 0x20>;
200
201 tbi1: tbi-phy@11 {
202 reg = <0x11>;
203 device_type = "tbi-phy";
204 };
205 };
206 };
207
208 serial0: serial@4500 {
209 cell-index = <0>;
210 device_type = "serial";
211 compatible = "ns16550";
212 reg = <0x4500 0x100>;
213 clock-frequency = <133333333>;
214 interrupts = <9 0x8>;
215 interrupt-parent = <&ipic>;
216 };
217
218 serial1: serial@4600 {
219 cell-index = <1>;
220 device_type = "serial";
221 compatible = "ns16550";
222 reg = <0x4600 0x100>;
223 clock-frequency = <133333333>;
224 interrupts = <10 0x8>;
225 interrupt-parent = <&ipic>;
226 };
227
228 gpio@c00 {
229 #gpio-cells = <2>;
230 device_type = "gpio";
231 compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
232 reg = <0xc00 0x18>;
233 interrupts = <74 0x8>;
234 interrupt-parent = <&ipic>;
235 gpio-controller;
236 };
237
238 /* IPIC
239 * interrupts cell = <intr #, sense>
240 * sense values match linux IORESOURCE_IRQ_* defines:
241 * sense == 8: Level, low assertion
242 * sense == 2: Edge, high-to-low change
243 */
244 ipic: interrupt-controller@700 {
245 compatible = "fsl,ipic";
246 interrupt-controller;
247 #address-cells = <0>;
248 #interrupt-cells = <2>;
249 reg = <0x700 0x100>;
250 device_type = "ipic";
251 };
252
253 ipic-msi@7c0 {
254 compatible = "fsl,ipic-msi";
255 reg = <0x7c0 0x40>;
256 msi-available-ranges = <0x0 0x100>;
257 interrupts = < 0x43 0x8
258 0x4 0x8
259 0x51 0x8
260 0x52 0x8
261 0x56 0x8
262 0x57 0x8
263 0x58 0x8
264 0x59 0x8 >;
265 interrupt-parent = < &ipic >;
266 };
267
268 };
269
270 pci0: pcie@e0009000 {
271 #address-cells = <3>;
272 #size-cells = <2>;
273 #interrupt-cells = <1>;
274 device_type = "pci";
275 compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
276 reg = <0xe0009000 0x00001000
277 0xb0000000 0x01000000>;
278 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
279 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
280 bus-range = <0 0>;
281 interrupt-map-mask = <0xf800 0 0 7>;
282 interrupt-map = <0 0 0 1 &ipic 1 8
283 0 0 0 2 &ipic 1 8
284 0 0 0 3 &ipic 1 8
285 0 0 0 4 &ipic 1 8>;
286 interrupts = <0x1 0x8>;
287 interrupt-parent = <&ipic>;
288 clock-frequency = <0>;
289
290 pcie@0 {
291 #address-cells = <3>;
292 #size-cells = <2>;
293 device_type = "pci";
294 reg = <0 0 0 0 0>;
295 ranges = <0x02000000 0 0xa0000000
296 0x02000000 0 0xa0000000
297 0 0x10000000
298 0x01000000 0 0x00000000
299 0x01000000 0 0x00000000
300 0 0x00800000>;
301 };
302 };
303};
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index f49a2548c5ff..021763a32c2f 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -9,6 +9,14 @@ menuconfig PPC_83xx
9 9
10if PPC_83xx 10if PPC_83xx
11 11
12config MPC830x_RDB
13 bool "Freescale MPC830x RDB"
14 select DEFAULT_UIMAGE
15 select PPC_MPC831x
16 select FSL_GTM
17 help
18 This option enables support for the MPC8308 RDB board.
19
12config MPC831x_RDB 20config MPC831x_RDB
13 bool "Freescale MPC831x RDB" 21 bool "Freescale MPC831x RDB"
14 select DEFAULT_UIMAGE 22 select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index e139c36572ec..6e8bbbbcfdf8 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -4,6 +4,7 @@
4obj-y := misc.o usb.o 4obj-y := misc.o usb.o
5obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o 5obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o
6obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o 6obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o
7obj-$(CONFIG_MPC830x_RDB) += mpc830x_rdb.o
7obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o 8obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o
8obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o 9obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
9obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o 10obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
diff --git a/arch/powerpc/platforms/83xx/mpc830x_rdb.c b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
new file mode 100644
index 000000000000..ac102ee9abe8
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
@@ -0,0 +1,94 @@
1/*
2 * arch/powerpc/platforms/83xx/mpc830x_rdb.c
3 *
4 * Description: MPC830x RDB board specific routines.
5 * This file is based on mpc831x_rdb.c
6 *
7 * Copyright (C) Freescale Semiconductor, Inc. 2009. All rights reserved.
8 * Copyright (C) 2010. Ilya Yanok, Emcraft Systems, yanok@emcraft.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/pci.h>
17#include <linux/of_platform.h>
18#include <asm/time.h>
19#include <asm/ipic.h>
20#include <asm/udbg.h>
21#include <sysdev/fsl_pci.h>
22#include <sysdev/fsl_soc.h>
23#include "mpc83xx.h"
24
25/*
26 * Setup the architecture
27 */
28static void __init mpc830x_rdb_setup_arch(void)
29{
30#ifdef CONFIG_PCI
31 struct device_node *np;
32#endif
33
34 if (ppc_md.progress)
35 ppc_md.progress("mpc830x_rdb_setup_arch()", 0);
36
37#ifdef CONFIG_PCI
38 for_each_compatible_node(np, "pci", "fsl,mpc8308-pcie")
39 mpc83xx_add_bridge(np);
40#endif
41 mpc831x_usb_cfg();
42}
43
44static void __init mpc830x_rdb_init_IRQ(void)
45{
46 struct device_node *np;
47
48 np = of_find_node_by_type(NULL, "ipic");
49 if (!np)
50 return;
51
52 ipic_init(np, 0);
53
54 /* Initialize the default interrupt mapping priorities,
55 * in case the boot rom changed something on us.
56 */
57 ipic_set_default_priority();
58}
59
60/*
61 * Called very early, MMU is off, device-tree isn't unflattened
62 */
63static int __init mpc830x_rdb_probe(void)
64{
65 unsigned long root = of_get_flat_dt_root();
66
67 return of_flat_dt_is_compatible(root, "MPC8308RDB") ||
68 of_flat_dt_is_compatible(root, "fsl,mpc8308rdb");
69}
70
71static struct of_device_id __initdata of_bus_ids[] = {
72 { .compatible = "simple-bus" },
73 { .compatible = "gianfar" },
74 {},
75};
76
77static int __init declare_of_platform_devices(void)
78{
79 of_platform_bus_probe(NULL, of_bus_ids, NULL);
80 return 0;
81}
82machine_device_initcall(mpc830x_rdb, declare_of_platform_devices);
83
84define_machine(mpc830x_rdb) {
85 .name = "MPC830x RDB",
86 .probe = mpc830x_rdb_probe,
87 .setup_arch = mpc830x_rdb_setup_arch,
88 .init_IRQ = mpc830x_rdb_init_IRQ,
89 .get_irq = ipic_get_irq,
90 .restart = mpc83xx_restart,
91 .time_init = mpc83xx_time_init,
92 .calibrate_decr = generic_calibrate_decr,
93 .progress = udbg_progress,
94};
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