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authorShaohui Xie <b21989@freescale.com>2010-10-13 22:04:02 -0400
committerKumar Gala <galak@kernel.crashing.org>2010-10-14 02:02:38 -0400
commitabd12fe4d1249f6c2c4b34d5ced82f179e6b5d30 (patch)
treee155d2941086b3ef63a9ff8e088c5922476766e4
parent6249a26a4cfe945c0840f222e3669deb9bd41425 (diff)
fsl_rio: Add comments for sRIO registers.
Add some comments to make sRIO registers map better readable. Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c65
1 files changed, 40 insertions, 25 deletions
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 3017532319c8..412763672d23 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -117,44 +117,59 @@ struct rio_atmu_regs {
117}; 117};
118 118
119struct rio_msg_regs { 119struct rio_msg_regs {
120 u32 omr; 120 u32 omr; /* 0xD_3000 - Outbound message 0 mode register */
121 u32 osr; 121 u32 osr; /* 0xD_3004 - Outbound message 0 status register */
122 u32 pad1; 122 u32 pad1;
123 u32 odqdpar; 123 u32 odqdpar; /* 0xD_300C - Outbound message 0 descriptor queue
124 dequeue pointer address register */
124 u32 pad2; 125 u32 pad2;
125 u32 osar; 126 u32 osar; /* 0xD_3014 - Outbound message 0 source address
126 u32 odpr; 127 register */
127 u32 odatr; 128 u32 odpr; /* 0xD_3018 - Outbound message 0 destination port
128 u32 odcr; 129 register */
130 u32 odatr; /* 0xD_301C - Outbound message 0 destination attributes
131 Register*/
132 u32 odcr; /* 0xD_3020 - Outbound message 0 double-word count
133 register */
129 u32 pad3; 134 u32 pad3;
130 u32 odqepar; 135 u32 odqepar; /* 0xD_3028 - Outbound message 0 descriptor queue
136 enqueue pointer address register */
131 u32 pad4[13]; 137 u32 pad4[13];
132 u32 imr; 138 u32 imr; /* 0xD_3060 - Inbound message 0 mode register */
133 u32 isr; 139 u32 isr; /* 0xD_3064 - Inbound message 0 status register */
134 u32 pad5; 140 u32 pad5;
135 u32 ifqdpar; 141 u32 ifqdpar; /* 0xD_306C - Inbound message 0 frame queue dequeue
142 pointer address register*/
136 u32 pad6; 143 u32 pad6;
137 u32 ifqepar; 144 u32 ifqepar; /* 0xD_3074 - Inbound message 0 frame queue enqueue
145 pointer address register */
138 u32 pad7[226]; 146 u32 pad7[226];
139 u32 odmr; 147 u32 odmr; /* 0xD_3400 - Outbound doorbell mode register */
140 u32 odsr; 148 u32 odsr; /* 0xD_3404 - Outbound doorbell status register */
141 u32 res0[4]; 149 u32 res0[4];
142 u32 oddpr; 150 u32 oddpr; /* 0xD_3418 - Outbound doorbell destination port
143 u32 oddatr; 151 register */
152 u32 oddatr; /* 0xD_341c - Outbound doorbell destination attributes
153 register */
144 u32 res1[3]; 154 u32 res1[3];
145 u32 odretcr; 155 u32 odretcr; /* 0xD_342C - Outbound doorbell retry error threshold
156 configuration register */
146 u32 res2[12]; 157 u32 res2[12];
147 u32 dmr; 158 u32 dmr; /* 0xD_3460 - Inbound doorbell mode register */
148 u32 dsr; 159 u32 dsr; /* 0xD_3464 - Inbound doorbell status register */
149 u32 pad8; 160 u32 pad8;
150 u32 dqdpar; 161 u32 dqdpar; /* 0xD_346C - Inbound doorbell queue dequeue Pointer
162 address register */
151 u32 pad9; 163 u32 pad9;
152 u32 dqepar; 164 u32 dqepar; /* 0xD_3474 - Inbound doorbell Queue enqueue pointer
165 address register */
153 u32 pad10[26]; 166 u32 pad10[26];
154 u32 pwmr; 167 u32 pwmr; /* 0xD_34E0 - Inbound port-write mode register */
155 u32 pwsr; 168 u32 pwsr; /* 0xD_34E4 - Inbound port-write status register */
156 u32 epwqbar; 169 u32 epwqbar; /* 0xD_34E8 - Extended Port-Write Queue Base Address
157 u32 pwqbar; 170 register */
171 u32 pwqbar; /* 0xD_34EC - Inbound port-write queue base address
172 register */
158}; 173};
159 174
160struct rio_tx_desc { 175struct rio_tx_desc {