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authorDavid Daney <david.daney@cavium.com>2012-10-16 18:48:10 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-12-12 10:48:47 -0500
commitaa1762f49c81a14d0453e4f67f922e4f155510a3 (patch)
treeba9c7318105db788ededd51e57b568793be0d5fa
parentc17a6554782ad531f4713b33fd6339ba67ef6391 (diff)
MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORT
We need Huge TLBs for HUGETLB_PAGE, or the soon to follow TRANSPARENT_HUGEPAGE. collect this information under a single Kconfig symbol. Signed-off-by: David Daney <david.daney@cavium.com>
-rw-r--r--arch/mips/Kconfig3
-rw-r--r--arch/mips/include/asm/mipsregs.h2
-rw-r--r--arch/mips/include/asm/page.h6
-rw-r--r--arch/mips/include/asm/pgtable-bits.h2
-rw-r--r--arch/mips/include/asm/sparsemem.h2
-rw-r--r--arch/mips/mm/tlb-r4k.c2
-rw-r--r--arch/mips/mm/tlbex.c26
7 files changed, 23 insertions, 20 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index dba9390d37cf..397194a263ce 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1077,6 +1077,9 @@ config SYS_SUPPORTS_HUGETLBFS
1077 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 1077 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
1078 default y 1078 default y
1079 1079
1080config MIPS_HUGE_TLB_SUPPORT
1081 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1082
1080config IRQ_CPU 1083config IRQ_CPU
1081 bool 1084 bool
1082 1085
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index eb742895dcbe..881b980c72d2 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -240,7 +240,7 @@
240#define PM_HUGE_MASK PM_64M 240#define PM_HUGE_MASK PM_64M
241#elif defined(CONFIG_PAGE_SIZE_64KB) 241#elif defined(CONFIG_PAGE_SIZE_64KB)
242#define PM_HUGE_MASK PM_256M 242#define PM_HUGE_MASK PM_256M
243#elif defined(CONFIG_HUGETLB_PAGE) 243#elif defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
244#error Bad page size configuration for hugetlbfs! 244#error Bad page size configuration for hugetlbfs!
245#endif 245#endif
246 246
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index c48a7f0bcf3c..31ab10f02bad 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -33,17 +33,17 @@
33#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) 33#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
34#define PAGE_MASK (~(PAGE_SIZE - 1)) 34#define PAGE_MASK (~(PAGE_SIZE - 1))
35 35
36#ifdef CONFIG_HUGETLB_PAGE 36#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
37#define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3) 37#define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
38#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) 38#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
39#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 39#define HPAGE_MASK (~(HPAGE_SIZE - 1))
40#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 40#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
41#else /* !CONFIG_HUGETLB_PAGE */ 41#else /* !CONFIG_MIPS_HUGE_TLB_SUPPORT */
42#define HPAGE_SHIFT ({BUILD_BUG(); 0; }) 42#define HPAGE_SHIFT ({BUILD_BUG(); 0; })
43#define HPAGE_SIZE ({BUILD_BUG(); 0; }) 43#define HPAGE_SIZE ({BUILD_BUG(); 0; })
44#define HPAGE_MASK ({BUILD_BUG(); 0; }) 44#define HPAGE_MASK ({BUILD_BUG(); 0; })
45#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; }) 45#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; })
46#endif /* CONFIG_HUGETLB_PAGE */ 46#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
47 47
48#ifndef __ASSEMBLY__ 48#ifndef __ASSEMBLY__
49 49
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index f8b8fb358412..1e2642c360a8 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -128,7 +128,7 @@
128#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) 128#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
129#define _PAGE_FILE (_PAGE_MODIFIED) 129#define _PAGE_FILE (_PAGE_MODIFIED)
130 130
131#ifdef CONFIG_HUGETLB_PAGE 131#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
132/* huge tlb page */ 132/* huge tlb page */
133#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1) 133#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
134#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) 134#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
diff --git a/arch/mips/include/asm/sparsemem.h b/arch/mips/include/asm/sparsemem.h
index 4461198361c9..65900dab3ad3 100644
--- a/arch/mips/include/asm/sparsemem.h
+++ b/arch/mips/include/asm/sparsemem.h
@@ -6,7 +6,7 @@
6 * SECTION_SIZE_BITS 2^N: how big each section will be 6 * SECTION_SIZE_BITS 2^N: how big each section will be
7 * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space 7 * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space
8 */ 8 */
9#if defined(CONFIG_HUGETLB_PAGE) && defined(CONFIG_PAGE_SIZE_64KB) 9#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) && defined(CONFIG_PAGE_SIZE_64KB)
10# define SECTION_SIZE_BITS 29 10# define SECTION_SIZE_BITS 29
11#else 11#else
12# define SECTION_SIZE_BITS 28 12# define SECTION_SIZE_BITS 28
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 4b9b935a070e..936165d167e1 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -305,7 +305,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
305 pudp = pud_offset(pgdp, address); 305 pudp = pud_offset(pgdp, address);
306 pmdp = pmd_offset(pudp, address); 306 pmdp = pmd_offset(pudp, address);
307 idx = read_c0_index(); 307 idx = read_c0_index();
308#ifdef CONFIG_HUGETLB_PAGE 308#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
309 /* this could be a huge page */ 309 /* this could be a huge page */
310 if (pmd_huge(*pmdp)) { 310 if (pmd_huge(*pmdp)) {
311 unsigned long lo; 311 unsigned long lo;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index a36b4955d4ed..98b2b732005a 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -158,7 +158,7 @@ enum label_id {
158 label_smp_pgtable_change, 158 label_smp_pgtable_change,
159 label_r3000_write_probe_fail, 159 label_r3000_write_probe_fail,
160 label_large_segbits_fault, 160 label_large_segbits_fault,
161#ifdef CONFIG_HUGETLB_PAGE 161#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
162 label_tlb_huge_update, 162 label_tlb_huge_update,
163#endif 163#endif
164}; 164};
@@ -177,7 +177,7 @@ UASM_L_LA(_nopage_tlbm)
177UASM_L_LA(_smp_pgtable_change) 177UASM_L_LA(_smp_pgtable_change)
178UASM_L_LA(_r3000_write_probe_fail) 178UASM_L_LA(_r3000_write_probe_fail)
179UASM_L_LA(_large_segbits_fault) 179UASM_L_LA(_large_segbits_fault)
180#ifdef CONFIG_HUGETLB_PAGE 180#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
181UASM_L_LA(_tlb_huge_update) 181UASM_L_LA(_tlb_huge_update)
182#endif 182#endif
183 183
@@ -666,7 +666,7 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
666 } 666 }
667} 667}
668 668
669#ifdef CONFIG_HUGETLB_PAGE 669#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
670 670
671static __cpuinit void build_restore_pagemask(u32 **p, 671static __cpuinit void build_restore_pagemask(u32 **p,
672 struct uasm_reloc **r, 672 struct uasm_reloc **r,
@@ -792,7 +792,7 @@ static __cpuinit void build_huge_handler_tail(u32 **p,
792 build_huge_update_entries(p, pte, ptr); 792 build_huge_update_entries(p, pte, ptr);
793 build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0); 793 build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0);
794} 794}
795#endif /* CONFIG_HUGETLB_PAGE */ 795#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
796 796
797#ifdef CONFIG_64BIT 797#ifdef CONFIG_64BIT
798/* 798/*
@@ -1237,7 +1237,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
1237 /* Adjust the context during the load latency. */ 1237 /* Adjust the context during the load latency. */
1238 build_adjust_context(p, tmp); 1238 build_adjust_context(p, tmp);
1239 1239
1240#ifdef CONFIG_HUGETLB_PAGE 1240#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1241 uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update); 1241 uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update);
1242 /* 1242 /*
1243 * The in the LWX case we don't want to do the load in the 1243 * The in the LWX case we don't want to do the load in the
@@ -1246,7 +1246,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
1246 */ 1246 */
1247 if (use_lwx_insns()) 1247 if (use_lwx_insns())
1248 uasm_i_nop(p); 1248 uasm_i_nop(p);
1249#endif /* CONFIG_HUGETLB_PAGE */ 1249#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
1250 1250
1251 1251
1252 /* build_update_entries */ 1252 /* build_update_entries */
@@ -1349,7 +1349,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1349 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ 1349 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
1350#endif 1350#endif
1351 1351
1352#ifdef CONFIG_HUGETLB_PAGE 1352#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1353 build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update); 1353 build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
1354#endif 1354#endif
1355 1355
@@ -1359,7 +1359,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1359 uasm_l_leave(&l, p); 1359 uasm_l_leave(&l, p);
1360 uasm_i_eret(&p); /* return from trap */ 1360 uasm_i_eret(&p); /* return from trap */
1361 } 1361 }
1362#ifdef CONFIG_HUGETLB_PAGE 1362#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1363 uasm_l_tlb_huge_update(&l, p); 1363 uasm_l_tlb_huge_update(&l, p);
1364 build_huge_update_entries(&p, htlb_info.huge_pte, K1); 1364 build_huge_update_entries(&p, htlb_info.huge_pte, K1);
1365 build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random, 1365 build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
@@ -1404,7 +1404,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1404 uasm_copy_handler(relocs, labels, tlb_handler, p, f); 1404 uasm_copy_handler(relocs, labels, tlb_handler, p, f);
1405 final_len = p - tlb_handler; 1405 final_len = p - tlb_handler;
1406 } else { 1406 } else {
1407#if defined(CONFIG_HUGETLB_PAGE) 1407#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1408 const enum label_id ls = label_tlb_huge_update; 1408 const enum label_id ls = label_tlb_huge_update;
1409#else 1409#else
1410 const enum label_id ls = label_vmalloc; 1410 const enum label_id ls = label_vmalloc;
@@ -1880,7 +1880,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1880 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */ 1880 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
1881#endif 1881#endif
1882 1882
1883#ifdef CONFIG_HUGETLB_PAGE 1883#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1884 /* 1884 /*
1885 * For huge tlb entries, pmd doesn't contain an address but 1885 * For huge tlb entries, pmd doesn't contain an address but
1886 * instead contains the tlb pte. Check the PAGE_HUGE bit and 1886 * instead contains the tlb pte. Check the PAGE_HUGE bit and
@@ -1996,7 +1996,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1996 build_make_valid(&p, &r, wr.r1, wr.r2); 1996 build_make_valid(&p, &r, wr.r1, wr.r2);
1997 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2); 1997 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1998 1998
1999#ifdef CONFIG_HUGETLB_PAGE 1999#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
2000 /* 2000 /*
2001 * This is the entry point when build_r4000_tlbchange_handler_head 2001 * This is the entry point when build_r4000_tlbchange_handler_head
2002 * spots a huge page. 2002 * spots a huge page.
@@ -2089,7 +2089,7 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
2089 build_make_write(&p, &r, wr.r1, wr.r2); 2089 build_make_write(&p, &r, wr.r1, wr.r2);
2090 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2); 2090 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
2091 2091
2092#ifdef CONFIG_HUGETLB_PAGE 2092#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
2093 /* 2093 /*
2094 * This is the entry point when 2094 * This is the entry point when
2095 * build_r4000_tlbchange_handler_head spots a huge page. 2095 * build_r4000_tlbchange_handler_head spots a huge page.
@@ -2137,7 +2137,7 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
2137 build_make_write(&p, &r, wr.r1, wr.r2); 2137 build_make_write(&p, &r, wr.r1, wr.r2);
2138 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2); 2138 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
2139 2139
2140#ifdef CONFIG_HUGETLB_PAGE 2140#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
2141 /* 2141 /*
2142 * This is the entry point when 2142 * This is the entry point when
2143 * build_r4000_tlbchange_handler_head spots a huge page. 2143 * build_r4000_tlbchange_handler_head spots a huge page.