aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDave Martin <dave.martin@linaro.org>2012-11-30 06:56:05 -0500
committerWill Deacon <will.deacon@arm.com>2013-01-10 16:08:22 -0500
commita4a12e008e292a81d312659529b71be2026ab355 (patch)
tree184dad4b209335a554ea5dc9d25c6e097f061d66
parent9931faca02c604c22335f5a935a501bb2ace6e20 (diff)
ARM: virt: Avoid bx instruction for compatibility with <=ARMv4
Non-T variants of ARMv4 do not support the bx instruction. However, __hyp_stub_install is always called from the same instruction set used to build the bulk of the kernel, so bx should not be necessary. This patch uses the traditional "mov pc" instead of bx. Cc: <stable@vger.kernel.org> Signed-off-by: Dave Martin <dave.martin@linaro.org> [will: fixed up remaining bx instruction] Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--arch/arm/kernel/hyp-stub.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index 65b2417aebce..3c60256d3927 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary)
99 * immediately. 99 * immediately.
100 */ 100 */
101 compare_cpu_mode_with_primary r4, r5, r6, r7 101 compare_cpu_mode_with_primary r4, r5, r6, r7
102 bxne lr 102 movne pc, lr
103 103
104 /* 104 /*
105 * Once we have given up on one CPU, we do not try to install the 105 * Once we have given up on one CPU, we do not try to install the
@@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary)
111 */ 111 */
112 112
113 cmp r4, #HYP_MODE 113 cmp r4, #HYP_MODE
114 bxne lr @ give up if the CPU is not in HYP mode 114 movne pc, lr @ give up if the CPU is not in HYP mode
115 115
116/* 116/*
117 * Configure HSCTLR to set correct exception endianness/instruction set 117 * Configure HSCTLR to set correct exception endianness/instruction set
@@ -200,7 +200,7 @@ ENDPROC(__hyp_get_vectors)
200 @ fall through 200 @ fall through
201ENTRY(__hyp_set_vectors) 201ENTRY(__hyp_set_vectors)
202 __HVC(0) 202 __HVC(0)
203 bx lr 203 mov pc, lr
204ENDPROC(__hyp_set_vectors) 204ENDPROC(__hyp_set_vectors)
205 205
206#ifndef ZIMAGE 206#ifndef ZIMAGE