ARM: mach-shmobile: Use 0x2200 as INTCS_VECT_BASE

Change INTCS_VECT_BASE from 0x3400 to 0x2200.

The old value 0x3400 gave the INTCA and INTCS interrupt
conrollers separated spaces, but required ARM support
for more than 512 NR_IRQS which is not in place at this
point.

The value 0x2200 will make some of the INTCA interrupts
make use of empty INTCS areas. This is a bit more error
prone but works fine as a workaround for G3, G3 and AP4.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index 51b4a6ab6c60..e881797648a9 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -9,7 +9,7 @@
 #define irq2evt(irq)            (((irq) + 16) << 5)
 
 /* INTCS */
-#define INTCS_VECT_BASE         0x3400
+#define INTCS_VECT_BASE         0x2200
 #define INTCS_VECT(n, vect)     INTC_VECT((n), INTCS_VECT_BASE + (vect))
 #define intcs_evt2irq(evt)      evt2irq(INTCS_VECT_BASE + (evt))