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authorMagnus Damm <magnus.damm@gmail.com>2008-06-09 19:33:53 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-06-11 21:58:07 -0400
commit9961530a5f017afae6a928672840617103bea118 (patch)
treefd3ae0c4a87179f8eb1fc9de77c144bd400811b2
parentf0000920696661cbbe2393d93a6f4e1b8325d531 (diff)
smc911x: fix 16-bit I/O operations
This patch fixes the following issues related to 16-bit support: - Remove unused 16-bit PXA DMA implementation. - Remove unused SMC_inw() and SMC_outw() functions. - Fix 16-bit SMC_outl to use writew() instead of writel(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Cc: Jeff Garzik <jeff@garzik.org> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
-rw-r--r--drivers/net/smc911x.h66
1 files changed, 3 insertions, 63 deletions
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index f4965585ba16..2b06e5087e36 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -50,19 +50,16 @@
50 */ 50 */
51 51
52#if SMC_USE_16BIT 52#if SMC_USE_16BIT
53#define SMC_inw(a, r) readw((a) + (r)) 53#define SMC_inl(a, r) (readw((a) + (r)) & 0xFFFF) + (readw((a) + (r) + 2) << 16))
54#define SMC_inl(a, r) ((SMC_inw(a, r) & 0xFFFF)+(SMC_inw(a+2, r)<<16))
55#define SMC_outw(v, a, r) writew(v, (a) + (r))
56#define SMC_outl(v, a, r) \ 54#define SMC_outl(v, a, r) \
57 do{ \ 55 do{ \
58 writel(v & 0xFFFF, (a) + (r)); \ 56 writew(v & 0xFFFF, (a) + (r)); \
59 writel(v >> 16, (a) + (r) + 2); \ 57 writew(v >> 16, (a) + (r) + 2); \
60 } while (0) 58 } while (0)
61#define SMC_insl(a, r, p, l) readsw((short*)((a) + (r)), p, l*2) 59#define SMC_insl(a, r, p, l) readsw((short*)((a) + (r)), p, l*2)
62#define SMC_outsl(a, r, p, l) writesw((short*)((a) + (r)), p, l*2) 60#define SMC_outsl(a, r, p, l) writesw((short*)((a) + (r)), p, l*2)
63 61
64#elif SMC_USE_32BIT 62#elif SMC_USE_32BIT
65#define SMC_inw(a, r) readw((a) + (r))
66#define SMC_inl(a, r) readl((a) + (r)) 63#define SMC_inl(a, r) readl((a) + (r))
67#define SMC_outl(v, a, r) writel(v, (a) + (r)) 64#define SMC_outl(v, a, r) writel(v, (a) + (r))
68#define SMC_insl(a, r, p, l) readsl((int*)((a) + (r)), p, l) 65#define SMC_insl(a, r, p, l) readsl((int*)((a) + (r)), p, l)
@@ -132,34 +129,6 @@ smc_pxa_dma_insl(struct device *dev, u_long ioaddr, u_long physaddr,
132} 129}
133#endif 130#endif
134 131
135#ifdef SMC_insw
136#undef SMC_insw
137#define SMC_insw(a, r, p, l) \
138 smc_pxa_dma_insw(lp->dev, a, lp->physaddr, r, lp->rxdma, p, l)
139
140static inline void
141smc_pxa_dma_insw(struct device *dev, u_long ioaddr, u_long physaddr,
142 int reg, int dma, u_char *buf, int len)
143{
144 /* 64 bit alignment is required for memory to memory DMA */
145 while ((long)buf & 6) {
146 *((u16 *)buf) = SMC_inw(ioaddr, reg);
147 buf += 2;
148 len--;
149 }
150
151 len *= 2;
152 rx_dmabuf = dma_map_single(dev, buf, len, DMA_FROM_DEVICE);
153 rx_dmalen = len;
154 DCSR(dma) = DCSR_NODESC;
155 DTADR(dma) = rx_dmabuf;
156 DSADR(dma) = physaddr + reg;
157 DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
158 DCMD_WIDTH2 | DCMD_ENDIRQEN | (DCMD_LENGTH & rx_dmalen));
159 DCSR(dma) = DCSR_NODESC | DCSR_RUN;
160}
161#endif
162
163#ifdef SMC_outsl 132#ifdef SMC_outsl
164#undef SMC_outsl 133#undef SMC_outsl
165#define SMC_outsl(a, r, p, l) \ 134#define SMC_outsl(a, r, p, l) \
@@ -187,35 +156,6 @@ smc_pxa_dma_outsl(struct device *dev, u_long ioaddr, u_long physaddr,
187 DCSR(dma) = DCSR_NODESC | DCSR_RUN; 156 DCSR(dma) = DCSR_NODESC | DCSR_RUN;
188} 157}
189#endif 158#endif
190
191#ifdef SMC_outsw
192#undef SMC_outsw
193#define SMC_outsw(a, r, p, l) \
194 smc_pxa_dma_outsw(lp->dev, a, lp->physaddr, r, lp->txdma, p, l)
195
196static inline void
197smc_pxa_dma_outsw(struct device *dev, u_long ioaddr, u_long physaddr,
198 int reg, int dma, u_char *buf, int len)
199{
200 /* 64 bit alignment is required for memory to memory DMA */
201 while ((long)buf & 6) {
202 SMC_outw(*((u16 *)buf), ioaddr, reg);
203 buf += 2;
204 len--;
205 }
206
207 len *= 2;
208 tx_dmabuf = dma_map_single(dev, buf, len, DMA_TO_DEVICE);
209 tx_dmalen = len;
210 DCSR(dma) = DCSR_NODESC;
211 DSADR(dma) = tx_dmabuf;
212 DTADR(dma) = physaddr + reg;
213 DCMD(dma) = (DCMD_INCSRCADDR | DCMD_BURST32 |
214 DCMD_WIDTH2 | DCMD_ENDIRQEN | (DCMD_LENGTH & tx_dmalen));
215 DCSR(dma) = DCSR_NODESC | DCSR_RUN;
216}
217#endif
218
219#endif /* SMC_USE_PXA_DMA */ 159#endif /* SMC_USE_PXA_DMA */
220 160
221 161