diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 03:58:22 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 04:27:44 -0500 |
commit | 957c461e82f7a8ddcd7fb25c01c43917f64fde33 (patch) | |
tree | d73bad9ff52640672baf97c38ca226a3c0931ccc | |
parent | 3c0fa647159895139d4a25f3d87b90af26789a5c (diff) |
ARM: S5PV310: Tidy init+disable clock usage and s3c24xx_register_clocks cleanup
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r-- | arch/arm/mach-s5pv310/clock.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 58c9d33f36fe..fdd477696b9a 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c | |||
@@ -384,7 +384,7 @@ static struct clksrc_clk clk_sclk_vpll = { | |||
384 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, | 384 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, |
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct clk init_clocks_disable[] = { | 387 | static struct clk init_clocks_off[] = { |
388 | { | 388 | { |
389 | .name = "timers", | 389 | .name = "timers", |
390 | .id = -1, | 390 | .id = -1, |
@@ -1061,13 +1061,9 @@ static struct clk *clks[] __initdata = { | |||
1061 | 1061 | ||
1062 | void __init s5pv310_register_clocks(void) | 1062 | void __init s5pv310_register_clocks(void) |
1063 | { | 1063 | { |
1064 | struct clk *clkp; | ||
1065 | int ret; | ||
1066 | int ptr; | 1064 | int ptr; |
1067 | 1065 | ||
1068 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 1066 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
1069 | if (ret > 0) | ||
1070 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
1071 | 1067 | ||
1072 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1068 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1073 | s3c_register_clksrc(sysclks[ptr], 1); | 1069 | s3c_register_clksrc(sysclks[ptr], 1); |
@@ -1075,15 +1071,8 @@ void __init s5pv310_register_clocks(void) | |||
1075 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1071 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1076 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1072 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1077 | 1073 | ||
1078 | clkp = init_clocks_disable; | 1074 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1079 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 1075 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1080 | ret = s3c24xx_register_clock(clkp); | ||
1081 | if (ret < 0) { | ||
1082 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
1083 | clkp->name, ret); | ||
1084 | } | ||
1085 | (clkp->enable)(clkp, 0); | ||
1086 | } | ||
1087 | 1076 | ||
1088 | s3c_pwmclk_init(); | 1077 | s3c_pwmclk_init(); |
1089 | } | 1078 | } |