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authorLinus Torvalds <torvalds@linux-foundation.org>2010-11-08 13:54:23 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-11-08 13:54:23 -0500
commit934648f0449fae00946f55d64cd998bb5587fa1f (patch)
treea8c5e55cfbfff34497f6ec873ea31725fdb849ab
parent8be5814c45d1412c6c16cf9be73e507f5fe53c1b (diff)
parent65670a1b75874cf36c81456f2fb1e5ef6c6c0a55 (diff)
Merge branch 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: mmc: sh_mmcif: Convert extern inline to static inline. ARM: mach-shmobile: Allow GPIO chips to register IRQ mappings. ARM: mach-shmobile: fix sh7372 after a recent clock framework rework ARM: mach-shmobile: include drivers/sh/Kconfig ARM: mach-shmobile: ap4evb: Add HDMI sound support ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support ARM: shmobile: remove sh_timer_config clk member
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c46
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c102
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h2
-rw-r--r--drivers/clocksource/sh_cmt.c10
-rw-r--r--drivers/clocksource/sh_mtu2.c10
-rw-r--r--drivers/clocksource/sh_tmu.c10
-rw-r--r--include/linux/mmc/sh_mmcif.h18
-rw-r--r--include/linux/sh_timer.h1
10 files changed, 171 insertions, 34 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 54b479c35ee0..51dcd59eda6a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -116,4 +116,6 @@ endmenu
116config SH_CLK_CPG 116config SH_CLK_CPG
117 bool 117 bool
118 118
119source "drivers/sh/Kconfig"
120
119endif 121endif
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 46ca4d4abf91..32d9e2816e56 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -565,12 +565,50 @@ static struct platform_device *qhd_devices[] __initdata = {
565 565
566/* FSI */ 566/* FSI */
567#define IRQ_FSI evt2irq(0x1840) 567#define IRQ_FSI evt2irq(0x1840)
568
569static int fsi_set_rate(int is_porta, int rate)
570{
571 struct clk *fsib_clk;
572 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
573 int ret;
574
575 /* set_rate is not needed if port A */
576 if (is_porta)
577 return 0;
578
579 fsib_clk = clk_get(NULL, "fsib_clk");
580 if (IS_ERR(fsib_clk))
581 return -EINVAL;
582
583 switch (rate) {
584 case 48000:
585 clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000));
586 clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000));
587 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
588 break;
589 default:
590 pr_err("unsupported rate in FSI2 port B\n");
591 ret = -EINVAL;
592 break;
593 }
594
595 clk_put(fsib_clk);
596
597 return ret;
598}
599
568static struct sh_fsi_platform_info fsi_info = { 600static struct sh_fsi_platform_info fsi_info = {
569 .porta_flags = SH_FSI_BRS_INV | 601 .porta_flags = SH_FSI_BRS_INV |
570 SH_FSI_OUT_SLAVE_MODE | 602 SH_FSI_OUT_SLAVE_MODE |
571 SH_FSI_IN_SLAVE_MODE | 603 SH_FSI_IN_SLAVE_MODE |
572 SH_FSI_OFMT(PCM) | 604 SH_FSI_OFMT(PCM) |
573 SH_FSI_IFMT(PCM), 605 SH_FSI_IFMT(PCM),
606
607 .portb_flags = SH_FSI_BRS_INV |
608 SH_FSI_BRM_INV |
609 SH_FSI_LRS_INV |
610 SH_FSI_OFMT(SPDIF),
611 .set_rate = fsi_set_rate,
574}; 612};
575 613
576static struct resource fsi_resources[] = { 614static struct resource fsi_resources[] = {
@@ -634,6 +672,7 @@ static struct platform_device lcdc1_device = {
634static struct sh_mobile_hdmi_info hdmi_info = { 672static struct sh_mobile_hdmi_info hdmi_info = {
635 .lcd_chan = &sh_mobile_lcdc1_info.ch[0], 673 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
636 .lcd_dev = &lcdc1_device.dev, 674 .lcd_dev = &lcdc1_device.dev,
675 .flags = HDMI_SND_SRC_SPDIF,
637}; 676};
638 677
639static struct resource hdmi_resources[] = { 678static struct resource hdmi_resources[] = {
@@ -992,6 +1031,7 @@ static void __init ap4evb_map_io(void)
992 1031
993#define GPIO_PORT9CR 0xE6051009 1032#define GPIO_PORT9CR 0xE6051009
994#define GPIO_PORT10CR 0xE605100A 1033#define GPIO_PORT10CR 0xE605100A
1034#define USCCR1 0xE6058144
995static void __init ap4evb_init(void) 1035static void __init ap4evb_init(void)
996{ 1036{
997 u32 srcr4; 1037 u32 srcr4;
@@ -1062,7 +1102,7 @@ static void __init ap4evb_init(void)
1062 /* setup USB phy */ 1102 /* setup USB phy */
1063 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ 1103 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
1064 1104
1065 /* enable FSI2 */ 1105 /* enable FSI2 port A (ak4643) */
1066 gpio_request(GPIO_FN_FSIAIBT, NULL); 1106 gpio_request(GPIO_FN_FSIAIBT, NULL);
1067 gpio_request(GPIO_FN_FSIAILR, NULL); 1107 gpio_request(GPIO_FN_FSIAILR, NULL);
1068 gpio_request(GPIO_FN_FSIAISLD, NULL); 1108 gpio_request(GPIO_FN_FSIAISLD, NULL);
@@ -1079,6 +1119,10 @@ static void __init ap4evb_init(void)
1079 gpio_request(GPIO_PORT41, NULL); 1119 gpio_request(GPIO_PORT41, NULL);
1080 gpio_direction_input(GPIO_PORT41); 1120 gpio_direction_input(GPIO_PORT41);
1081 1121
1122 /* setup FSI2 port B (HDMI) */
1123 gpio_request(GPIO_FN_FSIBCK, NULL);
1124 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1125
1082 /* set SPU2 clock to 119.6 MHz */ 1126 /* set SPU2 clock to 119.6 MHz */
1083 clk = clk_get(NULL, "spu_clk"); 1127 clk = clk_get(NULL, "spu_clk");
1084 if (!IS_ERR(clk)) { 1128 if (!IS_ERR(clk)) {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 8565aefa21fd..7db31e6c6bf2 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -50,6 +50,9 @@
50#define SMSTPCR3 0xe615013c 50#define SMSTPCR3 0xe615013c
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 0xe6150140
52 52
53#define FSIDIVA 0xFE1F8000
54#define FSIDIVB 0xFE1F8008
55
53/* Platforms must set frequency on their DV_CLKI pin */ 56/* Platforms must set frequency on their DV_CLKI pin */
54struct clk sh7372_dv_clki_clk = { 57struct clk sh7372_dv_clki_clk = {
55}; 58};
@@ -288,6 +291,7 @@ struct clk sh7372_pllc2_clk = {
288 .ops = &pllc2_clk_ops, 291 .ops = &pllc2_clk_ops,
289 .parent = &extal1_div2_clk, 292 .parent = &extal1_div2_clk,
290 .freq_table = pllc2_freq_table, 293 .freq_table = pllc2_freq_table,
294 .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1,
291 .parent_table = pllc2_parent, 295 .parent_table = pllc2_parent,
292 .parent_num = ARRAY_SIZE(pllc2_parent), 296 .parent_num = ARRAY_SIZE(pllc2_parent),
293}; 297};
@@ -417,6 +421,101 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
417 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2), 421 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
418}; 422};
419 423
424/* FSI DIV */
425static unsigned long fsidiv_recalc(struct clk *clk)
426{
427 unsigned long value;
428
429 value = __raw_readl(clk->mapping->base);
430
431 if ((value & 0x3) != 0x3)
432 return 0;
433
434 value >>= 16;
435 if (value < 2)
436 return 0;
437
438 return clk->parent->rate / value;
439}
440
441static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
442{
443 return clk_rate_div_range_round(clk, 2, 0xffff, rate);
444}
445
446static void fsidiv_disable(struct clk *clk)
447{
448 __raw_writel(0, clk->mapping->base);
449}
450
451static int fsidiv_enable(struct clk *clk)
452{
453 unsigned long value;
454
455 value = __raw_readl(clk->mapping->base) >> 16;
456 if (value < 2) {
457 fsidiv_disable(clk);
458 return -ENOENT;
459 }
460
461 __raw_writel((value << 16) | 0x3, clk->mapping->base);
462
463 return 0;
464}
465
466static int fsidiv_set_rate(struct clk *clk,
467 unsigned long rate, int algo_id)
468{
469 int idx;
470
471 if (clk->parent->rate == rate) {
472 fsidiv_disable(clk);
473 return 0;
474 }
475
476 idx = (clk->parent->rate / rate) & 0xffff;
477 if (idx < 2)
478 return -ENOENT;
479
480 __raw_writel(idx << 16, clk->mapping->base);
481 return fsidiv_enable(clk);
482}
483
484static struct clk_ops fsidiv_clk_ops = {
485 .recalc = fsidiv_recalc,
486 .round_rate = fsidiv_round_rate,
487 .set_rate = fsidiv_set_rate,
488 .enable = fsidiv_enable,
489 .disable = fsidiv_disable,
490};
491
492static struct clk_mapping sh7372_fsidiva_clk_mapping = {
493 .phys = FSIDIVA,
494 .len = 8,
495};
496
497struct clk sh7372_fsidiva_clk = {
498 .ops = &fsidiv_clk_ops,
499 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
500 .mapping = &sh7372_fsidiva_clk_mapping,
501};
502
503static struct clk_mapping sh7372_fsidivb_clk_mapping = {
504 .phys = FSIDIVB,
505 .len = 8,
506};
507
508struct clk sh7372_fsidivb_clk = {
509 .ops = &fsidiv_clk_ops,
510 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
511 .mapping = &sh7372_fsidivb_clk_mapping,
512};
513
514static struct clk *late_main_clks[] = {
515 &sh7372_fsidiva_clk,
516 &sh7372_fsidivb_clk,
517};
518
420enum { MSTP001, 519enum { MSTP001,
421 MSTP131, MSTP130, 520 MSTP131, MSTP130,
422 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, 521 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
@@ -585,6 +684,9 @@ void __init sh7372_clock_init(void)
585 if (!ret) 684 if (!ret)
586 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 685 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
587 686
687 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
688 ret = clk_register(late_main_clks[k]);
689
588 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 690 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
589 691
590 if (!ret) 692 if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 5bc6bd444d72..2b1bb9e43dda 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int gpio_cansleep(unsigned gpio)
35 35
36static inline int gpio_to_irq(unsigned gpio) 36static inline int gpio_to_irq(unsigned gpio)
37{ 37{
38 return -ENOSYS; 38 return __gpio_to_irq(gpio);
39} 39}
40 40
41static inline int irq_to_gpio(unsigned int irq) 41static inline int irq_to_gpio(unsigned int irq)
42{ 42{
43 return -EINVAL; 43 return -ENOSYS;
44} 44}
45 45
46#endif /* CONFIG_GPIOLIB */ 46#endif /* CONFIG_GPIOLIB */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 147775a94bce..e4f9004e7103 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -464,5 +464,7 @@ extern struct clk sh7372_dv_clki_div2_clk;
464extern struct clk sh7372_pllc2_clk; 464extern struct clk sh7372_pllc2_clk;
465extern struct clk sh7372_fsiack_clk; 465extern struct clk sh7372_fsiack_clk;
466extern struct clk sh7372_fsibck_clk; 466extern struct clk sh7372_fsibck_clk;
467extern struct clk sh7372_fsidiva_clk;
468extern struct clk sh7372_fsidivb_clk;
467 469
468#endif /* __ASM_SH7372_H__ */ 470#endif /* __ASM_SH7372_H__ */
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index a44611652282..d68d3aa1814b 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -616,13 +616,9 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
616 /* get hold of clock */ 616 /* get hold of clock */
617 p->clk = clk_get(&p->pdev->dev, "cmt_fck"); 617 p->clk = clk_get(&p->pdev->dev, "cmt_fck");
618 if (IS_ERR(p->clk)) { 618 if (IS_ERR(p->clk)) {
619 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); 619 dev_err(&p->pdev->dev, "cannot get clock\n");
620 p->clk = clk_get(&p->pdev->dev, cfg->clk); 620 ret = PTR_ERR(p->clk);
621 if (IS_ERR(p->clk)) { 621 goto err1;
622 dev_err(&p->pdev->dev, "cannot get clock\n");
623 ret = PTR_ERR(p->clk);
624 goto err1;
625 }
626 } 622 }
627 623
628 if (resource_size(res) == 6) { 624 if (resource_size(res) == 6) {
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index ef7a5be8a09f..40630cb98237 100644
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -287,13 +287,9 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
287 /* get hold of clock */ 287 /* get hold of clock */
288 p->clk = clk_get(&p->pdev->dev, "mtu2_fck"); 288 p->clk = clk_get(&p->pdev->dev, "mtu2_fck");
289 if (IS_ERR(p->clk)) { 289 if (IS_ERR(p->clk)) {
290 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); 290 dev_err(&p->pdev->dev, "cannot get clock\n");
291 p->clk = clk_get(&p->pdev->dev, cfg->clk); 291 ret = PTR_ERR(p->clk);
292 if (IS_ERR(p->clk)) { 292 goto err1;
293 dev_err(&p->pdev->dev, "cannot get clock\n");
294 ret = PTR_ERR(p->clk);
295 goto err1;
296 }
297 } 293 }
298 294
299 return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev), 295 return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index de715901b82a..36aba9923060 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -393,13 +393,9 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
393 /* get hold of clock */ 393 /* get hold of clock */
394 p->clk = clk_get(&p->pdev->dev, "tmu_fck"); 394 p->clk = clk_get(&p->pdev->dev, "tmu_fck");
395 if (IS_ERR(p->clk)) { 395 if (IS_ERR(p->clk)) {
396 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); 396 dev_err(&p->pdev->dev, "cannot get clock\n");
397 p->clk = clk_get(&p->pdev->dev, cfg->clk); 397 ret = PTR_ERR(p->clk);
398 if (IS_ERR(p->clk)) { 398 goto err1;
399 dev_err(&p->pdev->dev, "cannot get clock\n");
400 ret = PTR_ERR(p->clk);
401 goto err1;
402 }
403 } 399 }
404 400
405 return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev), 401 return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index d19e2114fd86..5c99da1078aa 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -59,19 +59,19 @@ struct sh_mmcif_plat_data {
59#define MMCIF_CE_HOST_STS2 0x0000004C 59#define MMCIF_CE_HOST_STS2 0x0000004C
60#define MMCIF_CE_VERSION 0x0000007C 60#define MMCIF_CE_VERSION 0x0000007C
61 61
62extern inline u32 sh_mmcif_readl(void __iomem *addr, int reg) 62static inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
63{ 63{
64 return readl(addr + reg); 64 return readl(addr + reg);
65} 65}
66 66
67extern inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val) 67static inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
68{ 68{
69 writel(val, addr + reg); 69 writel(val, addr + reg);
70} 70}
71 71
72#define SH_MMCIF_BBS 512 /* boot block size */ 72#define SH_MMCIF_BBS 512 /* boot block size */
73 73
74extern inline void sh_mmcif_boot_cmd_send(void __iomem *base, 74static inline void sh_mmcif_boot_cmd_send(void __iomem *base,
75 unsigned long cmd, unsigned long arg) 75 unsigned long cmd, unsigned long arg)
76{ 76{
77 sh_mmcif_writel(base, MMCIF_CE_INT, 0); 77 sh_mmcif_writel(base, MMCIF_CE_INT, 0);
@@ -79,7 +79,7 @@ extern inline void sh_mmcif_boot_cmd_send(void __iomem *base,
79 sh_mmcif_writel(base, MMCIF_CE_CMD_SET, cmd); 79 sh_mmcif_writel(base, MMCIF_CE_CMD_SET, cmd);
80} 80}
81 81
82extern inline int sh_mmcif_boot_cmd_poll(void __iomem *base, unsigned long mask) 82static inline int sh_mmcif_boot_cmd_poll(void __iomem *base, unsigned long mask)
83{ 83{
84 unsigned long tmp; 84 unsigned long tmp;
85 int cnt; 85 int cnt;
@@ -95,14 +95,14 @@ extern inline int sh_mmcif_boot_cmd_poll(void __iomem *base, unsigned long mask)
95 return -1; 95 return -1;
96} 96}
97 97
98extern inline int sh_mmcif_boot_cmd(void __iomem *base, 98static inline int sh_mmcif_boot_cmd(void __iomem *base,
99 unsigned long cmd, unsigned long arg) 99 unsigned long cmd, unsigned long arg)
100{ 100{
101 sh_mmcif_boot_cmd_send(base, cmd, arg); 101 sh_mmcif_boot_cmd_send(base, cmd, arg);
102 return sh_mmcif_boot_cmd_poll(base, 0x00010000); 102 return sh_mmcif_boot_cmd_poll(base, 0x00010000);
103} 103}
104 104
105extern inline int sh_mmcif_boot_do_read_single(void __iomem *base, 105static inline int sh_mmcif_boot_do_read_single(void __iomem *base,
106 unsigned int block_nr, 106 unsigned int block_nr,
107 unsigned long *buf) 107 unsigned long *buf)
108{ 108{
@@ -125,7 +125,7 @@ extern inline int sh_mmcif_boot_do_read_single(void __iomem *base,
125 return 0; 125 return 0;
126} 126}
127 127
128extern inline int sh_mmcif_boot_do_read(void __iomem *base, 128static inline int sh_mmcif_boot_do_read(void __iomem *base,
129 unsigned long first_block, 129 unsigned long first_block,
130 unsigned long nr_blocks, 130 unsigned long nr_blocks,
131 void *buf) 131 void *buf)
@@ -143,7 +143,7 @@ extern inline int sh_mmcif_boot_do_read(void __iomem *base,
143 return ret; 143 return ret;
144} 144}
145 145
146extern inline void sh_mmcif_boot_init(void __iomem *base) 146static inline void sh_mmcif_boot_init(void __iomem *base)
147{ 147{
148 unsigned long tmp; 148 unsigned long tmp;
149 149
@@ -177,7 +177,7 @@ extern inline void sh_mmcif_boot_init(void __iomem *base)
177 sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000); 177 sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000);
178} 178}
179 179
180extern inline void sh_mmcif_boot_slurp(void __iomem *base, 180static inline void sh_mmcif_boot_slurp(void __iomem *base,
181 unsigned char *buf, 181 unsigned char *buf,
182 unsigned long no_bytes) 182 unsigned long no_bytes)
183{ 183{
diff --git a/include/linux/sh_timer.h b/include/linux/sh_timer.h
index 864bd56bd3b0..4d9dcd138315 100644
--- a/include/linux/sh_timer.h
+++ b/include/linux/sh_timer.h
@@ -5,7 +5,6 @@ struct sh_timer_config {
5 char *name; 5 char *name;
6 long channel_offset; 6 long channel_offset;
7 int timer_bit; 7 int timer_bit;
8 char *clk;
9 unsigned long clockevent_rating; 8 unsigned long clockevent_rating;
10 unsigned long clocksource_rating; 9 unsigned long clocksource_rating;
11}; 10};