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authorJassi Brar <jassi.brar@samsung.com>2010-01-18 02:15:08 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-18 03:26:58 -0500
commit87315a802a8aab9d986858fcf2230726c1b5c598 (patch)
tree0114717eae50811d33b7cf3e7286a2e67fea3960
parent10f9f743f661d200a7a0006e65688cf28c2f01d9 (diff)
ARM: S3C64XX: SPI: Define SPI-48M clock sources
Defined special 48MHz clock sources for SPI-0,1. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/plat-s3c64xx/clock.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
index ae5883c00e7a..2989c3a2e94d 100644
--- a/arch/arm/plat-s3c64xx/clock.c
+++ b/arch/arm/plat-s3c64xx/clock.c
@@ -141,6 +141,18 @@ static struct clk init_clocks_disable[] = {
141 .enable = s3c64xx_pclk_ctrl, 141 .enable = s3c64xx_pclk_ctrl,
142 .ctrlbit = S3C_CLKCON_PCLK_SPI1, 142 .ctrlbit = S3C_CLKCON_PCLK_SPI1,
143 }, { 143 }, {
144 .name = "spi_48m",
145 .id = 0,
146 .parent = &clk_48m,
147 .enable = s3c64xx_sclk_ctrl,
148 .ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
149 }, {
150 .name = "spi_48m",
151 .id = 1,
152 .parent = &clk_48m,
153 .enable = s3c64xx_sclk_ctrl,
154 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
155 }, {
144 .name = "48m", 156 .name = "48m",
145 .id = 0, 157 .id = 0,
146 .parent = &clk_48m, 158 .parent = &clk_48m,