diff options
author | Manuel Lauss <manuel.lauss@gmail.com> | 2012-09-14 12:25:00 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-10-11 05:11:20 -0400 |
commit | 851d4f5d387d1db856f01d9e7167014187a48fb4 (patch) | |
tree | 01f57f86d509d9cd3b40cd51bb0a0503b931553a | |
parent | 24e8c1a611a706f51d4d9dc39b2c9977e25a54c4 (diff) |
MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code.
The PB1100/1500 are similar to their DB-cousins but with a few
more devices on the bus.
This patch adds PB1100/1500 support to the existing DB1100/1500
code.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: lnux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4338/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/alchemy/Kconfig | 19 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/db1000.c | 120 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1100.c | 167 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1500.c | 198 | ||||
-rw-r--r-- | arch/mips/configs/pb1100_defconfig | 124 | ||||
-rw-r--r-- | arch/mips/configs/pb1500_defconfig | 141 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-db1x00/bcsr.h | 2 |
8 files changed, 95 insertions, 678 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 6eb66a90a83a..c8862bdc2ff2 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig | |||
@@ -27,7 +27,7 @@ config MIPS_MTX1 | |||
27 | select SYS_HAS_EARLY_PRINTK | 27 | select SYS_HAS_EARLY_PRINTK |
28 | 28 | ||
29 | config MIPS_DB1000 | 29 | config MIPS_DB1000 |
30 | bool "Alchemy DB1000/DB1500/DB1100 boards" | 30 | bool "Alchemy DB1000/DB1500/DB1100 PB1500/1100 boards" |
31 | select ALCHEMY_GPIOINT_AU1000 | 31 | select ALCHEMY_GPIOINT_AU1000 |
32 | select DMA_NONCOHERENT | 32 | select DMA_NONCOHERENT |
33 | select HW_HAS_PCI | 33 | select HW_HAS_PCI |
@@ -45,23 +45,6 @@ config MIPS_DB1235 | |||
45 | select SYS_SUPPORTS_LITTLE_ENDIAN | 45 | select SYS_SUPPORTS_LITTLE_ENDIAN |
46 | select SYS_HAS_EARLY_PRINTK | 46 | select SYS_HAS_EARLY_PRINTK |
47 | 47 | ||
48 | config MIPS_PB1100 | ||
49 | bool "Alchemy PB1100 board" | ||
50 | select ALCHEMY_GPIOINT_AU1000 | ||
51 | select DMA_NONCOHERENT | ||
52 | select HW_HAS_PCI | ||
53 | select SWAP_IO_SPACE | ||
54 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
55 | select SYS_HAS_EARLY_PRINTK | ||
56 | |||
57 | config MIPS_PB1500 | ||
58 | bool "Alchemy PB1500 board" | ||
59 | select ALCHEMY_GPIOINT_AU1000 | ||
60 | select DMA_NONCOHERENT | ||
61 | select HW_HAS_PCI | ||
62 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
63 | select SYS_HAS_EARLY_PRINTK | ||
64 | |||
65 | config MIPS_XXS1500 | 48 | config MIPS_XXS1500 |
66 | bool "MyCable XXS1500 board" | 49 | bool "MyCable XXS1500 board" |
67 | select DMA_NONCOHERENT | 50 | select DMA_NONCOHERENT |
diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile index fad8a99c7b63..15bf7306648b 100644 --- a/arch/mips/alchemy/devboards/Makefile +++ b/arch/mips/alchemy/devboards/Makefile | |||
@@ -4,7 +4,5 @@ | |||
4 | 4 | ||
5 | obj-y += bcsr.o platform.o | 5 | obj-y += bcsr.o platform.o |
6 | obj-$(CONFIG_PM) += pm.o | 6 | obj-$(CONFIG_PM) += pm.o |
7 | obj-$(CONFIG_MIPS_PB1100) += pb1100.o | ||
8 | obj-$(CONFIG_MIPS_PB1500) += pb1500.o | ||
9 | obj-$(CONFIG_MIPS_DB1000) += db1000.o | 7 | obj-$(CONFIG_MIPS_DB1000) += db1000.o |
10 | obj-$(CONFIG_MIPS_DB1235) += db1235.o db1200.o db1300.o db1550.o | 8 | obj-$(CONFIG_MIPS_DB1235) += db1235.o db1200.o db1300.o db1550.o |
diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c index 1b81dbf6b804..8187845650f7 100644 --- a/arch/mips/alchemy/devboards/db1000.c +++ b/arch/mips/alchemy/devboards/db1000.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * DBAu1000/1500/1100 board support | 2 | * DBAu1000/1500/1100 PBAu1100/1500 board support |
3 | * | 3 | * |
4 | * Copyright 2000, 2008 MontaVista Software Inc. | 4 | * Copyright 2000, 2008 MontaVista Software Inc. |
5 | * Author: MontaVista Software, Inc. <source@mvista.com> | 5 | * Author: MontaVista Software, Inc. <source@mvista.com> |
@@ -52,6 +52,11 @@ static const char *board_type_str(void) | |||
52 | return "DB1500"; | 52 | return "DB1500"; |
53 | case BCSR_WHOAMI_DB1100: | 53 | case BCSR_WHOAMI_DB1100: |
54 | return "DB1100"; | 54 | return "DB1100"; |
55 | case BCSR_WHOAMI_PB1500: | ||
56 | case BCSR_WHOAMI_PB1500R2: | ||
57 | return "PB1500"; | ||
58 | case BCSR_WHOAMI_PB1100: | ||
59 | return "PB1100"; | ||
55 | default: | 60 | default: |
56 | return "(unknown)"; | 61 | return "(unknown)"; |
57 | } | 62 | } |
@@ -111,7 +116,9 @@ static struct platform_device db1500_pci_host_dev = { | |||
111 | 116 | ||
112 | static int __init db1500_pci_init(void) | 117 | static int __init db1500_pci_init(void) |
113 | { | 118 | { |
114 | if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1500) | 119 | int id = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)); |
120 | if ((id == BCSR_WHOAMI_DB1500) || (id == BCSR_WHOAMI_PB1500) || | ||
121 | (id == BCSR_WHOAMI_PB1500R2)) | ||
115 | return platform_device_register(&db1500_pci_host_dev); | 122 | return platform_device_register(&db1500_pci_host_dev); |
116 | return 0; | 123 | return 0; |
117 | } | 124 | } |
@@ -199,27 +206,37 @@ static irqreturn_t db1100_mmc_cd(int irq, void *ptr) | |||
199 | 206 | ||
200 | static int db1100_mmc_cd_setup(void *mmc_host, int en) | 207 | static int db1100_mmc_cd_setup(void *mmc_host, int en) |
201 | { | 208 | { |
202 | int ret = 0; | 209 | int ret = 0, irq; |
210 | |||
211 | if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) | ||
212 | irq = AU1100_GPIO19_INT; | ||
213 | else | ||
214 | irq = AU1100_GPIO14_INT; /* PB1100 SD0 CD# */ | ||
203 | 215 | ||
204 | if (en) { | 216 | if (en) { |
205 | irq_set_irq_type(AU1100_GPIO19_INT, IRQ_TYPE_EDGE_BOTH); | 217 | irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); |
206 | ret = request_irq(AU1100_GPIO19_INT, db1100_mmc_cd, 0, | 218 | ret = request_irq(irq, db1100_mmc_cd, 0, |
207 | "sd0_cd", mmc_host); | 219 | "sd0_cd", mmc_host); |
208 | } else | 220 | } else |
209 | free_irq(AU1100_GPIO19_INT, mmc_host); | 221 | free_irq(irq, mmc_host); |
210 | return ret; | 222 | return ret; |
211 | } | 223 | } |
212 | 224 | ||
213 | static int db1100_mmc1_cd_setup(void *mmc_host, int en) | 225 | static int db1100_mmc1_cd_setup(void *mmc_host, int en) |
214 | { | 226 | { |
215 | int ret = 0; | 227 | int ret = 0, irq; |
228 | |||
229 | if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) | ||
230 | irq = AU1100_GPIO20_INT; | ||
231 | else | ||
232 | irq = AU1100_GPIO15_INT; /* PB1100 SD1 CD# */ | ||
216 | 233 | ||
217 | if (en) { | 234 | if (en) { |
218 | irq_set_irq_type(AU1100_GPIO20_INT, IRQ_TYPE_EDGE_BOTH); | 235 | irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); |
219 | ret = request_irq(AU1100_GPIO20_INT, db1100_mmc_cd, 0, | 236 | ret = request_irq(irq, db1100_mmc_cd, 0, |
220 | "sd1_cd", mmc_host); | 237 | "sd1_cd", mmc_host); |
221 | } else | 238 | } else |
222 | free_irq(AU1100_GPIO20_INT, mmc_host); | 239 | free_irq(irq, mmc_host); |
223 | return ret; | 240 | return ret; |
224 | } | 241 | } |
225 | 242 | ||
@@ -236,11 +253,18 @@ static int db1100_mmc_card_inserted(void *mmc_host) | |||
236 | 253 | ||
237 | static void db1100_mmc_set_power(void *mmc_host, int state) | 254 | static void db1100_mmc_set_power(void *mmc_host, int state) |
238 | { | 255 | { |
256 | int bit; | ||
257 | |||
258 | if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) | ||
259 | bit = BCSR_BOARD_SD0PWR; | ||
260 | else | ||
261 | bit = BCSR_BOARD_PB1100_SD0PWR; | ||
262 | |||
239 | if (state) { | 263 | if (state) { |
240 | bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR); | 264 | bcsr_mod(BCSR_BOARD, 0, bit); |
241 | msleep(400); /* stabilization time */ | 265 | msleep(400); /* stabilization time */ |
242 | } else | 266 | } else |
243 | bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0); | 267 | bcsr_mod(BCSR_BOARD, bit, 0); |
244 | } | 268 | } |
245 | 269 | ||
246 | static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b) | 270 | static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b) |
@@ -267,11 +291,18 @@ static int db1100_mmc1_card_inserted(void *mmc_host) | |||
267 | 291 | ||
268 | static void db1100_mmc1_set_power(void *mmc_host, int state) | 292 | static void db1100_mmc1_set_power(void *mmc_host, int state) |
269 | { | 293 | { |
294 | int bit; | ||
295 | |||
296 | if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) | ||
297 | bit = BCSR_BOARD_SD1PWR; | ||
298 | else | ||
299 | bit = BCSR_BOARD_PB1100_SD1PWR; | ||
300 | |||
270 | if (state) { | 301 | if (state) { |
271 | bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR); | 302 | bcsr_mod(BCSR_BOARD, 0, bit); |
272 | msleep(400); /* stabilization time */ | 303 | msleep(400); /* stabilization time */ |
273 | } else | 304 | } else |
274 | bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0); | 305 | bcsr_mod(BCSR_BOARD, bit, 0); |
275 | } | 306 | } |
276 | 307 | ||
277 | static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b) | 308 | static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b) |
@@ -480,13 +511,12 @@ static struct platform_device *db1100_devs[] = { | |||
480 | &db1100_mmc0_dev, | 511 | &db1100_mmc0_dev, |
481 | &db1100_mmc1_dev, | 512 | &db1100_mmc1_dev, |
482 | &db1000_irda_dev, | 513 | &db1000_irda_dev, |
483 | &db1100_spi_dev, | ||
484 | }; | 514 | }; |
485 | 515 | ||
486 | static int __init db1000_dev_init(void) | 516 | static int __init db1000_dev_init(void) |
487 | { | 517 | { |
488 | int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)); | 518 | int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)); |
489 | int c0, c1, d0, d1, s0, s1; | 519 | int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1; |
490 | unsigned long pfc; | 520 | unsigned long pfc; |
491 | 521 | ||
492 | if (board == BCSR_WHOAMI_DB1500) { | 522 | if (board == BCSR_WHOAMI_DB1500) { |
@@ -522,6 +552,7 @@ static int __init db1000_dev_init(void) | |||
522 | ARRAY_SIZE(db1100_spi_info)); | 552 | ARRAY_SIZE(db1100_spi_info)); |
523 | 553 | ||
524 | platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs)); | 554 | platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs)); |
555 | platform_device_register(&db1100_spi_dev); | ||
525 | } else if (board == BCSR_WHOAMI_DB1000) { | 556 | } else if (board == BCSR_WHOAMI_DB1000) { |
526 | c0 = AU1000_GPIO2_INT; | 557 | c0 = AU1000_GPIO2_INT; |
527 | c1 = AU1000_GPIO5_INT; | 558 | c1 = AU1000_GPIO5_INT; |
@@ -530,15 +561,42 @@ static int __init db1000_dev_init(void) | |||
530 | s0 = AU1000_GPIO1_INT; | 561 | s0 = AU1000_GPIO1_INT; |
531 | s1 = AU1000_GPIO4_INT; | 562 | s1 = AU1000_GPIO4_INT; |
532 | platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs)); | 563 | platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs)); |
564 | } else if ((board == BCSR_WHOAMI_PB1500) || | ||
565 | (board == BCSR_WHOAMI_PB1500R2)) { | ||
566 | c0 = AU1500_GPIO203_INT; | ||
567 | d0 = AU1500_GPIO201_INT; | ||
568 | s0 = AU1500_GPIO202_INT; | ||
569 | twosocks = 0; | ||
570 | flashsize = 64; | ||
571 | /* RTC and daughtercard irqs */ | ||
572 | irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW); | ||
573 | irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW); | ||
574 | /* EPSON S1D13806 0x1b000000 | ||
575 | * SRAM 1MB/2MB 0x1a000000 | ||
576 | * DS1693 RTC 0x0c000000 | ||
577 | */ | ||
578 | } else if (board == BCSR_WHOAMI_PB1100) { | ||
579 | c0 = AU1100_GPIO11_INT; | ||
580 | d0 = AU1100_GPIO9_INT; | ||
581 | s0 = AU1100_GPIO10_INT; | ||
582 | twosocks = 0; | ||
583 | flashsize = 64; | ||
584 | /* pendown, rtc, daughtercard irqs */ | ||
585 | irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW); | ||
586 | irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW); | ||
587 | irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW); | ||
588 | /* EPSON S1D13806 0x1b000000 | ||
589 | * SRAM 1MB/2MB 0x1a000000 | ||
590 | * DiskOnChip 0x0d000000 | ||
591 | * DS1693 RTC 0x0c000000 | ||
592 | */ | ||
593 | platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs)); | ||
533 | } else | 594 | } else |
534 | return 0; /* unknown board, no further dev setup to do */ | 595 | return 0; /* unknown board, no further dev setup to do */ |
535 | 596 | ||
536 | irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH); | 597 | irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH); |
537 | irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH); | ||
538 | irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW); | 598 | irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW); |
539 | irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW); | ||
540 | irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW); | 599 | irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW); |
541 | irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW); | ||
542 | 600 | ||
543 | db1x_register_pcmcia_socket( | 601 | db1x_register_pcmcia_socket( |
544 | AU1000_PCMCIA_ATTR_PHYS_ADDR, | 602 | AU1000_PCMCIA_ATTR_PHYS_ADDR, |
@@ -549,17 +607,23 @@ static int __init db1000_dev_init(void) | |||
549 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, | 607 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, |
550 | c0, d0, /*s0*/0, 0, 0); | 608 | c0, d0, /*s0*/0, 0, 0); |
551 | 609 | ||
552 | db1x_register_pcmcia_socket( | 610 | if (twosocks) { |
553 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000, | 611 | irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH); |
554 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, | 612 | irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW); |
555 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000, | 613 | irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW); |
556 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, | 614 | |
557 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000, | 615 | db1x_register_pcmcia_socket( |
558 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, | 616 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000, |
559 | c1, d1, /*s1*/0, 0, 1); | 617 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, |
618 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000, | ||
619 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, | ||
620 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000, | ||
621 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, | ||
622 | c1, d1, /*s1*/0, 0, 1); | ||
623 | } | ||
560 | 624 | ||
561 | platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs)); | 625 | platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs)); |
562 | db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED); | 626 | db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED); |
563 | return 0; | 627 | return 0; |
564 | } | 628 | } |
565 | device_initcall(db1000_dev_init); | 629 | device_initcall(db1000_dev_init); |
diff --git a/arch/mips/alchemy/devboards/pb1100.c b/arch/mips/alchemy/devboards/pb1100.c deleted file mode 100644 index 78c77a44a317..000000000000 --- a/arch/mips/alchemy/devboards/pb1100.c +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* | ||
2 | * Pb1100 board platform device registration | ||
3 | * | ||
4 | * Copyright (C) 2009 Manuel Lauss | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/delay.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/dma-mapping.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <asm/mach-au1x00/au1000.h> | ||
28 | #include <asm/mach-db1x00/bcsr.h> | ||
29 | #include <prom.h> | ||
30 | #include "platform.h" | ||
31 | |||
32 | const char *get_system_type(void) | ||
33 | { | ||
34 | return "PB1100"; | ||
35 | } | ||
36 | |||
37 | void __init board_setup(void) | ||
38 | { | ||
39 | volatile void __iomem *base = (volatile void __iomem *)0xac000000UL; | ||
40 | |||
41 | bcsr_init(DB1000_BCSR_PHYS_ADDR, | ||
42 | DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS); | ||
43 | |||
44 | /* Set AUX clock to 12 MHz * 8 = 96 MHz */ | ||
45 | au_writel(8, SYS_AUXPLL); | ||
46 | alchemy_gpio1_input_enable(); | ||
47 | udelay(100); | ||
48 | |||
49 | #if IS_ENABLED(CONFIG_USB_OHCI_HCD) | ||
50 | { | ||
51 | u32 pin_func, sys_freqctrl, sys_clksrc; | ||
52 | |||
53 | /* Configure pins GPIO[14:9] as GPIO */ | ||
54 | pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3; | ||
55 | |||
56 | /* Zero and disable FREQ2 */ | ||
57 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | ||
58 | sys_freqctrl &= ~0xFFF00000; | ||
59 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | ||
60 | |||
61 | /* Zero and disable USBH/USBD/IrDA clock */ | ||
62 | sys_clksrc = au_readl(SYS_CLKSRC); | ||
63 | sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK); | ||
64 | au_writel(sys_clksrc, SYS_CLKSRC); | ||
65 | |||
66 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | ||
67 | sys_freqctrl &= ~0xFFF00000; | ||
68 | |||
69 | sys_clksrc = au_readl(SYS_CLKSRC); | ||
70 | sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK); | ||
71 | |||
72 | /* FREQ2 = aux / 2 = 48 MHz */ | ||
73 | sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | | ||
74 | SYS_FC_FE2 | SYS_FC_FS2; | ||
75 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | ||
76 | |||
77 | /* | ||
78 | * Route 48 MHz FREQ2 into USBH/USBD/IrDA | ||
79 | */ | ||
80 | sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT; | ||
81 | au_writel(sys_clksrc, SYS_CLKSRC); | ||
82 | |||
83 | /* Setup the static bus controller */ | ||
84 | au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | ||
85 | au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ | ||
86 | au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ | ||
87 | |||
88 | /* | ||
89 | * Get USB Functionality pin state (device vs host drive pins). | ||
90 | */ | ||
91 | pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB; | ||
92 | /* 2nd USB port is USB host. */ | ||
93 | pin_func |= SYS_PF_USB; | ||
94 | au_writel(pin_func, SYS_PINFUNC); | ||
95 | } | ||
96 | #endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */ | ||
97 | |||
98 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ | ||
99 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | ||
100 | |||
101 | /* Enable the RTC if not already enabled. */ | ||
102 | if (!(readb(base + 0x28) & 0x20)) { | ||
103 | writeb(readb(base + 0x28) | 0x20, base + 0x28); | ||
104 | au_sync(); | ||
105 | } | ||
106 | /* Put the clock in BCD mode. */ | ||
107 | if (readb(base + 0x2C) & 0x4) { /* reg B */ | ||
108 | writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); | ||
109 | au_sync(); | ||
110 | } | ||
111 | } | ||
112 | |||
113 | /******************************************************************************/ | ||
114 | |||
115 | static struct resource au1100_lcd_resources[] = { | ||
116 | [0] = { | ||
117 | .start = AU1100_LCD_PHYS_ADDR, | ||
118 | .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, | ||
119 | .flags = IORESOURCE_MEM, | ||
120 | }, | ||
121 | [1] = { | ||
122 | .start = AU1100_LCD_INT, | ||
123 | .end = AU1100_LCD_INT, | ||
124 | .flags = IORESOURCE_IRQ, | ||
125 | } | ||
126 | }; | ||
127 | |||
128 | static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); | ||
129 | |||
130 | static struct platform_device au1100_lcd_device = { | ||
131 | .name = "au1100-lcd", | ||
132 | .id = 0, | ||
133 | .dev = { | ||
134 | .dma_mask = &au1100_lcd_dmamask, | ||
135 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
136 | }, | ||
137 | .num_resources = ARRAY_SIZE(au1100_lcd_resources), | ||
138 | .resource = au1100_lcd_resources, | ||
139 | }; | ||
140 | |||
141 | static int __init pb1100_dev_init(void) | ||
142 | { | ||
143 | int swapped; | ||
144 | |||
145 | irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */ | ||
146 | irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */ | ||
147 | irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */ | ||
148 | irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */ | ||
149 | |||
150 | /* PCMCIA. single socket, identical to Pb1500 */ | ||
151 | db1x_register_pcmcia_socket( | ||
152 | AU1000_PCMCIA_ATTR_PHYS_ADDR, | ||
153 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, | ||
154 | AU1000_PCMCIA_MEM_PHYS_ADDR, | ||
155 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, | ||
156 | AU1000_PCMCIA_IO_PHYS_ADDR, | ||
157 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, | ||
158 | AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */ | ||
159 | /*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */ | ||
160 | |||
161 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; | ||
162 | db1x_register_norflash(64 * 1024 * 1024, 4, swapped); | ||
163 | platform_device_register(&au1100_lcd_device); | ||
164 | |||
165 | return 0; | ||
166 | } | ||
167 | device_initcall(pb1100_dev_init); | ||
diff --git a/arch/mips/alchemy/devboards/pb1500.c b/arch/mips/alchemy/devboards/pb1500.c deleted file mode 100644 index 232fee942000..000000000000 --- a/arch/mips/alchemy/devboards/pb1500.c +++ /dev/null | |||
@@ -1,198 +0,0 @@ | |||
1 | /* | ||
2 | * Pb1500 board support. | ||
3 | * | ||
4 | * Copyright (C) 2009 Manuel Lauss | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/delay.h> | ||
22 | #include <linux/dma-mapping.h> | ||
23 | #include <linux/gpio.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/interrupt.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <asm/mach-au1x00/au1000.h> | ||
28 | #include <asm/mach-db1x00/bcsr.h> | ||
29 | #include <prom.h> | ||
30 | #include "platform.h" | ||
31 | |||
32 | const char *get_system_type(void) | ||
33 | { | ||
34 | return "PB1500"; | ||
35 | } | ||
36 | |||
37 | void __init board_setup(void) | ||
38 | { | ||
39 | u32 pin_func; | ||
40 | u32 sys_freqctrl, sys_clksrc; | ||
41 | |||
42 | bcsr_init(DB1000_BCSR_PHYS_ADDR, | ||
43 | DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS); | ||
44 | |||
45 | sys_clksrc = sys_freqctrl = pin_func = 0; | ||
46 | /* Set AUX clock to 12 MHz * 8 = 96 MHz */ | ||
47 | au_writel(8, SYS_AUXPLL); | ||
48 | alchemy_gpio1_input_enable(); | ||
49 | udelay(100); | ||
50 | |||
51 | /* GPIO201 is input for PCMCIA card detect */ | ||
52 | /* GPIO203 is input for PCMCIA interrupt request */ | ||
53 | alchemy_gpio_direction_input(201); | ||
54 | alchemy_gpio_direction_input(203); | ||
55 | |||
56 | #if IS_ENABLED(CONFIG_USB_OHCI_HCD) | ||
57 | |||
58 | /* Zero and disable FREQ2 */ | ||
59 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | ||
60 | sys_freqctrl &= ~0xFFF00000; | ||
61 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | ||
62 | |||
63 | /* zero and disable USBH/USBD clocks */ | ||
64 | sys_clksrc = au_readl(SYS_CLKSRC); | ||
65 | sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | | ||
66 | SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); | ||
67 | au_writel(sys_clksrc, SYS_CLKSRC); | ||
68 | |||
69 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | ||
70 | sys_freqctrl &= ~0xFFF00000; | ||
71 | |||
72 | sys_clksrc = au_readl(SYS_CLKSRC); | ||
73 | sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | | ||
74 | SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); | ||
75 | |||
76 | /* FREQ2 = aux/2 = 48 MHz */ | ||
77 | sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2; | ||
78 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | ||
79 | |||
80 | /* | ||
81 | * Route 48MHz FREQ2 into USB Host and/or Device | ||
82 | */ | ||
83 | sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT; | ||
84 | au_writel(sys_clksrc, SYS_CLKSRC); | ||
85 | |||
86 | pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB; | ||
87 | /* 2nd USB port is USB host */ | ||
88 | pin_func |= SYS_PF_USB; | ||
89 | au_writel(pin_func, SYS_PINFUNC); | ||
90 | #endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */ | ||
91 | |||
92 | #ifdef CONFIG_PCI | ||
93 | { | ||
94 | void __iomem *base = | ||
95 | (void __iomem *)KSEG1ADDR(AU1500_PCI_PHYS_ADDR); | ||
96 | /* Setup PCI bus controller */ | ||
97 | __raw_writel(0x00003fff, base + PCI_REG_CMEM); | ||
98 | __raw_writel(0xf0000000, base + PCI_REG_MWMASK_DEV); | ||
99 | __raw_writel(0, base + PCI_REG_MWBASE_REV_CCL); | ||
100 | __raw_writel(0x02a00356, base + PCI_REG_STATCMD); | ||
101 | __raw_writel(0x00003c04, base + PCI_REG_PARAM); | ||
102 | __raw_writel(0x00000008, base + PCI_REG_MBAR); | ||
103 | wmb(); | ||
104 | } | ||
105 | #endif | ||
106 | |||
107 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ | ||
108 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | ||
109 | |||
110 | /* Enable the RTC if not already enabled */ | ||
111 | if (!(au_readl(0xac000028) & 0x20)) { | ||
112 | printk(KERN_INFO "enabling clock ...\n"); | ||
113 | au_writel((au_readl(0xac000028) | 0x20), 0xac000028); | ||
114 | } | ||
115 | /* Put the clock in BCD mode */ | ||
116 | if (au_readl(0xac00002c) & 0x4) { /* reg B */ | ||
117 | au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); | ||
118 | au_sync(); | ||
119 | } | ||
120 | } | ||
121 | |||
122 | /******************************************************************************/ | ||
123 | |||
124 | static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) | ||
125 | { | ||
126 | if ((slot < 12) || (slot > 13) || pin == 0) | ||
127 | return -1; | ||
128 | if (slot == 12) | ||
129 | return (pin == 1) ? AU1500_PCI_INTA : 0xff; | ||
130 | if (slot == 13) { | ||
131 | switch (pin) { | ||
132 | case 1: return AU1500_PCI_INTA; | ||
133 | case 2: return AU1500_PCI_INTB; | ||
134 | case 3: return AU1500_PCI_INTC; | ||
135 | case 4: return AU1500_PCI_INTD; | ||
136 | } | ||
137 | } | ||
138 | return -1; | ||
139 | } | ||
140 | |||
141 | static struct resource alchemy_pci_host_res[] = { | ||
142 | [0] = { | ||
143 | .start = AU1500_PCI_PHYS_ADDR, | ||
144 | .end = AU1500_PCI_PHYS_ADDR + 0xfff, | ||
145 | .flags = IORESOURCE_MEM, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | static struct alchemy_pci_platdata pb1500_pci_pd = { | ||
150 | .board_map_irq = pb1500_map_pci_irq, | ||
151 | .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | | ||
152 | PCI_CONFIG_CH | | ||
153 | #if defined(__MIPSEB__) | ||
154 | PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, | ||
155 | #else | ||
156 | 0, | ||
157 | #endif | ||
158 | }; | ||
159 | |||
160 | static struct platform_device pb1500_pci_host = { | ||
161 | .dev.platform_data = &pb1500_pci_pd, | ||
162 | .name = "alchemy-pci", | ||
163 | .id = 0, | ||
164 | .num_resources = ARRAY_SIZE(alchemy_pci_host_res), | ||
165 | .resource = alchemy_pci_host_res, | ||
166 | }; | ||
167 | |||
168 | static int __init pb1500_dev_init(void) | ||
169 | { | ||
170 | int swapped; | ||
171 | |||
172 | irq_set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */ | ||
173 | irq_set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */ | ||
174 | irq_set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ | ||
175 | irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); | ||
176 | irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); | ||
177 | irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); | ||
178 | irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); | ||
179 | irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); | ||
180 | |||
181 | /* PCMCIA. single socket, identical to Pb1100 */ | ||
182 | db1x_register_pcmcia_socket( | ||
183 | AU1000_PCMCIA_ATTR_PHYS_ADDR, | ||
184 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, | ||
185 | AU1000_PCMCIA_MEM_PHYS_ADDR, | ||
186 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, | ||
187 | AU1000_PCMCIA_IO_PHYS_ADDR, | ||
188 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, | ||
189 | AU1500_GPIO11_INT, AU1500_GPIO9_INT, /* card / insert */ | ||
190 | /*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */ | ||
191 | |||
192 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; | ||
193 | db1x_register_norflash(64 * 1024 * 1024, 4, swapped); | ||
194 | platform_device_register(&pb1500_pci_host); | ||
195 | |||
196 | return 0; | ||
197 | } | ||
198 | arch_initcall(pb1500_dev_init); | ||
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig deleted file mode 100644 index 75eb1b1f316c..000000000000 --- a/arch/mips/configs/pb1100_defconfig +++ /dev/null | |||
@@ -1,124 +0,0 @@ | |||
1 | CONFIG_MIPS_ALCHEMY=y | ||
2 | CONFIG_MIPS_PB1100=y | ||
3 | CONFIG_NO_HZ=y | ||
4 | CONFIG_HIGH_RES_TIMERS=y | ||
5 | CONFIG_HZ_100=y | ||
6 | # CONFIG_SECCOMP is not set | ||
7 | CONFIG_EXPERIMENTAL=y | ||
8 | CONFIG_LOCALVERSION="-pb1100" | ||
9 | CONFIG_KERNEL_LZMA=y | ||
10 | CONFIG_SYSVIPC=y | ||
11 | CONFIG_POSIX_MQUEUE=y | ||
12 | CONFIG_TINY_RCU=y | ||
13 | CONFIG_LOG_BUF_SHIFT=14 | ||
14 | CONFIG_EXPERT=y | ||
15 | # CONFIG_SYSCTL_SYSCALL is not set | ||
16 | # CONFIG_KALLSYMS is not set | ||
17 | # CONFIG_PCSPKR_PLATFORM is not set | ||
18 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
19 | # CONFIG_COMPAT_BRK is not set | ||
20 | CONFIG_SLAB=y | ||
21 | CONFIG_MODULES=y | ||
22 | CONFIG_MODULE_UNLOAD=y | ||
23 | # CONFIG_LBDAF is not set | ||
24 | # CONFIG_BLK_DEV_BSG is not set | ||
25 | # CONFIG_IOSCHED_DEADLINE is not set | ||
26 | # CONFIG_IOSCHED_CFQ is not set | ||
27 | CONFIG_PCCARD=y | ||
28 | CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y | ||
29 | CONFIG_PM=y | ||
30 | CONFIG_PM_RUNTIME=y | ||
31 | CONFIG_NET=y | ||
32 | CONFIG_PACKET=y | ||
33 | CONFIG_UNIX=y | ||
34 | CONFIG_INET=y | ||
35 | CONFIG_IP_MULTICAST=y | ||
36 | CONFIG_IP_PNP=y | ||
37 | CONFIG_IP_PNP_DHCP=y | ||
38 | CONFIG_IP_PNP_BOOTP=y | ||
39 | CONFIG_IP_PNP_RARP=y | ||
40 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
41 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
42 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
43 | # CONFIG_INET_DIAG is not set | ||
44 | # CONFIG_IPV6 is not set | ||
45 | # CONFIG_WIRELESS is not set | ||
46 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
47 | CONFIG_MTD=y | ||
48 | CONFIG_MTD_PARTITIONS=y | ||
49 | CONFIG_MTD_CHAR=y | ||
50 | CONFIG_MTD_BLOCK=y | ||
51 | CONFIG_MTD_CFI=y | ||
52 | CONFIG_MTD_CFI_AMDSTD=y | ||
53 | CONFIG_MTD_PHYSMAP=y | ||
54 | CONFIG_BLK_DEV_LOOP=y | ||
55 | CONFIG_BLK_DEV_UB=y | ||
56 | # CONFIG_MISC_DEVICES is not set | ||
57 | CONFIG_IDE=y | ||
58 | CONFIG_BLK_DEV_IDECS=y | ||
59 | CONFIG_IDE_TASK_IOCTL=y | ||
60 | # CONFIG_IDE_PROC_FS is not set | ||
61 | CONFIG_NETDEVICES=y | ||
62 | CONFIG_MARVELL_PHY=y | ||
63 | CONFIG_DAVICOM_PHY=y | ||
64 | CONFIG_QSEMI_PHY=y | ||
65 | CONFIG_LXT_PHY=y | ||
66 | CONFIG_CICADA_PHY=y | ||
67 | CONFIG_VITESSE_PHY=y | ||
68 | CONFIG_SMSC_PHY=y | ||
69 | CONFIG_BROADCOM_PHY=y | ||
70 | CONFIG_ICPLUS_PHY=y | ||
71 | CONFIG_REALTEK_PHY=y | ||
72 | CONFIG_NATIONAL_PHY=y | ||
73 | CONFIG_STE10XP=y | ||
74 | CONFIG_LSI_ET1011C_PHY=y | ||
75 | CONFIG_NET_ETHERNET=y | ||
76 | CONFIG_MII=y | ||
77 | CONFIG_MIPS_AU1X00_ENET=y | ||
78 | # CONFIG_NETDEV_1000 is not set | ||
79 | # CONFIG_NETDEV_10000 is not set | ||
80 | # CONFIG_WLAN is not set | ||
81 | # CONFIG_INPUT_MOUSEDEV is not set | ||
82 | CONFIG_INPUT_EVDEV=y | ||
83 | # CONFIG_INPUT_KEYBOARD is not set | ||
84 | # CONFIG_INPUT_MOUSE is not set | ||
85 | # CONFIG_SERIO is not set | ||
86 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
87 | CONFIG_SERIAL_8250=y | ||
88 | CONFIG_SERIAL_8250_CONSOLE=y | ||
89 | # CONFIG_LEGACY_PTYS is not set | ||
90 | # CONFIG_HW_RANDOM is not set | ||
91 | # CONFIG_HWMON is not set | ||
92 | # CONFIG_VGA_CONSOLE is not set | ||
93 | CONFIG_HIDRAW=y | ||
94 | CONFIG_USB_HIDDEV=y | ||
95 | CONFIG_USB=y | ||
96 | # CONFIG_USB_DEVICE_CLASS is not set | ||
97 | CONFIG_USB_DYNAMIC_MINORS=y | ||
98 | CONFIG_USB_SUSPEND=y | ||
99 | CONFIG_USB_OHCI_HCD=y | ||
100 | CONFIG_RTC_CLASS=y | ||
101 | CONFIG_RTC_DRV_AU1XXX=y | ||
102 | CONFIG_EXT2_FS=y | ||
103 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
104 | CONFIG_TMPFS=y | ||
105 | CONFIG_JFFS2_FS=y | ||
106 | CONFIG_JFFS2_SUMMARY=y | ||
107 | CONFIG_JFFS2_FS_XATTR=y | ||
108 | # CONFIG_JFFS2_FS_POSIX_ACL is not set | ||
109 | # CONFIG_JFFS2_FS_SECURITY is not set | ||
110 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
111 | CONFIG_JFFS2_LZO=y | ||
112 | CONFIG_JFFS2_RUBIN=y | ||
113 | CONFIG_SQUASHFS=y | ||
114 | CONFIG_NFS_FS=y | ||
115 | CONFIG_NFS_V3=y | ||
116 | CONFIG_ROOT_NFS=y | ||
117 | CONFIG_STRIP_ASM_SYMS=y | ||
118 | CONFIG_DEBUG_KERNEL=y | ||
119 | # CONFIG_SCHED_DEBUG is not set | ||
120 | # CONFIG_FTRACE is not set | ||
121 | CONFIG_DEBUG_ZBOOT=y | ||
122 | CONFIG_KEYS=y | ||
123 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | ||
124 | CONFIG_SECURITYFS=y | ||
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig deleted file mode 100644 index fa00487146f8..000000000000 --- a/arch/mips/configs/pb1500_defconfig +++ /dev/null | |||
@@ -1,141 +0,0 @@ | |||
1 | CONFIG_MIPS_ALCHEMY=y | ||
2 | CONFIG_MIPS_PB1500=y | ||
3 | CONFIG_NO_HZ=y | ||
4 | CONFIG_HIGH_RES_TIMERS=y | ||
5 | CONFIG_HZ_100=y | ||
6 | # CONFIG_SECCOMP is not set | ||
7 | CONFIG_EXPERIMENTAL=y | ||
8 | CONFIG_LOCALVERSION="-pb1500" | ||
9 | CONFIG_KERNEL_LZMA=y | ||
10 | CONFIG_SYSVIPC=y | ||
11 | CONFIG_POSIX_MQUEUE=y | ||
12 | CONFIG_TINY_RCU=y | ||
13 | CONFIG_LOG_BUF_SHIFT=14 | ||
14 | CONFIG_EXPERT=y | ||
15 | # CONFIG_SYSCTL_SYSCALL is not set | ||
16 | # CONFIG_KALLSYMS is not set | ||
17 | # CONFIG_PCSPKR_PLATFORM is not set | ||
18 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
19 | # CONFIG_COMPAT_BRK is not set | ||
20 | CONFIG_SLAB=y | ||
21 | CONFIG_MODULES=y | ||
22 | CONFIG_MODULE_UNLOAD=y | ||
23 | # CONFIG_IOSCHED_DEADLINE is not set | ||
24 | # CONFIG_IOSCHED_CFQ is not set | ||
25 | CONFIG_PCI=y | ||
26 | CONFIG_PCCARD=y | ||
27 | # CONFIG_CARDBUS is not set | ||
28 | CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y | ||
29 | CONFIG_PM=y | ||
30 | CONFIG_PM_RUNTIME=y | ||
31 | CONFIG_NET=y | ||
32 | CONFIG_PACKET=y | ||
33 | CONFIG_UNIX=y | ||
34 | CONFIG_INET=y | ||
35 | CONFIG_IP_MULTICAST=y | ||
36 | CONFIG_IP_PNP=y | ||
37 | CONFIG_IP_PNP_DHCP=y | ||
38 | CONFIG_IP_PNP_BOOTP=y | ||
39 | CONFIG_IP_PNP_RARP=y | ||
40 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
41 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
42 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
43 | # CONFIG_INET_DIAG is not set | ||
44 | # CONFIG_IPV6 is not set | ||
45 | # CONFIG_WIRELESS is not set | ||
46 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
47 | CONFIG_MTD=y | ||
48 | CONFIG_MTD_PARTITIONS=y | ||
49 | CONFIG_MTD_CHAR=y | ||
50 | CONFIG_MTD_BLOCK=y | ||
51 | CONFIG_MTD_CFI=y | ||
52 | CONFIG_MTD_CFI_AMDSTD=y | ||
53 | CONFIG_MTD_PHYSMAP=y | ||
54 | CONFIG_BLK_DEV_LOOP=y | ||
55 | CONFIG_BLK_DEV_UB=y | ||
56 | # CONFIG_MISC_DEVICES is not set | ||
57 | CONFIG_IDE=y | ||
58 | CONFIG_BLK_DEV_IDECS=y | ||
59 | CONFIG_BLK_DEV_IDECD=y | ||
60 | CONFIG_IDE_TASK_IOCTL=y | ||
61 | # CONFIG_IDEPCI_PCIBUS_ORDER is not set | ||
62 | CONFIG_BLK_DEV_HPT366=y | ||
63 | CONFIG_NETDEVICES=y | ||
64 | CONFIG_MARVELL_PHY=y | ||
65 | CONFIG_DAVICOM_PHY=y | ||
66 | CONFIG_QSEMI_PHY=y | ||
67 | CONFIG_LXT_PHY=y | ||
68 | CONFIG_CICADA_PHY=y | ||
69 | CONFIG_VITESSE_PHY=y | ||
70 | CONFIG_SMSC_PHY=y | ||
71 | CONFIG_BROADCOM_PHY=y | ||
72 | CONFIG_ICPLUS_PHY=y | ||
73 | CONFIG_REALTEK_PHY=y | ||
74 | CONFIG_NATIONAL_PHY=y | ||
75 | CONFIG_STE10XP=y | ||
76 | CONFIG_LSI_ET1011C_PHY=y | ||
77 | CONFIG_NET_ETHERNET=y | ||
78 | CONFIG_MII=y | ||
79 | CONFIG_MIPS_AU1X00_ENET=y | ||
80 | # CONFIG_NETDEV_1000 is not set | ||
81 | # CONFIG_NETDEV_10000 is not set | ||
82 | # CONFIG_WLAN is not set | ||
83 | # CONFIG_INPUT_MOUSEDEV is not set | ||
84 | CONFIG_INPUT_EVDEV=y | ||
85 | # CONFIG_INPUT_KEYBOARD is not set | ||
86 | # CONFIG_INPUT_MOUSE is not set | ||
87 | # CONFIG_SERIO is not set | ||
88 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
89 | CONFIG_SERIAL_8250=y | ||
90 | CONFIG_SERIAL_8250_CONSOLE=y | ||
91 | # CONFIG_SERIAL_8250_PCI is not set | ||
92 | # CONFIG_LEGACY_PTYS is not set | ||
93 | # CONFIG_HW_RANDOM is not set | ||
94 | # CONFIG_HWMON is not set | ||
95 | # CONFIG_VGA_ARB is not set | ||
96 | CONFIG_FB=y | ||
97 | CONFIG_FIRMWARE_EDID=y | ||
98 | CONFIG_FB_MODE_HELPERS=y | ||
99 | CONFIG_FB_TILEBLITTING=y | ||
100 | CONFIG_FB_S1D13XXX=y | ||
101 | CONFIG_USB_HIDDEV=y | ||
102 | CONFIG_USB=y | ||
103 | # CONFIG_USB_DEVICE_CLASS is not set | ||
104 | CONFIG_USB_DYNAMIC_MINORS=y | ||
105 | CONFIG_USB_OTG_WHITELIST=y | ||
106 | CONFIG_USB_OHCI_HCD=y | ||
107 | CONFIG_RTC_CLASS=y | ||
108 | CONFIG_RTC_DRV_AU1XXX=y | ||
109 | CONFIG_EXT2_FS=y | ||
110 | CONFIG_ISO9660_FS=y | ||
111 | CONFIG_JOLIET=y | ||
112 | CONFIG_ZISOFS=y | ||
113 | CONFIG_UDF_FS=y | ||
114 | CONFIG_VFAT_FS=y | ||
115 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
116 | CONFIG_TMPFS=y | ||
117 | CONFIG_JFFS2_FS=y | ||
118 | CONFIG_JFFS2_SUMMARY=y | ||
119 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
120 | CONFIG_JFFS2_LZO=y | ||
121 | CONFIG_JFFS2_RUBIN=y | ||
122 | CONFIG_SQUASHFS=y | ||
123 | CONFIG_NFS_FS=y | ||
124 | CONFIG_NFS_V3=y | ||
125 | CONFIG_ROOT_NFS=y | ||
126 | CONFIG_NLS_CODEPAGE_437=y | ||
127 | CONFIG_NLS_CODEPAGE_850=y | ||
128 | CONFIG_NLS_CODEPAGE_852=y | ||
129 | CONFIG_NLS_CODEPAGE_1250=y | ||
130 | CONFIG_NLS_ASCII=y | ||
131 | CONFIG_NLS_ISO8859_1=y | ||
132 | CONFIG_NLS_ISO8859_15=y | ||
133 | CONFIG_NLS_UTF8=y | ||
134 | CONFIG_STRIP_ASM_SYMS=y | ||
135 | CONFIG_DEBUG_KERNEL=y | ||
136 | # CONFIG_SCHED_DEBUG is not set | ||
137 | # CONFIG_FTRACE is not set | ||
138 | CONFIG_DEBUG_ZBOOT=y | ||
139 | CONFIG_KEYS=y | ||
140 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | ||
141 | CONFIG_SECURITYFS=y | ||
diff --git a/arch/mips/include/asm/mach-db1x00/bcsr.h b/arch/mips/include/asm/mach-db1x00/bcsr.h index bb9fc23d853a..16f1cf5982b9 100644 --- a/arch/mips/include/asm/mach-db1x00/bcsr.h +++ b/arch/mips/include/asm/mach-db1x00/bcsr.h | |||
@@ -162,6 +162,8 @@ enum bcsr_whoami_boards { | |||
162 | #define BCSR_BOARD_PCIEXTARB 0x0200 | 162 | #define BCSR_BOARD_PCIEXTARB 0x0200 |
163 | #define BCSR_BOARD_GPIO200RST 0x0400 | 163 | #define BCSR_BOARD_GPIO200RST 0x0400 |
164 | #define BCSR_BOARD_PCICLKOUT 0x0800 | 164 | #define BCSR_BOARD_PCICLKOUT 0x0800 |
165 | #define BCSR_BOARD_PB1100_SD0PWR 0x0400 | ||
166 | #define BCSR_BOARD_PB1100_SD1PWR 0x0800 | ||
165 | #define BCSR_BOARD_PCICFG 0x1000 | 167 | #define BCSR_BOARD_PCICFG 0x1000 |
166 | #define BCSR_BOARD_SPISEL 0x2000 /* PB/DB1550 */ | 168 | #define BCSR_BOARD_SPISEL 0x2000 /* PB/DB1550 */ |
167 | #define BCSR_BOARD_SD0WP 0x4000 /* DB1100 */ | 169 | #define BCSR_BOARD_SD0WP 0x4000 /* DB1100 */ |