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authorBrian Norris <norris@broadcom.com>2010-08-13 13:29:14 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-08-13 16:11:54 -0400
commit84c4f46d9c0bd67b763b01a6b4c86dcfde6c818a (patch)
tree3e6fea52757d165649c574d4ea9c80f3d5335d9f
parentf78ec6b2f32efad1fc6b2196e966dcec8122d689 (diff)
mtd/nand_ids: Fix buswidth
The buswidth for chips of ID 0xD7 is x8, not x16. This was my previous typo. Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/nand_ids.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index a04b89105b65..c65f19074bc8 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -112,7 +112,7 @@ struct nand_flash_dev nand_flash_ids[] = {
112 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, 112 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
113 113
114 /* 32 Gigabit */ 114 /* 32 Gigabit */
115 {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16}, 115 {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS},
116 116
117 /* 117 /*
118 * Renesas AND 1 Gigabit. Those chips do not support extended id and 118 * Renesas AND 1 Gigabit. Those chips do not support extended id and