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authorLinus Torvalds <torvalds@linux-foundation.org>2009-04-24 11:36:41 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-24 11:36:41 -0400
commit6ae85d6db4871d8dbcb5cc0e9056f97f1ca07061 (patch)
treed0a6fa2e4fcef36a4c80990a361c0d5fbe091c35
parentd72cd3a90e4d6725b62919139e2ab7bd926fa16d (diff)
parentfdd8b079e33d4711527ace19798e9db99a056469 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 5460/1: Orion: reduce namespace pollution [ARM] 5458/1: pcmcia: pxa2xx-sharpsl: check if we do have Scoop config [ARM] 5457/1: mach-imx gpio buildfix [ARM] 5456/1: add sys_preadv and sys_pwritev [ARM] pxa/pcm990: start external GPIOs immediately after built-in ones [ARM] pxa/palm27x: General fix for Palm27x aSoC driver [ARM] pxa/mioa701: use GPIO95 as AC97 reset line [ARM] pxa: merge AC97 platform data structures [ARM] pxa/magician: remove un-necessary #include of pxa-regs.h and hardware.h
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/mach-imx/include/mach/gpio.h1
-rw-r--r--arch/arm/mach-kirkwood/common.c1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/bridge-regs.h42
-rw-r--r--arch/arm/mach-kirkwood/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-kirkwood/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h53
-rw-r--r--arch/arm/mach-kirkwood/include/mach/system.h3
-rw-r--r--arch/arm/mach-kirkwood/irq.c1
-rw-r--r--arch/arm/mach-loki/addr-map.c1
-rw-r--r--arch/arm/mach-loki/include/mach/bridge-regs.h33
-rw-r--r--arch/arm/mach-loki/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-loki/include/mach/loki.h14
-rw-r--r--arch/arm/mach-loki/include/mach/system.h3
-rw-r--r--arch/arm/mach-loki/irq.c1
-rw-r--r--arch/arm/mach-mv78xx0/common.c1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/bridge-regs.h39
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h42
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/system.h3
-rw-r--r--arch/arm/mach-mv78xx0/irq.c2
-rw-r--r--arch/arm/mach-orion5x/addr-map.c2
-rw-r--r--arch/arm/mach-orion5x/include/mach/bridge-regs.h41
-rw-r--r--arch/arm/mach-orion5x/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h68
-rw-r--r--arch/arm/mach-orion5x/include/mach/system.h3
-rw-r--r--arch/arm/mach-orion5x/irq.c2
-rw-r--r--arch/arm/mach-orion5x/mss2-setup.c1
-rw-r--r--arch/arm/mach-orion5x/pci.c1
-rw-r--r--arch/arm/mach-pxa/include/mach/audio.h10
-rw-r--r--arch/arm/mach-pxa/include/mach/palmasoc.h7
-rw-r--r--arch/arm/mach-pxa/mioa701.c6
-rw-r--r--arch/arm/mach-pxa/palmld.c18
-rw-r--r--arch/arm/mach-pxa/palmt5.c18
-rw-r--r--arch/arm/mach-pxa/palmtx.c23
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c6
-rw-r--r--arch/arm/plat-orion/time.c2
-rw-r--r--drivers/pcmcia/pxa2xx_sharpsl.c3
-rw-r--r--drivers/watchdog/orion5x_wdt.c1
-rw-r--r--include/sound/pxa2xx-lib.h15
-rw-r--r--sound/arm/pxa2xx-ac97-lib.c2
-rw-r--r--sound/soc/pxa/palm27x.c27
43 files changed, 326 insertions, 184 deletions
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 010618487cf1..94cc58ef61ae 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -387,6 +387,8 @@
387#define __NR_dup3 (__NR_SYSCALL_BASE+358) 387#define __NR_dup3 (__NR_SYSCALL_BASE+358)
388#define __NR_pipe2 (__NR_SYSCALL_BASE+359) 388#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
389#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360) 389#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
390#define __NR_preadv (__NR_SYSCALL_BASE+361)
391#define __NR_pwritev (__NR_SYSCALL_BASE+362)
390 392
391/* 393/*
392 * The following SWIs are ARM private. 394 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9ca8d13f05f7..1680e9e9c831 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -370,6 +370,8 @@
370 CALL(sys_dup3) 370 CALL(sys_dup3)
371 CALL(sys_pipe2) 371 CALL(sys_pipe2)
372/* 360 */ CALL(sys_inotify_init1) 372/* 360 */ CALL(sys_inotify_init1)
373 CALL(sys_preadv)
374 CALL(sys_pwritev)
373#ifndef syscalls_counted 375#ifndef syscalls_counted
374.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 376.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
375#define syscalls_counted 377#define syscalls_counted
diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h
index 502d5aa2c093..6c2942f82922 100644
--- a/arch/arm/mach-imx/include/mach/gpio.h
+++ b/arch/arm/mach-imx/include/mach/gpio.h
@@ -1,6 +1,7 @@
1#ifndef _IMX_GPIO_H 1#ifndef _IMX_GPIO_H
2 2
3#include <linux/kernel.h> 3#include <linux/kernel.h>
4#include <mach/hardware.h>
4#include <mach/imx-regs.h> 5#include <mach/imx-regs.h>
5 6
6#define IMX_GPIO_ALLOC_MODE_NORMAL 0 7#define IMX_GPIO_ALLOC_MODE_NORMAL 0
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 16dc9ea08393..eeb00240d784 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -23,6 +23,7 @@
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
25#include <mach/kirkwood.h> 25#include <mach/kirkwood.h>
26#include <mach/bridge-regs.h>
26#include <plat/cache-feroceon-l2.h> 27#include <plat/cache-feroceon-l2.h>
27#include <plat/ehci-orion.h> 28#include <plat/ehci-orion.h>
28#include <plat/mvsdio.h> 29#include <plat/mvsdio.h>
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..4f7029f521cc
--- /dev/null
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -0,0 +1,42 @@
1/*
2 * arch/arm/mach-kirkwood/include/mach/bridge-regs.h
3 *
4 * Mbus-L to Mbus Bridge Registers
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_BRIDGE_REGS_H
12#define __ASM_ARCH_BRIDGE_REGS_H
13
14#include <mach/kirkwood.h>
15
16#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
17#define CPU_RESET 0x00000002
18
19#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
20#define SOFT_RESET_OUT_EN 0x00000004
21
22#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
23#define SOFT_RESET 0x00000001
24
25#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
26#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
27#define BRIDGE_INT_TIMER0 0x0002
28#define BRIDGE_INT_TIMER1 0x0004
29#define BRIDGE_INT_TIMER1_CLR (~0x0004)
30
31#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
32#define IRQ_CAUSE_LOW_OFF 0x0000
33#define IRQ_MASK_LOW_OFF 0x0004
34#define IRQ_CAUSE_HIGH_OFF 0x0010
35#define IRQ_MASK_HIGH_OFF 0x0014
36
37#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
38
39#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
40#define L2_WRITETHROUGH 0x00000010
41
42#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S
index c0cc5b5c82ac..a4a55c199d77 100644
--- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S
+++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S
@@ -6,7 +6,7 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7*/ 7*/
8 8
9#include <mach/kirkwood.h> 9#include <mach/bridge-regs.h>
10 10
11 .macro addruart,rx 11 .macro addruart,rx
12 mrc p15, 0, \rx, c1, c0 12 mrc p15, 0, \rx, c1, c0
diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S
index 83e0cba77b36..8939d36f893c 100644
--- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S
+++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S
@@ -8,7 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#include <mach/kirkwood.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq 13 .macro disable_fiq
14 .endm 14 .endm
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 38c986853590..b3e13958821d 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -44,44 +44,6 @@
44#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M 44#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
45 45
46/* 46/*
47 * MBUS bridge registers.
48 */
49#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
50#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
51#define CPU_RESET 0x00000002
52#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
53#define SOFT_RESET_OUT_EN 0x00000004
54#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
55#define SOFT_RESET 0x00000001
56#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
57#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
58#define BRIDGE_INT_TIMER0 0x0002
59#define BRIDGE_INT_TIMER1 0x0004
60#define BRIDGE_INT_TIMER1_CLR (~0x0004)
61#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
62#define IRQ_CAUSE_LOW_OFF 0x0000
63#define IRQ_MASK_LOW_OFF 0x0004
64#define IRQ_CAUSE_HIGH_OFF 0x0010
65#define IRQ_MASK_HIGH_OFF 0x0014
66#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
67#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
68#define L2_WRITETHROUGH 0x00000010
69
70/*
71 * Supported devices and revisions.
72 */
73#define MV88F6281_DEV_ID 0x6281
74#define MV88F6281_REV_Z0 0
75#define MV88F6281_REV_A0 2
76
77#define MV88F6192_DEV_ID 0x6192
78#define MV88F6192_REV_Z0 0
79#define MV88F6192_REV_A0 2
80
81#define MV88F6180_DEV_ID 0x6180
82#define MV88F6180_REV_A0 2
83
84/*
85 * Register Map 47 * Register Map
86 */ 48 */
87#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) 49#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
@@ -99,6 +61,8 @@
99#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) 61#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)
100#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) 62#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
101 63
64#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
65
102#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) 66#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
103 67
104#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) 68#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
@@ -119,5 +83,18 @@
119 83
120#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) 84#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
121 85
86/*
87 * Supported devices and revisions.
88 */
89#define MV88F6281_DEV_ID 0x6281
90#define MV88F6281_REV_Z0 0
91#define MV88F6281_REV_A0 2
92
93#define MV88F6192_DEV_ID 0x6192
94#define MV88F6192_REV_Z0 0
95#define MV88F6192_REV_A0 2
96
97#define MV88F6180_DEV_ID 0x6180
98#define MV88F6180_REV_A0 2
122 99
123#endif 100#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
index 23a1914c1da8..7568e95d279b 100644
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ b/arch/arm/mach-kirkwood/include/mach/system.h
@@ -9,8 +9,7 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/hardware.h> 12#include <mach/bridge-regs.h>
13#include <mach/kirkwood.h>
14 13
15static inline void arch_idle(void) 14static inline void arch_idle(void)
16{ 15{
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 06083b23bb44..28020abf49e1 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <mach/bridge-regs.h>
15#include <plat/irq.h> 16#include <plat/irq.h>
16#include <asm/gpio.h> 17#include <asm/gpio.h>
17#include "common.h" 18#include "common.h"
diff --git a/arch/arm/mach-loki/addr-map.c b/arch/arm/mach-loki/addr-map.c
index 0332d8f5c18c..b9537c97beba 100644
--- a/arch/arm/mach-loki/addr-map.c
+++ b/arch/arm/mach-loki/addr-map.c
@@ -38,6 +38,7 @@
38/* 38/*
39 * CPU Address Decode Windows registers 39 * CPU Address Decode Windows registers
40 */ 40 */
41#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x))
41#define CPU_WIN_CTRL(n) BRIDGE_REG(0x000 | ((n) << 4)) 42#define CPU_WIN_CTRL(n) BRIDGE_REG(0x000 | ((n) << 4))
42#define CPU_WIN_BASE(n) BRIDGE_REG(0x004 | ((n) << 4)) 43#define CPU_WIN_BASE(n) BRIDGE_REG(0x004 | ((n) << 4))
43#define CPU_WIN_REMAP_LO(n) BRIDGE_REG(0x008 | ((n) << 4)) 44#define CPU_WIN_REMAP_LO(n) BRIDGE_REG(0x008 | ((n) << 4))
diff --git a/arch/arm/mach-loki/include/mach/bridge-regs.h b/arch/arm/mach-loki/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..a3fabf70044f
--- /dev/null
+++ b/arch/arm/mach-loki/include/mach/bridge-regs.h
@@ -0,0 +1,33 @@
1/*
2 * arch/arm/mach-loki/include/mach/bridge-regs.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_BRIDGE_REGS_H
10#define __ASM_ARCH_BRIDGE_REGS_H
11
12#include <mach/loki.h>
13
14#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
15#define SOFT_RESET_OUT_EN 0x00000004
16
17#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
18#define SOFT_RESET 0x00000001
19
20#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
21
22#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
23#define BRIDGE_INT_TIMER0 0x0002
24#define BRIDGE_INT_TIMER1 0x0004
25#define BRIDGE_INT_TIMER1_CLR 0x0004
26
27#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
28#define IRQ_CAUSE_OFF 0x0000
29#define IRQ_MASK_OFF 0x0004
30
31#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
32
33#endif
diff --git a/arch/arm/mach-loki/include/mach/entry-macro.S b/arch/arm/mach-loki/include/mach/entry-macro.S
index 332af38ec13c..bc917ed3a62d 100644
--- a/arch/arm/mach-loki/include/mach/entry-macro.S
+++ b/arch/arm/mach-loki/include/mach/entry-macro.S
@@ -8,7 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#include <mach/loki.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq 13 .macro disable_fiq
14 .endm 14 .endm
diff --git a/arch/arm/mach-loki/include/mach/loki.h b/arch/arm/mach-loki/include/mach/loki.h
index c00af6ba5578..bfca7c265f43 100644
--- a/arch/arm/mach-loki/include/mach/loki.h
+++ b/arch/arm/mach-loki/include/mach/loki.h
@@ -58,20 +58,6 @@
58#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) 58#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
59 59
60#define BRIDGE_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x20000) 60#define BRIDGE_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x20000)
61#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x))
62#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
63#define SOFT_RESET_OUT_EN 0x00000004
64#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
65#define SOFT_RESET 0x00000001
66#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
67#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
68#define BRIDGE_INT_TIMER0 0x0002
69#define BRIDGE_INT_TIMER1 0x0004
70#define BRIDGE_INT_TIMER1_CLR 0x0004
71#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
72#define IRQ_CAUSE_OFF 0x0000
73#define IRQ_MASK_OFF 0x0004
74#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
75 61
76#define PCIE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x30000) 62#define PCIE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x30000)
77 63
diff --git a/arch/arm/mach-loki/include/mach/system.h b/arch/arm/mach-loki/include/mach/system.h
index c1de36fe9b37..71895199a534 100644
--- a/arch/arm/mach-loki/include/mach/system.h
+++ b/arch/arm/mach-loki/include/mach/system.h
@@ -9,8 +9,7 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/hardware.h> 12#include <mach/bridge-regs.h>
13#include <mach/loki.h>
14 13
15static inline void arch_idle(void) 14static inline void arch_idle(void)
16{ 15{
diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c
index e1f97338d5b7..76b211bfcca2 100644
--- a/arch/arm/mach-loki/irq.c
+++ b/arch/arm/mach-loki/irq.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <mach/bridge-regs.h>
15#include <plat/irq.h> 16#include <plat/irq.h>
16#include "common.h" 17#include "common.h"
17 18
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index a575daaa62d1..9ba595083dab 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -20,6 +20,7 @@
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21#include <asm/mach/time.h> 21#include <asm/mach/time.h>
22#include <mach/mv78xx0.h> 22#include <mach/mv78xx0.h>
23#include <mach/bridge-regs.h>
23#include <plat/cache-feroceon-l2.h> 24#include <plat/cache-feroceon-l2.h>
24#include <plat/ehci-orion.h> 25#include <plat/ehci-orion.h>
25#include <plat/orion_nand.h> 26#include <plat/orion_nand.h>
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..2d14c4fe294d
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -0,0 +1,39 @@
1/*
2 * arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_BRIDGE_REGS_H
10#define __ASM_ARCH_BRIDGE_REGS_H
11
12#include <mach/mv78xx0.h>
13
14#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
15#define L2_WRITETHROUGH 0x00020000
16
17#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
18#define SOFT_RESET_OUT_EN 0x00000004
19
20#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
21#define SOFT_RESET 0x00000001
22
23#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
24#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
25#define BRIDGE_INT_TIMER0 0x0002
26#define BRIDGE_INT_TIMER1 0x0004
27#define BRIDGE_INT_TIMER1_CLR (~0x0004)
28
29#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
30#define IRQ_CAUSE_ERR_OFF 0x0000
31#define IRQ_CAUSE_LOW_OFF 0x0004
32#define IRQ_CAUSE_HIGH_OFF 0x0008
33#define IRQ_MASK_ERR_OFF 0x000c
34#define IRQ_MASK_LOW_OFF 0x0010
35#define IRQ_MASK_HIGH_OFF 0x0014
36
37#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
38
39#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index fbfb2693ce6c..66ae2d29e773 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -8,7 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#include <mach/mv78xx0.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq 13 .macro disable_fiq
14 .endm 14 .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 582cffc733ad..d715b92b0908 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -59,37 +59,6 @@
59 * Core-specific peripheral registers. 59 * Core-specific peripheral registers.
60 */ 60 */
61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) 61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
62#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
63#define L2_WRITETHROUGH 0x00020000
64#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
65#define SOFT_RESET_OUT_EN 0x00000004
66#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
67#define SOFT_RESET 0x00000001
68#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
69#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
70#define BRIDGE_INT_TIMER0 0x0002
71#define BRIDGE_INT_TIMER1 0x0004
72#define BRIDGE_INT_TIMER1_CLR (~0x0004)
73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
74#define IRQ_CAUSE_ERR_OFF 0x0000
75#define IRQ_CAUSE_LOW_OFF 0x0004
76#define IRQ_CAUSE_HIGH_OFF 0x0008
77#define IRQ_MASK_ERR_OFF 0x000c
78#define IRQ_MASK_LOW_OFF 0x0010
79#define IRQ_MASK_HIGH_OFF 0x0014
80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
81
82/*
83 * Supported devices and revisions.
84 */
85#define MV78X00_Z0_DEV_ID 0x6381
86#define MV78X00_REV_Z0 1
87
88#define MV78100_DEV_ID 0x7810
89#define MV78100_REV_A0 1
90
91#define MV78200_DEV_ID 0x7820
92#define MV78200_REV_A0 1
93 62
94/* 63/*
95 * Register Map 64 * Register Map
@@ -135,5 +104,16 @@
135 104
136#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000) 105#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000)
137 106
107/*
108 * Supported devices and revisions.
109 */
110#define MV78X00_Z0_DEV_ID 0x6381
111#define MV78X00_REV_Z0 1
112
113#define MV78100_DEV_ID 0x7810
114#define MV78100_REV_A0 1
115
116#define MV78200_DEV_ID 0x7820
117#define MV78200_REV_A0 1
138 118
139#endif 119#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
index 1d6350b22d0b..66e7ce4e90bd 100644
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ b/arch/arm/mach-mv78xx0/include/mach/system.h
@@ -9,8 +9,7 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/hardware.h> 12#include <mach/bridge-regs.h>
13#include <mach/mv78xx0.h>
14 13
15static inline void arch_idle(void) 14static inline void arch_idle(void)
16{ 15{
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 30b7e4bcdbc7..f289b0ea7dcf 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -13,7 +13,7 @@
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <asm/gpio.h> 15#include <asm/gpio.h>
16#include <mach/mv78xx0.h> 16#include <mach/bridge-regs.h>
17#include <plat/irq.h> 17#include <plat/irq.h>
18#include "common.h" 18#include "common.h"
19 19
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 719957e05d9e..c14d12137276 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -57,12 +57,14 @@
57/* 57/*
58 * Helpers to get DDR bank info 58 * Helpers to get DDR bank info
59 */ 59 */
60#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x))
60#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3)) 61#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3))
61#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3)) 62#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3))
62 63
63/* 64/*
64 * CPU Address Decode Windows registers 65 * CPU Address Decode Windows registers
65 */ 66 */
67#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x))
66#define CPU_WIN_CTRL(n) ORION5X_BRIDGE_REG(0x000 | ((n) << 4)) 68#define CPU_WIN_CTRL(n) ORION5X_BRIDGE_REG(0x000 | ((n) << 4))
67#define CPU_WIN_BASE(n) ORION5X_BRIDGE_REG(0x004 | ((n) << 4)) 69#define CPU_WIN_BASE(n) ORION5X_BRIDGE_REG(0x004 | ((n) << 4))
68#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4)) 70#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..be896e59d3e7
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/bridge-regs.h
3 *
4 * Orion CPU Bridge Registers
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_BRIDGE_REGS_H
12#define __ASM_ARCH_BRIDGE_REGS_H
13
14#include <mach/orion5x.h>
15
16#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE | 0x100)
17
18#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104)
19
20#define CPU_RESET_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108)
21#define WDT_RESET 0x0002
22
23#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
24
25#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)
26
27#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
28#define WDT_INT_REQ 0x0008
29
30#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114)
31#define BRIDGE_INT_TIMER0 0x0002
32#define BRIDGE_INT_TIMER1 0x0004
33#define BRIDGE_INT_TIMER1_CLR (~0x0004)
34
35#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)
36
37#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204)
38
39#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)
40
41#endif
diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S
index 4351937035cd..d658992e5401 100644
--- a/arch/arm/mach-orion5x/include/mach/entry-macro.S
+++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S
@@ -8,7 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#include <mach/orion5x.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq 13 .macro disable_fiq
14 .endm 14 .endm
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 67bda31406dd..377a773ae53f 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -61,30 +61,10 @@
61#define ORION5X_PCI_MEM_SIZE SZ_128M 61#define ORION5X_PCI_MEM_SIZE SZ_128M
62 62
63/******************************************************************************* 63/*******************************************************************************
64 * Supported Devices & Revisions
65 ******************************************************************************/
66/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */
67#define MV88F5181_DEV_ID 0x5181
68#define MV88F5181_REV_B1 3
69#define MV88F5181L_REV_A0 8
70#define MV88F5181L_REV_A1 9
71/* Orion-NAS (88F5182) */
72#define MV88F5182_DEV_ID 0x5182
73#define MV88F5182_REV_A2 2
74/* Orion-2 (88F5281) */
75#define MV88F5281_DEV_ID 0x5281
76#define MV88F5281_REV_D0 4
77#define MV88F5281_REV_D1 5
78#define MV88F5281_REV_D2 6
79/* Orion-1-90 (88F6183) */
80#define MV88F6183_DEV_ID 0x6183
81#define MV88F6183_REV_B0 3
82
83/*******************************************************************************
84 * Orion Registers Map 64 * Orion Registers Map
85 ******************************************************************************/ 65 ******************************************************************************/
66
86#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000) 67#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000)
87#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x))
88 68
89#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 69#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
90#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 70#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
@@ -97,34 +77,25 @@
97#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) 77#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
98 78
99#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) 79#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000)
100#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x))
101#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)
102 80
103#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) 81#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000)
104#define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE | (x))
105 82
106#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000) 83#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000)
107#define ORION5X_PCIE_REG(x) (ORION5X_PCIE_VIRT_BASE | (x))
108 84
109#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000) 85#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000)
110#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) 86#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000)
111#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x))
112 87
113#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900) 88#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900)
114#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900) 89#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900)
115#define ORION5X_XOR_REG(x) (ORION5X_XOR_VIRT_BASE | (x))
116 90
117#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) 91#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000)
118#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) 92#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000)
119#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x))
120 93
121#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) 94#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000)
122#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) 95#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000)
123#define ORION5X_SATA_REG(x) (ORION5X_SATA_VIRT_BASE | (x))
124 96
125#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) 97#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000)
126#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) 98#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000)
127#define ORION5X_USB1_REG(x) (ORION5X_USB1_VIRT_BASE | (x))
128 99
129/******************************************************************************* 100/*******************************************************************************
130 * Device Bus Registers 101 * Device Bus Registers
@@ -142,23 +113,24 @@
142#define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) 113#define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0)
143#define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) 114#define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4)
144 115
145/*************************************************************************** 116/*******************************************************************************
146 * Orion CPU Bridge Registers 117 * Supported Devices & Revisions
147 **************************************************************************/ 118 ******************************************************************************/
148#define CPU_CONF ORION5X_BRIDGE_REG(0x100) 119/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */
149#define CPU_CTRL ORION5X_BRIDGE_REG(0x104) 120#define MV88F5181_DEV_ID 0x5181
150#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108) 121#define MV88F5181_REV_B1 3
151#define WDT_RESET 0x0002 122#define MV88F5181L_REV_A0 8
152#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c) 123#define MV88F5181L_REV_A1 9
153#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C) 124/* Orion-NAS (88F5182) */
154#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110) 125#define MV88F5182_DEV_ID 0x5182
155#define WDT_INT_REQ 0x0008 126#define MV88F5182_REV_A2 2
156#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114) 127/* Orion-2 (88F5281) */
157#define BRIDGE_INT_TIMER0 0x0002 128#define MV88F5281_DEV_ID 0x5281
158#define BRIDGE_INT_TIMER1 0x0004 129#define MV88F5281_REV_D0 4
159#define BRIDGE_INT_TIMER1_CLR (~0x0004) 130#define MV88F5281_REV_D1 5
160#define MAIN_IRQ_CAUSE ORION5X_BRIDGE_REG(0x200) 131#define MV88F5281_REV_D2 6
161#define MAIN_IRQ_MASK ORION5X_BRIDGE_REG(0x204) 132/* Orion-1-90 (88F6183) */
162 133#define MV88F6183_DEV_ID 0x6183
134#define MV88F6183_REV_B0 3
163 135
164#endif 136#endif
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
index 9b8db1dcfa83..e912490fff23 100644
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ b/arch/arm/mach-orion5x/include/mach/system.h
@@ -11,8 +11,7 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <mach/hardware.h> 14#include <mach/bridge-regs.h>
15#include <mach/orion5x.h>
16 15
17static inline void arch_idle(void) 16static inline void arch_idle(void)
18{ 17{
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index e03f7b45cb0d..d7512b925a85 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -15,7 +15,7 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <asm/gpio.h> 17#include <asm/gpio.h>
18#include <mach/orion5x.h> 18#include <mach/bridge-regs.h>
19#include <plat/irq.h> 19#include <plat/irq.h>
20#include "common.h" 20#include "common.h"
21 21
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 68acca98e638..41e6d5033d54 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -26,6 +26,7 @@
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/mach/pci.h> 27#include <asm/mach/pci.h>
28#include <mach/orion5x.h> 28#include <mach/orion5x.h>
29#include <mach/bridge-regs.h>
29#include "common.h" 30#include "common.h"
30#include "mpp.h" 31#include "mpp.h"
31 32
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index d0a785a3b880..36dc5413cc97 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -196,6 +196,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
196/***************************************************************************** 196/*****************************************************************************
197 * PCI controller 197 * PCI controller
198 ****************************************************************************/ 198 ****************************************************************************/
199#define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE | (x))
199#define PCI_MODE ORION5X_PCI_REG(0xd00) 200#define PCI_MODE ORION5X_PCI_REG(0xd00)
200#define PCI_CMD ORION5X_PCI_REG(0xc00) 201#define PCI_CMD ORION5X_PCI_REG(0xc00)
201#define PCI_P2P_CONF ORION5X_PCI_REG(0x1d14) 202#define PCI_P2P_CONF ORION5X_PCI_REG(0x1d14)
diff --git a/arch/arm/mach-pxa/include/mach/audio.h b/arch/arm/mach-pxa/include/mach/audio.h
index f82f96dd1053..16eb02552d5d 100644
--- a/arch/arm/mach-pxa/include/mach/audio.h
+++ b/arch/arm/mach-pxa/include/mach/audio.h
@@ -4,12 +4,22 @@
4#include <sound/core.h> 4#include <sound/core.h>
5#include <sound/pcm.h> 5#include <sound/pcm.h>
6 6
7/*
8 * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
9 * a -1 value means no gpio will be used for reset
10
11 * reset_gpio should only be specified for pxa27x CPUs where a silicon
12 * bug prevents correct operation of the reset line. If not specified,
13 * the default behaviour on these CPUs is to consider gpio 113 as the
14 * AC97 reset line, which is the default on most boards.
15 */
7typedef struct { 16typedef struct {
8 int (*startup)(struct snd_pcm_substream *, void *); 17 int (*startup)(struct snd_pcm_substream *, void *);
9 void (*shutdown)(struct snd_pcm_substream *, void *); 18 void (*shutdown)(struct snd_pcm_substream *, void *);
10 void (*suspend)(void *); 19 void (*suspend)(void *);
11 void (*resume)(void *); 20 void (*resume)(void *);
12 void *priv; 21 void *priv;
22 int reset_gpio;
13} pxa2xx_audio_ops_t; 23} pxa2xx_audio_ops_t;
14 24
15extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); 25extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops);
diff --git a/arch/arm/mach-pxa/include/mach/palmasoc.h b/arch/arm/mach-pxa/include/mach/palmasoc.h
index 6c4b1f7de20a..58afb30d5298 100644
--- a/arch/arm/mach-pxa/include/mach/palmasoc.h
+++ b/arch/arm/mach-pxa/include/mach/palmasoc.h
@@ -1,13 +1,8 @@
1#ifndef _INCLUDE_PALMASOC_H_ 1#ifndef _INCLUDE_PALMASOC_H_
2#define _INCLUDE_PALMASOC_H_ 2#define _INCLUDE_PALMASOC_H_
3
3struct palm27x_asoc_info { 4struct palm27x_asoc_info {
4 int jack_gpio; 5 int jack_gpio;
5}; 6};
6 7
7#ifdef CONFIG_SND_PXA2XX_SOC_PALM27X
8void __init palm27x_asoc_set_pdata(struct palm27x_asoc_info *data);
9#else
10static inline void palm27x_asoc_set_pdata(struct palm27x_asoc_info *data) {}
11#endif
12
13#endif 8#endif
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 9203b069b35c..ff8052ce0a05 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -742,6 +742,10 @@ struct i2c_pxa_platform_data i2c_pdata = {
742 .fast_mode = 1, 742 .fast_mode = 1,
743}; 743};
744 744
745static pxa2xx_audio_ops_t mioa701_ac97_info = {
746 .reset_gpio = 95,
747};
748
745/* 749/*
746 * Mio global 750 * Mio global
747 */ 751 */
@@ -815,7 +819,7 @@ static void __init mioa701_machine_init(void)
815 pxa_set_keypad_info(&mioa701_keypad_info); 819 pxa_set_keypad_info(&mioa701_keypad_info);
816 wm97xx_bat_set_pdata(&mioa701_battery_data); 820 wm97xx_bat_set_pdata(&mioa701_battery_data);
817 pxa_set_udc_info(&mioa701_udc_info); 821 pxa_set_udc_info(&mioa701_udc_info);
818 pxa_set_ac97_info(NULL); 822 pxa_set_ac97_info(&mioa701_ac97_info);
819 pm_power_off = mioa701_poweroff; 823 pm_power_off = mioa701_poweroff;
820 arm_pm_restart = mioa701_restart; 824 arm_pm_restart = mioa701_restart;
821 platform_add_devices(devices, ARRAY_SIZE(devices)); 825 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index ecf5910e39d7..1cec1806f002 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -477,10 +477,22 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = {
477/****************************************************************************** 477/******************************************************************************
478 * aSoC audio 478 * aSoC audio
479 ******************************************************************************/ 479 ******************************************************************************/
480static struct palm27x_asoc_info palm27x_asoc_pdata = { 480static struct palm27x_asoc_info palmld_asoc_pdata = {
481 .jack_gpio = GPIO_NR_PALMLD_EARPHONE_DETECT, 481 .jack_gpio = GPIO_NR_PALMLD_EARPHONE_DETECT,
482}; 482};
483 483
484static pxa2xx_audio_ops_t palmld_ac97_pdata = {
485 .reset_gpio = 95,
486};
487
488static struct platform_device palmld_asoc = {
489 .name = "palm27x-asoc",
490 .id = -1,
491 .dev = {
492 .platform_data = &palmld_asoc_pdata,
493 },
494};
495
484/****************************************************************************** 496/******************************************************************************
485 * Framebuffer 497 * Framebuffer
486 ******************************************************************************/ 498 ******************************************************************************/
@@ -544,6 +556,7 @@ static struct platform_device *devices[] __initdata = {
544 &palmld_backlight, 556 &palmld_backlight,
545 &palmld_leds, 557 &palmld_leds,
546 &power_supply, 558 &power_supply,
559 &palmld_asoc,
547}; 560};
548 561
549static struct map_desc palmld_io_desc[] __initdata = { 562static struct map_desc palmld_io_desc[] __initdata = {
@@ -573,11 +586,10 @@ static void __init palmld_init(void)
573 586
574 set_pxa_fb_info(&palmld_lcd_screen); 587 set_pxa_fb_info(&palmld_lcd_screen);
575 pxa_set_mci_info(&palmld_mci_platform_data); 588 pxa_set_mci_info(&palmld_mci_platform_data);
576 pxa_set_ac97_info(NULL); 589 pxa_set_ac97_info(&palmld_ac97_pdata);
577 pxa_set_ficp_info(&palmld_ficp_platform_data); 590 pxa_set_ficp_info(&palmld_ficp_platform_data);
578 pxa_set_keypad_info(&palmld_keypad_platform_data); 591 pxa_set_keypad_info(&palmld_keypad_platform_data);
579 wm97xx_bat_set_pdata(&wm97xx_batt_pdata); 592 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
580 palm27x_asoc_set_pdata(&palm27x_asoc_pdata);
581 593
582 platform_add_devices(devices, ARRAY_SIZE(devices)); 594 platform_add_devices(devices, ARRAY_SIZE(devices));
583} 595}
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index d7f81068c613..30662363907b 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -420,10 +420,22 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = {
420/****************************************************************************** 420/******************************************************************************
421 * aSoC audio 421 * aSoC audio
422 ******************************************************************************/ 422 ******************************************************************************/
423static struct palm27x_asoc_info palm27x_asoc_pdata = { 423static struct palm27x_asoc_info palmt5_asoc_pdata = {
424 .jack_gpio = GPIO_NR_PALMT5_EARPHONE_DETECT, 424 .jack_gpio = GPIO_NR_PALMT5_EARPHONE_DETECT,
425}; 425};
426 426
427static pxa2xx_audio_ops_t palmt5_ac97_pdata = {
428 .reset_gpio = 95,
429};
430
431static struct platform_device palmt5_asoc = {
432 .name = "palm27x-asoc",
433 .id = -1,
434 .dev = {
435 .platform_data = &palmt5_asoc_pdata,
436 },
437};
438
427/****************************************************************************** 439/******************************************************************************
428 * Framebuffer 440 * Framebuffer
429 ******************************************************************************/ 441 ******************************************************************************/
@@ -486,6 +498,7 @@ static struct platform_device *devices[] __initdata = {
486#endif 498#endif
487 &palmt5_backlight, 499 &palmt5_backlight,
488 &power_supply, 500 &power_supply,
501 &palmt5_asoc,
489}; 502};
490 503
491/* setup udc GPIOs initial state */ 504/* setup udc GPIOs initial state */
@@ -504,12 +517,11 @@ static void __init palmt5_init(void)
504 set_pxa_fb_info(&palmt5_lcd_screen); 517 set_pxa_fb_info(&palmt5_lcd_screen);
505 pxa_set_mci_info(&palmt5_mci_platform_data); 518 pxa_set_mci_info(&palmt5_mci_platform_data);
506 palmt5_udc_init(); 519 palmt5_udc_init();
520 pxa_set_ac97_info(&palmt5_ac97_pdata);
507 pxa_set_udc_info(&palmt5_udc_info); 521 pxa_set_udc_info(&palmt5_udc_info);
508 pxa_set_ac97_info(NULL);
509 pxa_set_ficp_info(&palmt5_ficp_platform_data); 522 pxa_set_ficp_info(&palmt5_ficp_platform_data);
510 pxa_set_keypad_info(&palmt5_keypad_platform_data); 523 pxa_set_keypad_info(&palmt5_keypad_platform_data);
511 wm97xx_bat_set_pdata(&wm97xx_batt_pdata); 524 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
512 palm27x_asoc_set_pdata(&palm27x_asoc_pdata);
513 platform_add_devices(devices, ARRAY_SIZE(devices)); 525 platform_add_devices(devices, ARRAY_SIZE(devices));
514} 526}
515 527
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 14393d0ad8b8..e2d44b1a8a9b 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -40,6 +40,7 @@
40#include <mach/irda.h> 40#include <mach/irda.h>
41#include <mach/pxa27x_keypad.h> 41#include <mach/pxa27x_keypad.h>
42#include <mach/udc.h> 42#include <mach/udc.h>
43#include <mach/palmasoc.h>
43 44
44#include "generic.h" 45#include "generic.h"
45#include "devices.h" 46#include "devices.h"
@@ -434,6 +435,25 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = {
434}; 435};
435 436
436/****************************************************************************** 437/******************************************************************************
438 * aSoC audio
439 ******************************************************************************/
440static struct palm27x_asoc_info palmtx_asoc_pdata = {
441 .jack_gpio = GPIO_NR_PALMTX_EARPHONE_DETECT,
442};
443
444static pxa2xx_audio_ops_t palmtx_ac97_pdata = {
445 .reset_gpio = 95,
446};
447
448static struct platform_device palmtx_asoc = {
449 .name = "palm27x-asoc",
450 .id = -1,
451 .dev = {
452 .platform_data = &palmtx_asoc_pdata,
453 },
454};
455
456/******************************************************************************
437 * Framebuffer 457 * Framebuffer
438 ******************************************************************************/ 458 ******************************************************************************/
439static struct pxafb_mode_info palmtx_lcd_modes[] = { 459static struct pxafb_mode_info palmtx_lcd_modes[] = {
@@ -495,6 +515,7 @@ static struct platform_device *devices[] __initdata = {
495#endif 515#endif
496 &palmtx_backlight, 516 &palmtx_backlight,
497 &power_supply, 517 &power_supply,
518 &palmtx_asoc,
498}; 519};
499 520
500static struct map_desc palmtx_io_desc[] __initdata = { 521static struct map_desc palmtx_io_desc[] __initdata = {
@@ -529,8 +550,8 @@ static void __init palmtx_init(void)
529 set_pxa_fb_info(&palmtx_lcd_screen); 550 set_pxa_fb_info(&palmtx_lcd_screen);
530 pxa_set_mci_info(&palmtx_mci_platform_data); 551 pxa_set_mci_info(&palmtx_mci_platform_data);
531 palmtx_udc_init(); 552 palmtx_udc_init();
553 pxa_set_ac97_info(&palmtx_ac97_pdata);
532 pxa_set_udc_info(&palmtx_udc_info); 554 pxa_set_udc_info(&palmtx_udc_info);
533 pxa_set_ac97_info(NULL);
534 pxa_set_ficp_info(&palmtx_ficp_platform_data); 555 pxa_set_ficp_info(&palmtx_ficp_platform_data);
535 pxa_set_keypad_info(&palmtx_keypad_platform_data); 556 pxa_set_keypad_info(&palmtx_keypad_platform_data);
536 wm97xx_bat_set_pdata(&wm97xx_batt_pdata); 557 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6112740b4ae9..6c12b5a3132f 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -377,7 +377,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
377#include <linux/i2c/pca953x.h> 377#include <linux/i2c/pca953x.h>
378 378
379static struct pca953x_platform_data pca9536_data = { 379static struct pca953x_platform_data pca9536_data = {
380 .gpio_base = NR_BUILTIN_GPIO + 1, 380 .gpio_base = NR_BUILTIN_GPIO,
381}; 381};
382 382
383static int gpio_bus_switch; 383static int gpio_bus_switch;
@@ -405,9 +405,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
405 int ret; 405 int ret;
406 406
407 if (!gpio_bus_switch) { 407 if (!gpio_bus_switch) {
408 ret = gpio_request(NR_BUILTIN_GPIO + 1, "camera"); 408 ret = gpio_request(NR_BUILTIN_GPIO, "camera");
409 if (!ret) { 409 if (!ret) {
410 gpio_bus_switch = NR_BUILTIN_GPIO + 1; 410 gpio_bus_switch = NR_BUILTIN_GPIO;
411 gpio_direction_output(gpio_bus_switch, 0); 411 gpio_direction_output(gpio_bus_switch, 0);
412 } else 412 } else
413 gpio_bus_switch = -EINVAL; 413 gpio_bus_switch = -EINVAL;
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 2faf9dba4ef7..de8a001fc3a9 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -16,7 +16,7 @@
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <asm/mach/time.h> 18#include <asm/mach/time.h>
19#include <mach/hardware.h> 19#include <mach/bridge-regs.h>
20 20
21/* 21/*
22 * Number of timer ticks per jiffy. 22 * Number of timer ticks per jiffy.
diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c
index 1cd02f5a23a0..bc43f78f6f0b 100644
--- a/drivers/pcmcia/pxa2xx_sharpsl.c
+++ b/drivers/pcmcia/pxa2xx_sharpsl.c
@@ -255,6 +255,9 @@ static int __init sharpsl_pcmcia_init(void)
255{ 255{
256 int ret; 256 int ret;
257 257
258 if (!platform_scoop_config)
259 return -ENODEV;
260
258 sharpsl_pcmcia_ops.nr = platform_scoop_config->num_devs; 261 sharpsl_pcmcia_ops.nr = platform_scoop_config->num_devs;
259 sharpsl_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); 262 sharpsl_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
260 263
diff --git a/drivers/watchdog/orion5x_wdt.c b/drivers/watchdog/orion5x_wdt.c
index 7529616739d2..2cde568e4fb0 100644
--- a/drivers/watchdog/orion5x_wdt.c
+++ b/drivers/watchdog/orion5x_wdt.c
@@ -22,6 +22,7 @@
22#include <linux/uaccess.h> 22#include <linux/uaccess.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/spinlock.h> 24#include <linux/spinlock.h>
25#include <mach/bridge-regs.h>
25#include <plat/orion5x_wdt.h> 26#include <plat/orion5x_wdt.h>
26 27
27/* 28/*
diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h
index 2c894b600e5b..2fd3d251d9a5 100644
--- a/include/sound/pxa2xx-lib.h
+++ b/include/sound/pxa2xx-lib.h
@@ -42,19 +42,4 @@ extern int pxa2xx_ac97_hw_resume(void);
42extern int pxa2xx_ac97_hw_probe(struct platform_device *dev); 42extern int pxa2xx_ac97_hw_probe(struct platform_device *dev);
43extern void pxa2xx_ac97_hw_remove(struct platform_device *dev); 43extern void pxa2xx_ac97_hw_remove(struct platform_device *dev);
44 44
45/* AC97 platform_data */
46/**
47 * struct pxa2xx_ac97_platform_data - pxa ac97 platform data
48 * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
49 * a -1 value means no gpio will be used for reset
50 *
51 * Platform data should only be specified for pxa27x CPUs where a silicon bug
52 * prevents correct operation of the reset line. If not specified, the default
53 * behaviour is to consider gpio 113 as the AC97 reset line, which is the
54 * default on most boards.
55 */
56struct pxa2xx_ac97_platform_data {
57 int reset_gpio;
58};
59
60#endif 45#endif
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 0afd1a8226fb..a2c12d105c9a 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -364,7 +364,7 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume);
364int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) 364int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
365{ 365{
366 int ret; 366 int ret;
367 struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data; 367 pxa2xx_audio_ops_t *pdata = dev->dev.platform_data;
368 368
369 if (pdata) { 369 if (pdata) {
370 switch (pdata->reset_gpio) { 370 switch (pdata->reset_gpio) {
diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c
index 48a73f64500b..44fcc4e01e08 100644
--- a/sound/soc/pxa/palm27x.c
+++ b/sound/soc/pxa/palm27x.c
@@ -200,7 +200,7 @@ static struct snd_soc_device palm27x_snd_devdata = {
200 200
201static struct platform_device *palm27x_snd_device; 201static struct platform_device *palm27x_snd_device;
202 202
203static int __init palm27x_asoc_init(void) 203static int palm27x_asoc_probe(struct platform_device *pdev)
204{ 204{
205 int ret; 205 int ret;
206 206
@@ -208,6 +208,10 @@ static int __init palm27x_asoc_init(void)
208 machine_is_palmld())) 208 machine_is_palmld()))
209 return -ENODEV; 209 return -ENODEV;
210 210
211 if (pdev->dev.platform_data)
212 palm27x_ep_gpio = ((struct palm27x_asoc_info *)
213 (pdev->dev.platform_data))->jack_gpio;
214
211 ret = gpio_request(palm27x_ep_gpio, "Headphone Jack"); 215 ret = gpio_request(palm27x_ep_gpio, "Headphone Jack");
212 if (ret) 216 if (ret)
213 return ret; 217 return ret;
@@ -245,16 +249,31 @@ err_alloc:
245 return ret; 249 return ret;
246} 250}
247 251
248static void __exit palm27x_asoc_exit(void) 252static int __devexit palm27x_asoc_remove(struct platform_device *pdev)
249{ 253{
250 free_irq(gpio_to_irq(palm27x_ep_gpio), NULL); 254 free_irq(gpio_to_irq(palm27x_ep_gpio), NULL);
251 gpio_free(palm27x_ep_gpio); 255 gpio_free(palm27x_ep_gpio);
252 platform_device_unregister(palm27x_snd_device); 256 platform_device_unregister(palm27x_snd_device);
257 return 0;
253} 258}
254 259
255void __init palm27x_asoc_set_pdata(struct palm27x_asoc_info *data) 260static struct platform_driver palm27x_wm9712_driver = {
261 .probe = palm27x_asoc_probe,
262 .remove = __devexit_p(palm27x_asoc_remove),
263 .driver = {
264 .name = "palm27x-asoc",
265 .owner = THIS_MODULE,
266 },
267};
268
269static int __init palm27x_asoc_init(void)
270{
271 return platform_driver_register(&palm27x_wm9712_driver);
272}
273
274static void __exit palm27x_asoc_exit(void)
256{ 275{
257 palm27x_ep_gpio = data->jack_gpio; 276 platform_driver_unregister(&palm27x_wm9712_driver);
258} 277}
259 278
260module_init(palm27x_asoc_init); 279module_init(palm27x_asoc_init);