diff options
author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2008-04-24 23:11:44 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-04-28 12:14:32 -0400 |
commit | 6457d9fc3bb87c72db03cfb34cd414c8fb9b8edf (patch) | |
tree | baf16332ea9bb5734985bb9bc3357b992b32238c | |
parent | 4247417d8457b326ede001cb74af8570b5aa302b (diff) |
[MIPS] DS1287: Add clockevent driver
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/Kconfig | 4 | ||||
-rw-r--r-- | arch/mips/dec/time.c | 69 | ||||
-rw-r--r-- | arch/mips/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/kernel/cevt-ds1287.c | 129 | ||||
-rw-r--r-- | include/asm-mips/ds1287.h | 27 |
5 files changed, 183 insertions, 47 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2e4ac657a4c3..e5a7c5d96364 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -81,6 +81,7 @@ config MIPS_COBALT | |||
81 | config MACH_DECSTATION | 81 | config MACH_DECSTATION |
82 | bool "DECstations" | 82 | bool "DECstations" |
83 | select BOOT_ELF32 | 83 | select BOOT_ELF32 |
84 | select CEVT_DS1287 | ||
84 | select CEVT_R4K | 85 | select CEVT_R4K |
85 | select CSRC_IOASIC | 86 | select CSRC_IOASIC |
86 | select CSRC_R4K | 87 | select CSRC_R4K |
@@ -770,6 +771,9 @@ config BOOT_RAW | |||
770 | config CEVT_BCM1480 | 771 | config CEVT_BCM1480 |
771 | bool | 772 | bool |
772 | 773 | ||
774 | config CEVT_DS1287 | ||
775 | bool | ||
776 | |||
773 | config CEVT_GT641XX | 777 | config CEVT_GT641XX |
774 | bool | 778 | bool |
775 | 779 | ||
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 0cbab8d0052b..3965fda94a89 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c | |||
@@ -9,30 +9,15 @@ | |||
9 | * | 9 | * |
10 | */ | 10 | */ |
11 | #include <linux/bcd.h> | 11 | #include <linux/bcd.h> |
12 | #include <linux/errno.h> | ||
13 | #include <linux/init.h> | 12 | #include <linux/init.h> |
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/mc146818rtc.h> | 13 | #include <linux/mc146818rtc.h> |
17 | #include <linux/mm.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/param.h> | 14 | #include <linux/param.h> |
20 | #include <linux/sched.h> | ||
21 | #include <linux/string.h> | ||
22 | #include <linux/time.h> | ||
23 | #include <linux/types.h> | ||
24 | |||
25 | #include <asm/bootinfo.h> | ||
26 | #include <asm/cpu.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <asm/irq.h> | ||
29 | #include <asm/mipsregs.h> | ||
30 | #include <asm/sections.h> | ||
31 | #include <asm/time.h> | ||
32 | 15 | ||
16 | #include <asm/cpu-features.h> | ||
17 | #include <asm/ds1287.h> | ||
18 | #include <asm/time.h> | ||
33 | #include <asm/dec/interrupts.h> | 19 | #include <asm/dec/interrupts.h> |
34 | #include <asm/dec/ioasic.h> | 20 | #include <asm/dec/ioasic.h> |
35 | #include <asm/dec/ioasic_addrs.h> | ||
36 | #include <asm/dec/machtype.h> | 21 | #include <asm/dec/machtype.h> |
37 | 22 | ||
38 | unsigned long read_persistent_clock(void) | 23 | unsigned long read_persistent_clock(void) |
@@ -139,42 +124,32 @@ int rtc_mips_set_mmss(unsigned long nowtime) | |||
139 | return retval; | 124 | return retval; |
140 | } | 125 | } |
141 | 126 | ||
142 | static int dec_timer_state(void) | 127 | void __init plat_time_init(void) |
143 | { | 128 | { |
144 | return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0; | 129 | u32 start, end; |
145 | } | 130 | int i = HZ / 10; |
146 | 131 | ||
147 | static void dec_timer_ack(void) | 132 | /* Set up the rate of periodic DS1287 interrupts. */ |
148 | { | 133 | ds1287_set_base_clock(HZ); |
149 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ | ||
150 | } | ||
151 | 134 | ||
152 | static cycle_t dec_ioasic_hpt_read(void) | 135 | if (cpu_has_counter) { |
153 | { | 136 | while (!ds1287_timer_state()) |
154 | /* | 137 | ; |
155 | * The free-running counter is 32-bit which is good for about | ||
156 | * 2 minutes, 50 seconds at possible count rates of up to 25MHz. | ||
157 | */ | ||
158 | return ioasic_read(IO_REG_FCTR); | ||
159 | } | ||
160 | 138 | ||
139 | start = read_c0_count(); | ||
161 | 140 | ||
162 | void __init plat_time_init(void) | 141 | while (i--) |
163 | { | 142 | while (!ds1287_timer_state()) |
164 | mips_timer_ack = dec_timer_ack; | 143 | ; |
144 | |||
145 | end = read_c0_count(); | ||
165 | 146 | ||
166 | if (!cpu_has_counter && IOASIC) | 147 | mips_hpt_frequency = (end - start) * 10; |
148 | printk(KERN_INFO "MIPS counter frequency %dHz\n", | ||
149 | mips_hpt_frequency); | ||
150 | } else if (IOASIC) | ||
167 | /* For pre-R4k systems we use the I/O ASIC's counter. */ | 151 | /* For pre-R4k systems we use the I/O ASIC's counter. */ |
168 | dec_ioasic_clocksource_init(); | 152 | dec_ioasic_clocksource_init(); |
169 | 153 | ||
170 | /* Set up the rate of periodic DS1287 interrupts. */ | 154 | ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]); |
171 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); | ||
172 | } | ||
173 | |||
174 | void __init plat_timer_setup(struct irqaction *irq) | ||
175 | { | ||
176 | setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); | ||
177 | |||
178 | /* Enable periodic DS1287 interrupts. */ | ||
179 | CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B); | ||
180 | } | 155 | } |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 00ac35e501b3..45545be3eb86 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
@@ -10,6 +10,7 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ | |||
10 | 10 | ||
11 | obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o | 11 | obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o |
12 | obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o | 12 | obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o |
13 | obj-$(CONFIG_CEVT_DS1287) += cevt-ds1287.o | ||
13 | obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o | 14 | obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o |
14 | obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o | 15 | obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o |
15 | obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o | 16 | obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o |
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c new file mode 100644 index 000000000000..df4acb68bfb5 --- /dev/null +++ b/arch/mips/kernel/cevt-ds1287.c | |||
@@ -0,0 +1,129 @@ | |||
1 | /* | ||
2 | * DS1287 clockevent driver | ||
3 | * | ||
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #include <linux/clockchips.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/mc146818rtc.h> | ||
24 | |||
25 | #include <asm/time.h> | ||
26 | |||
27 | int ds1287_timer_state(void) | ||
28 | { | ||
29 | return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0; | ||
30 | } | ||
31 | |||
32 | int ds1287_set_base_clock(unsigned int hz) | ||
33 | { | ||
34 | u8 rate; | ||
35 | |||
36 | switch (hz) { | ||
37 | case 128: | ||
38 | rate = 0x9; | ||
39 | break; | ||
40 | case 256: | ||
41 | rate = 0x8; | ||
42 | break; | ||
43 | case 1024: | ||
44 | rate = 0x6; | ||
45 | break; | ||
46 | default: | ||
47 | return -EINVAL; | ||
48 | } | ||
49 | |||
50 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A); | ||
51 | |||
52 | return 0; | ||
53 | } | ||
54 | |||
55 | static int ds1287_set_next_event(unsigned long delta, | ||
56 | struct clock_event_device *evt) | ||
57 | { | ||
58 | return -EINVAL; | ||
59 | } | ||
60 | |||
61 | static void ds1287_set_mode(enum clock_event_mode mode, | ||
62 | struct clock_event_device *evt) | ||
63 | { | ||
64 | u8 val; | ||
65 | |||
66 | spin_lock(&rtc_lock); | ||
67 | |||
68 | val = CMOS_READ(RTC_REG_B); | ||
69 | |||
70 | switch (mode) { | ||
71 | case CLOCK_EVT_MODE_PERIODIC: | ||
72 | val |= RTC_PIE; | ||
73 | break; | ||
74 | default: | ||
75 | val &= ~RTC_PIE; | ||
76 | break; | ||
77 | } | ||
78 | |||
79 | CMOS_WRITE(val, RTC_REG_B); | ||
80 | |||
81 | spin_unlock(&rtc_lock); | ||
82 | } | ||
83 | |||
84 | static void ds1287_event_handler(struct clock_event_device *dev) | ||
85 | { | ||
86 | } | ||
87 | |||
88 | static struct clock_event_device ds1287_clockevent = { | ||
89 | .name = "ds1287", | ||
90 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
91 | .cpumask = CPU_MASK_CPU0, | ||
92 | .set_next_event = ds1287_set_next_event, | ||
93 | .set_mode = ds1287_set_mode, | ||
94 | .event_handler = ds1287_event_handler, | ||
95 | }; | ||
96 | |||
97 | static irqreturn_t ds1287_interrupt(int irq, void *dev_id) | ||
98 | { | ||
99 | struct clock_event_device *cd = &ds1287_clockevent; | ||
100 | |||
101 | /* Ack the RTC interrupt. */ | ||
102 | CMOS_READ(RTC_REG_C); | ||
103 | |||
104 | cd->event_handler(cd); | ||
105 | |||
106 | return IRQ_HANDLED; | ||
107 | } | ||
108 | |||
109 | static struct irqaction ds1287_irqaction = { | ||
110 | .handler = ds1287_interrupt, | ||
111 | .flags = IRQF_DISABLED | IRQF_PERCPU, | ||
112 | .name = "ds1287", | ||
113 | }; | ||
114 | |||
115 | int __init ds1287_clockevent_init(int irq) | ||
116 | { | ||
117 | struct clock_event_device *cd; | ||
118 | |||
119 | cd = &ds1287_clockevent; | ||
120 | cd->rating = 100; | ||
121 | cd->irq = irq; | ||
122 | clockevent_set_clock(cd, 32768); | ||
123 | cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); | ||
124 | cd->min_delta_ns = clockevent_delta2ns(0x300, cd); | ||
125 | |||
126 | clockevents_register_device(&ds1287_clockevent); | ||
127 | |||
128 | return setup_irq(irq, &ds1287_irqaction); | ||
129 | } | ||
diff --git a/include/asm-mips/ds1287.h b/include/asm-mips/ds1287.h new file mode 100644 index 000000000000..ba1702e86931 --- /dev/null +++ b/include/asm-mips/ds1287.h | |||
@@ -0,0 +1,27 @@ | |||
1 | /* | ||
2 | * DS1287 timer functions. | ||
3 | * | ||
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | #ifndef __ASM_DS1287_H | ||
21 | #define __ASM_DS1287_H | ||
22 | |||
23 | extern int ds1287_timer_state(void); | ||
24 | extern void ds1287_set_base_clock(unsigned int clock); | ||
25 | extern int ds1287_clockevent_init(int irq); | ||
26 | |||
27 | #endif | ||