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authorChuanxiao Dong <chuanxiao.dong@intel.com>2010-08-11 22:07:18 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-08-12 06:10:40 -0400
commit5eab6aaaaf0149ada4afd1aebce1978e1cc5a3e7 (patch)
treebebb97e5504824c4dc857b6e6367531398dacf3a
parent7d8a26fd22c6944cb18a67c5b8d8255608a3ba98 (diff)
nand/denali: move all hardware initialization work to denali_hw_init
All hardware initialization will be done in denali_hw_init before irq handler registered Change mtd name from "DENALI NAND" to be "denali-nand" since whitespace in name can cause problems if we use cmdlinepart Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/denali.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 017cde48f75d..532fe07cf886 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1364,18 +1364,18 @@ static void denali_hw_init(struct denali_nand_info *denali)
1364 * */ 1364 * */
1365 denali->bbtskipbytes = ioread32(denali->flash_reg + 1365 denali->bbtskipbytes = ioread32(denali->flash_reg +
1366 SPARE_AREA_SKIP_BYTES); 1366 SPARE_AREA_SKIP_BYTES);
1367 denali_irq_init(denali);
1368 denali_nand_reset(denali); 1367 denali_nand_reset(denali);
1369 iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED); 1368 iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED);
1370 iowrite32(CHIP_EN_DONT_CARE__FLAG, 1369 iowrite32(CHIP_EN_DONT_CARE__FLAG,
1371 denali->flash_reg + CHIP_ENABLE_DONT_CARE); 1370 denali->flash_reg + CHIP_ENABLE_DONT_CARE);
1372 1371
1373 iowrite32(0x0, denali->flash_reg + SPARE_AREA_SKIP_BYTES);
1374 iowrite32(0xffff, denali->flash_reg + SPARE_AREA_MARKER); 1372 iowrite32(0xffff, denali->flash_reg + SPARE_AREA_MARKER);
1375 1373
1376 /* Should set value for these registers when init */ 1374 /* Should set value for these registers when init */
1377 iowrite32(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES); 1375 iowrite32(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES);
1378 iowrite32(1, denali->flash_reg + ECC_ENABLE); 1376 iowrite32(1, denali->flash_reg + ECC_ENABLE);
1377 denali_nand_timing_set(denali);
1378 denali_irq_init(denali);
1379} 1379}
1380 1380
1381/* Althogh controller spec said SLC ECC is forceb to be 4bit, 1381/* Althogh controller spec said SLC ECC is forceb to be 4bit,
@@ -1501,6 +1501,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1501 1501
1502 pci_set_master(dev); 1502 pci_set_master(dev);
1503 denali->dev = dev; 1503 denali->dev = dev;
1504 denali->mtd.dev.parent = &dev->dev;
1504 1505
1505 ret = pci_request_regions(dev, DENALI_NAND_NAME); 1506 ret = pci_request_regions(dev, DENALI_NAND_NAME);
1506 if (ret) { 1507 if (ret) {
@@ -1525,6 +1526,8 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1525 denali_hw_init(denali); 1526 denali_hw_init(denali);
1526 denali_drv_init(denali); 1527 denali_drv_init(denali);
1527 1528
1529 /* denali_isr register is done after all the hardware
1530 * initilization is finished*/
1528 if (request_irq(dev->irq, denali_isr, IRQF_SHARED, 1531 if (request_irq(dev->irq, denali_isr, IRQF_SHARED,
1529 DENALI_NAND_NAME, denali)) { 1532 DENALI_NAND_NAME, denali)) {
1530 printk(KERN_ERR "Spectra: Unable to allocate IRQ\n"); 1533 printk(KERN_ERR "Spectra: Unable to allocate IRQ\n");
@@ -1537,9 +1540,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1537 1540
1538 pci_set_drvdata(dev, denali); 1541 pci_set_drvdata(dev, denali);
1539 1542
1540 denali_nand_timing_set(denali); 1543 denali->mtd.name = "denali-nand";
1541
1542 denali->mtd.name = "Denali NAND";
1543 denali->mtd.owner = THIS_MODULE; 1544 denali->mtd.owner = THIS_MODULE;
1544 denali->mtd.priv = &denali->nand; 1545 denali->mtd.priv = &denali->nand;
1545 1546