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authorBen Skeggs <bskeggs@redhat.com>2010-10-19 05:47:06 -0400
committerBen Skeggs <bskeggs@redhat.com>2010-12-03 00:06:52 -0500
commit50536946faaf3d9ac0245838eb09e5eb1065b06c (patch)
tree7daaa4cb7e2f9f26f4f9ac4ee37cfa9ab57f7777
parent9100468d1be26063aa25ecd667ea922c101d203f (diff)
drm/nouveau: store engine type in gpuobj class structs
We will eventually want to address hw engines other than PGRAPH. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_object.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv04_graph.c84
-rw-r--r--drivers/gpu/drm/nouveau/nv10_graph.c40
-rw-r--r--drivers/gpu/drm/nouveau/nv20_graph.c70
-rw-r--r--drivers/gpu/drm/nouveau/nv40_graph.c34
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c20
7 files changed, 127 insertions, 127 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 1d474f526986..2fdc26655ca1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -132,7 +132,7 @@ enum nouveau_flags {
132 132
133#define NVOBJ_ENGINE_SW 0 133#define NVOBJ_ENGINE_SW 0
134#define NVOBJ_ENGINE_GR 1 134#define NVOBJ_ENGINE_GR 1
135#define NVOBJ_ENGINE_DISPLAY 2 135#define NVOBJ_ENGINE_DISPLAY 0xcafe0001
136#define NVOBJ_ENGINE_INT 0xdeadbeef 136#define NVOBJ_ENGINE_INT 0xdeadbeef
137 137
138#define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) 138#define NVOBJ_FLAG_ZERO_ALLOC (1 << 1)
@@ -324,7 +324,7 @@ struct nouveau_pgraph_object_method {
324 324
325struct nouveau_pgraph_object_class { 325struct nouveau_pgraph_object_class {
326 int id; 326 int id;
327 bool software; 327 u32 engine;
328 struct nouveau_pgraph_object_method *methods; 328 struct nouveau_pgraph_object_method *methods;
329}; 329};
330 330
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index 0b8183edfcd7..70ffd7530503 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -900,7 +900,7 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
900 goto out; 900 goto out;
901 } 901 }
902 902
903 if (!grc->software) 903 if (grc->engine != NVOBJ_ENGINE_SW)
904 ret = nouveau_gpuobj_gr_new(chan, grc->id, &gr); 904 ret = nouveau_gpuobj_gr_new(chan, grc->id, &gr);
905 else 905 else
906 ret = nouveau_gpuobj_sw_new(chan, grc->id, &gr); 906 ret = nouveau_gpuobj_sw_new(chan, grc->id, &gr);
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index 1e2ad3942330..5d8ab1b6b04a 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -1091,48 +1091,48 @@ static struct nouveau_pgraph_object_method nv04_graph_mthds_surf3d[] = {
1091}; 1091};
1092 1092
1093struct nouveau_pgraph_object_class nv04_graph_grclass[] = { 1093struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
1094 { 0x0038, false, NULL }, /* dvd subpicture */ 1094 { 0x0038, NVOBJ_ENGINE_GR, NULL }, /* dvd subpicture */
1095 { 0x0039, false, NULL }, /* m2mf */ 1095 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
1096 { 0x004b, false, nv04_graph_mthds_nv03_gdirect }, /* nv03 gdirect */ 1096 { 0x004b, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv03_gdirect }, /* nv03 gdirect */
1097 { 0x004a, false, nv04_graph_mthds_nv04_gdirect }, /* nv04 gdirect */ 1097 { 0x004a, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_gdirect }, /* nv04 gdirect */
1098 { 0x001f, false, nv04_graph_mthds_nv01_imageblit }, /* nv01 imageblit */ 1098 { 0x001f, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv01_imageblit }, /* nv01 imageblit */
1099 { 0x005f, false, nv04_graph_mthds_nv04_imageblit_ifc }, /* nv04 imageblit */ 1099 { 0x005f, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_imageblit_ifc }, /* nv04 imageblit */
1100 { 0x0060, false, nv04_graph_mthds_nv04_iifc }, /* nv04 iifc */ 1100 { 0x0060, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_iifc }, /* nv04 iifc */
1101 { 0x0064, false, NULL }, /* nv05 iifc */ 1101 { 0x0064, NVOBJ_ENGINE_GR, NULL }, /* nv05 iifc */
1102 { 0x0021, false, nv04_graph_mthds_nv01_ifc }, /* nv01 ifc */ 1102 { 0x0021, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv01_ifc }, /* nv01 ifc */
1103 { 0x0061, false, nv04_graph_mthds_nv04_imageblit_ifc }, /* nv04 ifc */ 1103 { 0x0061, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_imageblit_ifc }, /* nv04 ifc */
1104 { 0x0065, false, NULL }, /* nv05 ifc */ 1104 { 0x0065, NVOBJ_ENGINE_GR, NULL }, /* nv05 ifc */
1105 { 0x0036, false, nv04_graph_mthds_nv03_sifc }, /* nv03 sifc */ 1105 { 0x0036, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv03_sifc }, /* nv03 sifc */
1106 { 0x0076, false, nv04_graph_mthds_nv04_sifc }, /* nv04 sifc */ 1106 { 0x0076, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_sifc }, /* nv04 sifc */
1107 { 0x0066, false, NULL }, /* nv05 sifc */ 1107 { 0x0066, NVOBJ_ENGINE_GR, NULL }, /* nv05 sifc */
1108 { 0x0037, false, nv04_graph_mthds_nv03_sifm }, /* nv03 sifm */ 1108 { 0x0037, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv03_sifm }, /* nv03 sifm */
1109 { 0x0077, false, nv04_graph_mthds_nv04_sifm }, /* nv04 sifm */ 1109 { 0x0077, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_sifm }, /* nv04 sifm */
1110 { 0x0030, false, NULL }, /* null */ 1110 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
1111 { 0x0042, false, NULL }, /* surf2d */ 1111 { 0x0042, NVOBJ_ENGINE_GR, NULL }, /* surf2d */
1112 { 0x0043, false, NULL }, /* rop */ 1112 { 0x0043, NVOBJ_ENGINE_GR, NULL }, /* rop */
1113 { 0x0012, false, NULL }, /* beta1 */ 1113 { 0x0012, NVOBJ_ENGINE_GR, NULL }, /* beta1 */
1114 { 0x0072, false, NULL }, /* beta4 */ 1114 { 0x0072, NVOBJ_ENGINE_GR, NULL }, /* beta4 */
1115 { 0x0019, false, NULL }, /* cliprect */ 1115 { 0x0019, NVOBJ_ENGINE_GR, NULL }, /* cliprect */
1116 { 0x0018, false, NULL }, /* nv01 pattern */ 1116 { 0x0018, NVOBJ_ENGINE_GR, NULL }, /* nv01 pattern */
1117 { 0x0044, false, NULL }, /* nv04 pattern */ 1117 { 0x0044, NVOBJ_ENGINE_GR, NULL }, /* nv04 pattern */
1118 { 0x0052, false, NULL }, /* swzsurf */ 1118 { 0x0052, NVOBJ_ENGINE_GR, NULL }, /* swzsurf */
1119 { 0x0053, false, nv04_graph_mthds_surf3d }, /* surf3d */ 1119 { 0x0053, NVOBJ_ENGINE_GR, nv04_graph_mthds_surf3d }, /* surf3d */
1120 { 0x0048, false, nv04_graph_mthds_nv03_tex_tri }, /* nv03 tex_tri */ 1120 { 0x0048, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv03_tex_tri }, /* nv03 tex_tri */
1121 { 0x0054, false, NULL }, /* tex_tri */ 1121 { 0x0054, NVOBJ_ENGINE_GR, NULL }, /* tex_tri */
1122 { 0x0055, false, NULL }, /* multitex_tri */ 1122 { 0x0055, NVOBJ_ENGINE_GR, NULL }, /* multitex_tri */
1123 { 0x0017, false, NULL }, /* nv01 chroma */ 1123 { 0x0017, NVOBJ_ENGINE_GR, NULL }, /* nv01 chroma */
1124 { 0x0057, false, NULL }, /* nv04 chroma */ 1124 { 0x0057, NVOBJ_ENGINE_GR, NULL }, /* nv04 chroma */
1125 { 0x0058, false, NULL }, /* surf_dst */ 1125 { 0x0058, NVOBJ_ENGINE_GR, NULL }, /* surf_dst */
1126 { 0x0059, false, NULL }, /* surf_src */ 1126 { 0x0059, NVOBJ_ENGINE_GR, NULL }, /* surf_src */
1127 { 0x005a, false, NULL }, /* surf_color */ 1127 { 0x005a, NVOBJ_ENGINE_GR, NULL }, /* surf_color */
1128 { 0x005b, false, NULL }, /* surf_zeta */ 1128 { 0x005b, NVOBJ_ENGINE_GR, NULL }, /* surf_zeta */
1129 { 0x001c, false, nv04_graph_mthds_nv01_shape }, /* nv01 line */ 1129 { 0x001c, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv01_shape }, /* nv01 line */
1130 { 0x005c, false, nv04_graph_mthds_nv04_shape }, /* nv04 line */ 1130 { 0x005c, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_shape }, /* nv04 line */
1131 { 0x001d, false, nv04_graph_mthds_nv01_shape }, /* nv01 tri */ 1131 { 0x001d, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv01_shape }, /* nv01 tri */
1132 { 0x005d, false, nv04_graph_mthds_nv04_shape }, /* nv04 tri */ 1132 { 0x005d, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_shape }, /* nv04 tri */
1133 { 0x001e, false, nv04_graph_mthds_nv01_shape }, /* nv01 rect */ 1133 { 0x001e, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv01_shape }, /* nv01 rect */
1134 { 0x005e, false, nv04_graph_mthds_nv04_shape }, /* nv04 rect */ 1134 { 0x005e, NVOBJ_ENGINE_GR, nv04_graph_mthds_nv04_shape }, /* nv04 rect */
1135 { 0x506e, true, nv04_graph_mthds_sw }, 1135 { 0x506e, NVOBJ_ENGINE_SW, nv04_graph_mthds_sw },
1136 {} 1136 {}
1137}; 1137};
1138 1138
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index e3a87a64c164..375d63161d12 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -1075,25 +1075,25 @@ static struct nouveau_pgraph_object_method nv17_graph_celsius_mthds[] = {
1075}; 1075};
1076 1076
1077struct nouveau_pgraph_object_class nv10_graph_grclass[] = { 1077struct nouveau_pgraph_object_class nv10_graph_grclass[] = {
1078 { 0x0030, false, NULL }, /* null */ 1078 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
1079 { 0x0039, false, NULL }, /* m2mf */ 1079 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
1080 { 0x004a, false, NULL }, /* gdirect */ 1080 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
1081 { 0x005f, false, NULL }, /* imageblit */ 1081 { 0x005f, NVOBJ_ENGINE_GR, NULL }, /* imageblit */
1082 { 0x009f, false, NULL }, /* imageblit (nv12) */ 1082 { 0x009f, NVOBJ_ENGINE_GR, NULL }, /* imageblit (nv12) */
1083 { 0x008a, false, NULL }, /* ifc */ 1083 { 0x008a, NVOBJ_ENGINE_GR, NULL }, /* ifc */
1084 { 0x0089, false, NULL }, /* sifm */ 1084 { 0x0089, NVOBJ_ENGINE_GR, NULL }, /* sifm */
1085 { 0x0062, false, NULL }, /* surf2d */ 1085 { 0x0062, NVOBJ_ENGINE_GR, NULL }, /* surf2d */
1086 { 0x0043, false, NULL }, /* rop */ 1086 { 0x0043, NVOBJ_ENGINE_GR, NULL }, /* rop */
1087 { 0x0012, false, NULL }, /* beta1 */ 1087 { 0x0012, NVOBJ_ENGINE_GR, NULL }, /* beta1 */
1088 { 0x0072, false, NULL }, /* beta4 */ 1088 { 0x0072, NVOBJ_ENGINE_GR, NULL }, /* beta4 */
1089 { 0x0019, false, NULL }, /* cliprect */ 1089 { 0x0019, NVOBJ_ENGINE_GR, NULL }, /* cliprect */
1090 { 0x0044, false, NULL }, /* pattern */ 1090 { 0x0044, NVOBJ_ENGINE_GR, NULL }, /* pattern */
1091 { 0x0052, false, NULL }, /* swzsurf */ 1091 { 0x0052, NVOBJ_ENGINE_GR, NULL }, /* swzsurf */
1092 { 0x0093, false, NULL }, /* surf3d */ 1092 { 0x0093, NVOBJ_ENGINE_GR, NULL }, /* surf3d */
1093 { 0x0094, false, NULL }, /* tex_tri */ 1093 { 0x0094, NVOBJ_ENGINE_GR, NULL }, /* tex_tri */
1094 { 0x0095, false, NULL }, /* multitex_tri */ 1094 { 0x0095, NVOBJ_ENGINE_GR, NULL }, /* multitex_tri */
1095 { 0x0056, false, NULL }, /* celcius (nv10) */ 1095 { 0x0056, NVOBJ_ENGINE_GR, NULL }, /* celcius (nv10) */
1096 { 0x0096, false, NULL }, /* celcius (nv11) */ 1096 { 0x0096, NVOBJ_ENGINE_GR, NULL }, /* celcius (nv11) */
1097 { 0x0099, false, nv17_graph_celsius_mthds }, /* celcius (nv17) */ 1097 { 0x0099, NVOBJ_ENGINE_GR, nv17_graph_celsius_mthds }, /* celcius (nv17) */
1098 {} 1098 {}
1099}; 1099};
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index 8a0402012557..109418d72f93 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -757,45 +757,45 @@ nv30_graph_init(struct drm_device *dev)
757} 757}
758 758
759struct nouveau_pgraph_object_class nv20_graph_grclass[] = { 759struct nouveau_pgraph_object_class nv20_graph_grclass[] = {
760 { 0x0030, false, NULL }, /* null */ 760 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
761 { 0x0039, false, NULL }, /* m2mf */ 761 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
762 { 0x004a, false, NULL }, /* gdirect */ 762 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
763 { 0x009f, false, NULL }, /* imageblit (nv12) */ 763 { 0x009f, NVOBJ_ENGINE_GR, NULL }, /* imageblit (nv12) */
764 { 0x008a, false, NULL }, /* ifc */ 764 { 0x008a, NVOBJ_ENGINE_GR, NULL }, /* ifc */
765 { 0x0089, false, NULL }, /* sifm */ 765 { 0x0089, NVOBJ_ENGINE_GR, NULL }, /* sifm */
766 { 0x0062, false, NULL }, /* surf2d */ 766 { 0x0062, NVOBJ_ENGINE_GR, NULL }, /* surf2d */
767 { 0x0043, false, NULL }, /* rop */ 767 { 0x0043, NVOBJ_ENGINE_GR, NULL }, /* rop */
768 { 0x0012, false, NULL }, /* beta1 */ 768 { 0x0012, NVOBJ_ENGINE_GR, NULL }, /* beta1 */
769 { 0x0072, false, NULL }, /* beta4 */ 769 { 0x0072, NVOBJ_ENGINE_GR, NULL }, /* beta4 */
770 { 0x0019, false, NULL }, /* cliprect */ 770 { 0x0019, NVOBJ_ENGINE_GR, NULL }, /* cliprect */
771 { 0x0044, false, NULL }, /* pattern */ 771 { 0x0044, NVOBJ_ENGINE_GR, NULL }, /* pattern */
772 { 0x009e, false, NULL }, /* swzsurf */ 772 { 0x009e, NVOBJ_ENGINE_GR, NULL }, /* swzsurf */
773 { 0x0096, false, NULL }, /* celcius */ 773 { 0x0096, NVOBJ_ENGINE_GR, NULL }, /* celcius */
774 { 0x0097, false, NULL }, /* kelvin (nv20) */ 774 { 0x0097, NVOBJ_ENGINE_GR, NULL }, /* kelvin (nv20) */
775 { 0x0597, false, NULL }, /* kelvin (nv25) */ 775 { 0x0597, NVOBJ_ENGINE_GR, NULL }, /* kelvin (nv25) */
776 {} 776 {}
777}; 777};
778 778
779struct nouveau_pgraph_object_class nv30_graph_grclass[] = { 779struct nouveau_pgraph_object_class nv30_graph_grclass[] = {
780 { 0x0030, false, NULL }, /* null */ 780 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
781 { 0x0039, false, NULL }, /* m2mf */ 781 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
782 { 0x004a, false, NULL }, /* gdirect */ 782 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
783 { 0x009f, false, NULL }, /* imageblit (nv12) */ 783 { 0x009f, NVOBJ_ENGINE_GR, NULL }, /* imageblit (nv12) */
784 { 0x008a, false, NULL }, /* ifc */ 784 { 0x008a, NVOBJ_ENGINE_GR, NULL }, /* ifc */
785 { 0x038a, false, NULL }, /* ifc (nv30) */ 785 { 0x038a, NVOBJ_ENGINE_GR, NULL }, /* ifc (nv30) */
786 { 0x0089, false, NULL }, /* sifm */ 786 { 0x0089, NVOBJ_ENGINE_GR, NULL }, /* sifm */
787 { 0x0389, false, NULL }, /* sifm (nv30) */ 787 { 0x0389, NVOBJ_ENGINE_GR, NULL }, /* sifm (nv30) */
788 { 0x0062, false, NULL }, /* surf2d */ 788 { 0x0062, NVOBJ_ENGINE_GR, NULL }, /* surf2d */
789 { 0x0362, false, NULL }, /* surf2d (nv30) */ 789 { 0x0362, NVOBJ_ENGINE_GR, NULL }, /* surf2d (nv30) */
790 { 0x0043, false, NULL }, /* rop */ 790 { 0x0043, NVOBJ_ENGINE_GR, NULL }, /* rop */
791 { 0x0012, false, NULL }, /* beta1 */ 791 { 0x0012, NVOBJ_ENGINE_GR, NULL }, /* beta1 */
792 { 0x0072, false, NULL }, /* beta4 */ 792 { 0x0072, NVOBJ_ENGINE_GR, NULL }, /* beta4 */
793 { 0x0019, false, NULL }, /* cliprect */ 793 { 0x0019, NVOBJ_ENGINE_GR, NULL }, /* cliprect */
794 { 0x0044, false, NULL }, /* pattern */ 794 { 0x0044, NVOBJ_ENGINE_GR, NULL }, /* pattern */
795 { 0x039e, false, NULL }, /* swzsurf */ 795 { 0x039e, NVOBJ_ENGINE_GR, NULL }, /* swzsurf */
796 { 0x0397, false, NULL }, /* rankine (nv30) */ 796 { 0x0397, NVOBJ_ENGINE_GR, NULL }, /* rankine (nv30) */
797 { 0x0497, false, NULL }, /* rankine (nv35) */ 797 { 0x0497, NVOBJ_ENGINE_GR, NULL }, /* rankine (nv35) */
798 { 0x0697, false, NULL }, /* rankine (nv34) */ 798 { 0x0697, NVOBJ_ENGINE_GR, NULL }, /* rankine (nv34) */
799 {} 799 {}
800}; 800};
801 801
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index 70d97cde49d0..cd47760b2d0a 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -409,23 +409,23 @@ void nv40_graph_takedown(struct drm_device *dev)
409} 409}
410 410
411struct nouveau_pgraph_object_class nv40_graph_grclass[] = { 411struct nouveau_pgraph_object_class nv40_graph_grclass[] = {
412 { 0x0030, false, NULL }, /* null */ 412 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
413 { 0x0039, false, NULL }, /* m2mf */ 413 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
414 { 0x004a, false, NULL }, /* gdirect */ 414 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
415 { 0x009f, false, NULL }, /* imageblit (nv12) */ 415 { 0x009f, NVOBJ_ENGINE_GR, NULL }, /* imageblit (nv12) */
416 { 0x008a, false, NULL }, /* ifc */ 416 { 0x008a, NVOBJ_ENGINE_GR, NULL }, /* ifc */
417 { 0x0089, false, NULL }, /* sifm */ 417 { 0x0089, NVOBJ_ENGINE_GR, NULL }, /* sifm */
418 { 0x3089, false, NULL }, /* sifm (nv40) */ 418 { 0x3089, NVOBJ_ENGINE_GR, NULL }, /* sifm (nv40) */
419 { 0x0062, false, NULL }, /* surf2d */ 419 { 0x0062, NVOBJ_ENGINE_GR, NULL }, /* surf2d */
420 { 0x3062, false, NULL }, /* surf2d (nv40) */ 420 { 0x3062, NVOBJ_ENGINE_GR, NULL }, /* surf2d (nv40) */
421 { 0x0043, false, NULL }, /* rop */ 421 { 0x0043, NVOBJ_ENGINE_GR, NULL }, /* rop */
422 { 0x0012, false, NULL }, /* beta1 */ 422 { 0x0012, NVOBJ_ENGINE_GR, NULL }, /* beta1 */
423 { 0x0072, false, NULL }, /* beta4 */ 423 { 0x0072, NVOBJ_ENGINE_GR, NULL }, /* beta4 */
424 { 0x0019, false, NULL }, /* cliprect */ 424 { 0x0019, NVOBJ_ENGINE_GR, NULL }, /* cliprect */
425 { 0x0044, false, NULL }, /* pattern */ 425 { 0x0044, NVOBJ_ENGINE_GR, NULL }, /* pattern */
426 { 0x309e, false, NULL }, /* swzsurf */ 426 { 0x309e, NVOBJ_ENGINE_GR, NULL }, /* swzsurf */
427 { 0x4097, false, NULL }, /* curie (nv40) */ 427 { 0x4097, NVOBJ_ENGINE_GR, NULL }, /* curie (nv40) */
428 { 0x4497, false, NULL }, /* curie (nv44) */ 428 { 0x4497, NVOBJ_ENGINE_GR, NULL }, /* curie (nv44) */
429 {} 429 {}
430}; 430};
431 431
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index dcc9175fb794..01a598917e3c 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -401,16 +401,16 @@ static struct nouveau_pgraph_object_method nv50_graph_nvsw_methods[] = {
401}; 401};
402 402
403struct nouveau_pgraph_object_class nv50_graph_grclass[] = { 403struct nouveau_pgraph_object_class nv50_graph_grclass[] = {
404 { 0x506e, true, nv50_graph_nvsw_methods }, /* nvsw */ 404 { 0x506e, NVOBJ_ENGINE_SW, nv50_graph_nvsw_methods }, /* nvsw */
405 { 0x0030, false, NULL }, /* null */ 405 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
406 { 0x5039, false, NULL }, /* m2mf */ 406 { 0x5039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
407 { 0x502d, false, NULL }, /* 2d */ 407 { 0x502d, NVOBJ_ENGINE_GR, NULL }, /* 2d */
408 { 0x50c0, false, NULL }, /* compute */ 408 { 0x50c0, NVOBJ_ENGINE_GR, NULL }, /* compute */
409 { 0x85c0, false, NULL }, /* compute (nva3, nva5, nva8) */ 409 { 0x85c0, NVOBJ_ENGINE_GR, NULL }, /* compute (nva3, nva5, nva8) */
410 { 0x5097, false, NULL }, /* tesla (nv50) */ 410 { 0x5097, NVOBJ_ENGINE_GR, NULL }, /* tesla (nv50) */
411 { 0x8297, false, NULL }, /* tesla (nv8x/nv9x) */ 411 { 0x8297, NVOBJ_ENGINE_GR, NULL }, /* tesla (nv8x/nv9x) */
412 { 0x8397, false, NULL }, /* tesla (nva0, nvaa, nvac) */ 412 { 0x8397, NVOBJ_ENGINE_GR, NULL }, /* tesla (nva0, nvaa, nvac) */
413 { 0x8597, false, NULL }, /* tesla (nva3, nva5, nva8) */ 413 { 0x8597, NVOBJ_ENGINE_GR, NULL }, /* tesla (nva3, nva5, nva8) */
414 {} 414 {}
415}; 415};
416 416