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authorRafał Miłecki <zajec5@gmail.com>2011-07-06 09:45:27 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-07-08 11:11:20 -0400
commit42c9a458965da2b74e772054fdc4bcdec0351da8 (patch)
tree7de76ad6ae1d6224b172a4a9d2e0a3871e5fd04b
parent6cbab0d9139246405b2449ffebecc8c48d927a6e (diff)
b43: handle BCMA in bus switches
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/b43/main.c68
-rw-r--r--drivers/net/wireless/b43/phy_n.c22
2 files changed, 90 insertions, 0 deletions
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index dd6d6523587a..f80a53d23d71 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -1155,6 +1155,21 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1155 } 1155 }
1156} 1156}
1157 1157
1158#ifdef CONFIG_B43_BCMA
1159static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1160{
1161 u32 flags = 0;
1162
1163 if (gmode)
1164 flags = B43_BCMA_IOCTL_GMODE;
1165 flags |= B43_BCMA_IOCTL_PHY_CLKEN;
1166 flags |= B43_BCMA_IOCTL_PHY_BW_20MHZ; /* Make 20 MHz def */
1167 b43_device_enable(dev, flags);
1168
1169 /* TODO: reset PHY */
1170}
1171#endif
1172
1158static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, bool gmode) 1173static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1159{ 1174{
1160 struct ssb_device *sdev = dev->dev->sdev; 1175 struct ssb_device *sdev = dev->dev->sdev;
@@ -1188,6 +1203,11 @@ void b43_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1188 u32 macctl; 1203 u32 macctl;
1189 1204
1190 switch (dev->dev->bus_type) { 1205 switch (dev->dev->bus_type) {
1206#ifdef CONFIG_B43_BCMA
1207 case B43_BUS_BCMA:
1208 b43_bcma_wireless_core_reset(dev, gmode);
1209 break;
1210#endif
1191#ifdef CONFIG_B43_SSB 1211#ifdef CONFIG_B43_SSB
1192 case B43_BUS_SSB: 1212 case B43_BUS_SSB:
1193 b43_ssb_wireless_core_reset(dev, gmode); 1213 b43_ssb_wireless_core_reset(dev, gmode);
@@ -2631,6 +2651,13 @@ static int b43_gpio_init(struct b43_wldev *dev)
2631 mask |= 0x0010; /* FIXME: This is redundant. */ 2651 mask |= 0x0010; /* FIXME: This is redundant. */
2632 2652
2633 switch (dev->dev->bus_type) { 2653 switch (dev->dev->bus_type) {
2654#ifdef CONFIG_B43_BCMA
2655 case B43_BUS_BCMA:
2656 bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL,
2657 (bcma_cc_read32(&dev->dev->bdev->bus->drv_cc,
2658 BCMA_CC_GPIOCTL) & mask) | set);
2659 break;
2660#endif
2634#ifdef CONFIG_B43_SSB 2661#ifdef CONFIG_B43_SSB
2635 case B43_BUS_SSB: 2662 case B43_BUS_SSB:
2636 gpiodev = b43_ssb_gpio_dev(dev); 2663 gpiodev = b43_ssb_gpio_dev(dev);
@@ -2651,6 +2678,12 @@ static void b43_gpio_cleanup(struct b43_wldev *dev)
2651 struct ssb_device *gpiodev; 2678 struct ssb_device *gpiodev;
2652 2679
2653 switch (dev->dev->bus_type) { 2680 switch (dev->dev->bus_type) {
2681#ifdef CONFIG_B43_BCMA
2682 case B43_BUS_BCMA:
2683 bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL,
2684 0);
2685 break;
2686#endif
2654#ifdef CONFIG_B43_SSB 2687#ifdef CONFIG_B43_SSB
2655 case B43_BUS_SSB: 2688 case B43_BUS_SSB:
2656 gpiodev = b43_ssb_gpio_dev(dev); 2689 gpiodev = b43_ssb_gpio_dev(dev);
@@ -2733,6 +2766,16 @@ void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
2733 u32 tmp; 2766 u32 tmp;
2734 2767
2735 switch (dev->dev->bus_type) { 2768 switch (dev->dev->bus_type) {
2769#ifdef CONFIG_B43_BCMA
2770 case B43_BUS_BCMA:
2771 tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL);
2772 if (on)
2773 tmp |= B43_BCMA_IOCTL_MACPHYCLKEN;
2774 else
2775 tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN;
2776 bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp);
2777 break;
2778#endif
2736#ifdef CONFIG_B43_SSB 2779#ifdef CONFIG_B43_SSB
2737 case B43_BUS_SSB: 2780 case B43_BUS_SSB:
2738 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); 2781 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
@@ -2983,6 +3026,12 @@ static int b43_chip_init(struct b43_wldev *dev)
2983 b43_mac_phy_clock_set(dev, true); 3026 b43_mac_phy_clock_set(dev, true);
2984 3027
2985 switch (dev->dev->bus_type) { 3028 switch (dev->dev->bus_type) {
3029#ifdef CONFIG_B43_BCMA
3030 case B43_BUS_BCMA:
3031 /* FIXME: 0xE74 is quite common, but should be read from CC */
3032 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74);
3033 break;
3034#endif
2986#ifdef CONFIG_B43_SSB 3035#ifdef CONFIG_B43_SSB
2987 case B43_BUS_SSB: 3036 case B43_BUS_SSB:
2988 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 3037 b43_write16(dev, B43_MMIO_POWERUP_DELAY,
@@ -3508,6 +3557,12 @@ static void b43_put_phy_into_reset(struct b43_wldev *dev)
3508 u32 tmp; 3557 u32 tmp;
3509 3558
3510 switch (dev->dev->bus_type) { 3559 switch (dev->dev->bus_type) {
3560#ifdef CONFIG_B43_BCMA
3561 case B43_BUS_BCMA:
3562 b43err(dev->wl,
3563 "Putting PHY into reset not supported on BCMA\n");
3564 break;
3565#endif
3511#ifdef CONFIG_B43_SSB 3566#ifdef CONFIG_B43_SSB
3512 case B43_BUS_SSB: 3567 case B43_BUS_SSB:
3513 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); 3568 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
@@ -4404,6 +4459,12 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4404 4459
4405 /* Enable IRQ routing to this device. */ 4460 /* Enable IRQ routing to this device. */
4406 switch (dev->dev->bus_type) { 4461 switch (dev->dev->bus_type) {
4462#ifdef CONFIG_B43_BCMA
4463 case B43_BUS_BCMA:
4464 bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci,
4465 dev->dev->bdev, true);
4466 break;
4467#endif
4407#ifdef CONFIG_B43_SSB 4468#ifdef CONFIG_B43_SSB
4408 case B43_BUS_SSB: 4469 case B43_BUS_SSB:
4409 ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore, 4470 ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore,
@@ -4834,6 +4895,13 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4834 4895
4835 /* Get the PHY type. */ 4896 /* Get the PHY type. */
4836 switch (dev->dev->bus_type) { 4897 switch (dev->dev->bus_type) {
4898#ifdef CONFIG_B43_BCMA
4899 case B43_BUS_BCMA:
4900 /* FIXME */
4901 have_2ghz_phy = 1;
4902 have_5ghz_phy = 0;
4903 break;
4904#endif
4837#ifdef CONFIG_B43_SSB 4905#ifdef CONFIG_B43_SSB
4838 case B43_BUS_SSB: 4906 case B43_BUS_SSB:
4839 if (dev->dev->core_rev >= 5) { 4907 if (dev->dev->core_rev >= 5) {
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 41aea6a49af9..95c28f584ed9 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -609,6 +609,16 @@ static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
609 return; 609 return;
610 610
611 switch (dev->dev->bus_type) { 611 switch (dev->dev->bus_type) {
612#ifdef CONFIG_B43_BCMA
613 case B43_BUS_BCMA:
614 tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL);
615 if (force)
616 tmp |= BCMA_IOCTL_FGC;
617 else
618 tmp &= ~BCMA_IOCTL_FGC;
619 bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp);
620 break;
621#endif
612#ifdef CONFIG_B43_SSB 622#ifdef CONFIG_B43_SSB
613 case B43_BUS_SSB: 623 case B43_BUS_SSB:
614 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); 624 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
@@ -965,6 +975,12 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
965 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0); 975 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
966 976
967 switch (dev->dev->bus_type) { 977 switch (dev->dev->bus_type) {
978#ifdef CONFIG_B43_BCMA
979 case B43_BUS_BCMA:
980 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc,
981 0xFC00, 0xFC00);
982 break;
983#endif
968#ifdef CONFIG_B43_SSB 984#ifdef CONFIG_B43_SSB
969 case B43_BUS_SSB: 985 case B43_BUS_SSB:
970 ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco, 986 ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco,
@@ -3614,6 +3630,12 @@ int b43_phy_initn(struct b43_wldev *dev)
3614 (sprom->boardflags_lo & B43_BFL_EXTLNA) && 3630 (sprom->boardflags_lo & B43_BFL_EXTLNA) &&
3615 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) { 3631 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3616 switch (dev->dev->bus_type) { 3632 switch (dev->dev->bus_type) {
3633#ifdef CONFIG_B43_BCMA
3634 case B43_BUS_BCMA:
3635 bcma_cc_set32(&dev->dev->bdev->bus->drv_cc,
3636 BCMA_CC_CHIPCTL, 0x40);
3637 break;
3638#endif
3617#ifdef CONFIG_B43_SSB 3639#ifdef CONFIG_B43_SSB
3618 case B43_BUS_SSB: 3640 case B43_BUS_SSB:
3619 chipco_set32(&dev->dev->sdev->bus->chipco, 3641 chipco_set32(&dev->dev->sdev->bus->chipco,