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authorPaul Mundt <lethal@linux-sh.org>2006-12-11 06:28:03 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-11 18:42:09 -0500
commit41504c39726a7099e5a42508dd57fe561c8b4129 (patch)
tree29e3ea77a973fc7ee137e78a03b2b6c24b99d559
parent5432143464ee7f5cb8b0b015a0fd1c3279af10ae (diff)
sh: SH-MobileR SH7722 CPU support.
This adds CPU support for the SH7722. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/kernel/cpu/Makefile1
-rw-r--r--arch/sh/kernel/cpu/sh4/Makefile9
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c9
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile19
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh73180.c (renamed from arch/sh/kernel/cpu/sh4/clock-sh73180.c)0
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c99
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7770.c (renamed from arch/sh/kernel/cpu/sh4/clock-sh7770.c)0
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7780.c (renamed from arch/sh/kernel/cpu/sh4/clock-sh7780.c)0
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh73180.c (renamed from arch/sh/kernel/cpu/sh4/setup-sh73180.c)0
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c (renamed from arch/sh/kernel/cpu/sh4/setup-sh7343.c)0
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c76
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c (renamed from arch/sh/kernel/cpu/sh4/setup-sh7770.c)0
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c (renamed from arch/sh/kernel/cpu/sh4/setup-sh7780.c)0
-rw-r--r--arch/sh/kernel/setup.c14
-rw-r--r--arch/sh/mm/Kconfig12
-rw-r--r--drivers/serial/sh-sci.c22
-rw-r--r--drivers/serial/sh-sci.h14
-rw-r--r--include/asm-sh/bugs.h12
-rw-r--r--include/asm-sh/cpu-sh4/cache.h2
-rw-r--r--include/asm-sh/cpu-sh4/freq.h2
-rw-r--r--include/asm-sh/irq.h5
-rw-r--r--include/asm-sh/processor.h8
22 files changed, 284 insertions, 20 deletions
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 0582e6712b79..d055a3ea6b4b 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_CPU_SH2) = sh2/
6obj-$(CONFIG_CPU_SH2A) = sh2a/ 6obj-$(CONFIG_CPU_SH2A) = sh2a/
7obj-$(CONFIG_CPU_SH3) = sh3/ 7obj-$(CONFIG_CPU_SH3) = sh3/
8obj-$(CONFIG_CPU_SH4) = sh4/ 8obj-$(CONFIG_CPU_SH4) = sh4/
9obj-$(CONFIG_CPU_SH4A) += sh4a/
9 10
10obj-$(CONFIG_UBC_WAKEUP) += ubc.o 11obj-$(CONFIG_UBC_WAKEUP) += ubc.o
11obj-$(CONFIG_SH_ADC) += adc.o 12obj-$(CONFIG_SH_ADC) += adc.o
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 6e415baf04b4..19ca68c71884 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -12,17 +12,12 @@ obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7751) += setup-sh7750.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7751) += setup-sh7750.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o 14obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o
15obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
16obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
17obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o
18obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
19obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o 15obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o
20 16
21# Primary on-chip clocks (common) 17# Primary on-chip clocks (common)
18ifndef CONFIG_CPU_SH4A
22clock-$(CONFIG_CPU_SH4) := clock-sh4.o 19clock-$(CONFIG_CPU_SH4) := clock-sh4.o
23clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o 20endif
24clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
25clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
26 21
27# Additional clocks by subtype 22# Additional clocks by subtype
28clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o 23clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index afe0f1b1c030..9031a22a2ce7 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -119,11 +119,20 @@ int __init detect_cpu_and_cache_system(void)
119 break; 119 break;
120 case 0x3000: 120 case 0x3000:
121 case 0x3003: 121 case 0x3003:
122 case 0x3009:
122 cpu_data->type = CPU_SH7343; 123 cpu_data->type = CPU_SH7343;
123 cpu_data->icache.ways = 4; 124 cpu_data->icache.ways = 4;
124 cpu_data->dcache.ways = 4; 125 cpu_data->dcache.ways = 4;
125 cpu_data->flags |= CPU_HAS_LLSC; 126 cpu_data->flags |= CPU_HAS_LLSC;
126 break; 127 break;
128 case 0x3008:
129 if (prr == 0xa0) {
130 cpu_data->type = CPU_SH7722;
131 cpu_data->icache.ways = 4;
132 cpu_data->dcache.ways = 4;
133 cpu_data->flags |= CPU_HAS_LLSC;
134 }
135 break;
127 case 0x8000: 136 case 0x8000:
128 cpu_data->type = CPU_ST40RA; 137 cpu_data->type = CPU_ST40RA;
129 cpu_data->flags |= CPU_HAS_FPU; 138 cpu_data->flags |= CPU_HAS_FPU;
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
new file mode 100644
index 000000000000..a8f493f2f21f
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -0,0 +1,19 @@
1#
2# Makefile for the Linux/SuperH SH-4 backends.
3#
4
5# CPU subtype setup
6obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
7obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
8obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
11
12# Primary on-chip clocks (common)
13clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o
14clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
15clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
16clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
17clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7343.o
18
19obj-y += $(clock-y)
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh73180.c b/arch/sh/kernel/cpu/sh4a/clock-sh73180.c
index 2fa5cb2ae68d..2fa5cb2ae68d 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh73180.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh73180.c
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
new file mode 100644
index 000000000000..1707a213f0cf
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -0,0 +1,99 @@
1/*
2 * arch/sh/kernel/cpu/sh4/clock-sh7343.c
3 *
4 * SH7343/SH7722 support for the clock framework
5 *
6 * Copyright (C) 2006 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <asm/clock.h>
16#include <asm/freq.h>
17
18/*
19 * SH7343/SH7722 uses a common set of multipliers and divisors, so this
20 * is quite simple..
21 */
22static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
23static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
24
25#define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1)
26
27static void master_clk_init(struct clk *clk)
28{
29 clk->parent = clk_get(NULL, "cpu_clk");
30}
31
32static void master_clk_recalc(struct clk *clk)
33{
34 int idx = (ctrl_inl(FRQCR) & 0x000f);
35 clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx];
36}
37
38static struct clk_ops sh7343_master_clk_ops = {
39 .init = master_clk_init,
40 .recalc = master_clk_recalc,
41};
42
43static void module_clk_init(struct clk *clk)
44{
45 clk->parent = NULL;
46 clk->rate = CONFIG_SH_PCLK_FREQ;
47}
48
49static struct clk_ops sh7343_module_clk_ops = {
50 .init = module_clk_init,
51};
52
53static void bus_clk_init(struct clk *clk)
54{
55 clk->parent = clk_get(NULL, "cpu_clk");
56}
57
58static void bus_clk_recalc(struct clk *clk)
59{
60 int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f;
61 clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx];
62}
63
64static struct clk_ops sh7343_bus_clk_ops = {
65 .init = bus_clk_init,
66 .recalc = bus_clk_recalc,
67};
68
69static void cpu_clk_init(struct clk *clk)
70{
71 clk->parent = clk_get(NULL, "module_clk");
72 clk->flags |= CLK_RATE_PROPAGATES;
73 clk_set_rate(clk, clk_get_rate(clk));
74}
75
76static void cpu_clk_recalc(struct clk *clk)
77{
78 int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f;
79 clk->rate = clk->parent->rate * pll_calc() *
80 multipliers[idx] / divisors[idx];
81}
82
83static struct clk_ops sh7343_cpu_clk_ops = {
84 .init = cpu_clk_init,
85 .recalc = cpu_clk_recalc,
86};
87
88static struct clk_ops *sh7343_clk_ops[] = {
89 &sh7343_master_clk_ops,
90 &sh7343_module_clk_ops,
91 &sh7343_bus_clk_ops,
92 &sh7343_cpu_clk_ops,
93};
94
95void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
96{
97 if (idx < ARRAY_SIZE(sh7343_clk_ops))
98 *ops = sh7343_clk_ops[idx];
99}
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index c8694bac6477..c8694bac6477 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 9e6a216750c8..9e6a216750c8 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh73180.c b/arch/sh/kernel/cpu/sh4a/setup-sh73180.c
index cc9ea1e2e5df..cc9ea1e2e5df 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh73180.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh73180.c
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 91d61cf91ba1..91d61cf91ba1 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
new file mode 100644
index 000000000000..7528fc6b0d67
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -0,0 +1,76 @@
1/*
2 * SH7722 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xffe00000,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF,
20 .irqs = { 80, 81, 83, 82 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh7722_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh7722_devices_setup(void)
39{
40 return platform_add_devices(sh7722_devices,
41 ARRAY_SIZE(sh7722_devices));
42}
43__initcall(sh7722_devices_setup);
44
45static struct ipr_data sh7722_ipr_map[] = {
46 /* IRQ, IPR-idx, shift, prio */
47 { 16, 0, 12, 2 }, /* TMU0 */
48 { 17, 0, 8, 2 }, /* TMU1 */
49};
50
51static unsigned long ipr_offsets[] = {
52 0xa4080000, /* 0: IPRA */
53 0xa4080004, /* 1: IPRB */
54 0xa4080008, /* 2: IPRC */
55 0xa408000c, /* 3: IPRD */
56 0xa4080010, /* 4: IPRE */
57 0xa4080014, /* 5: IPRF */
58 0xa4080018, /* 6: IPRG */
59 0xa408001c, /* 7: IPRH */
60 0xa4080020, /* 8: IPRI */
61 0xa4080024, /* 9: IPRJ */
62 0xa4080028, /* 10: IPRK */
63 0xa408002c, /* 11: IPRL */
64};
65
66unsigned int map_ipridx_to_addr(int idx)
67{
68 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
69 return 0;
70 return ipr_offsets[idx];
71}
72
73void __init init_IRQ_ipr(void)
74{
75 make_ipr_irq(sh7722_ipr_map, ARRAY_SIZE(sh7722_ipr_map));
76}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 6a04cc5f5aca..6a04cc5f5aca 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 9aeaa2ddaa28..9aeaa2ddaa28 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index f8dd6b7bfab0..fe545bbb1e1f 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -325,14 +325,18 @@ void __init setup_arch(char **cmdline_p)
325 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); 325 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
326 if (&__rd_start != &__rd_end) { 326 if (&__rd_start != &__rd_end) {
327 LOADER_TYPE = 1; 327 LOADER_TYPE = 1;
328 INITRD_START = PHYSADDR((unsigned long)&__rd_start) - __MEMORY_START; 328 INITRD_START = PHYSADDR((unsigned long)&__rd_start) -
329 INITRD_SIZE = (unsigned long)&__rd_end - (unsigned long)&__rd_start; 329 __MEMORY_START;
330 INITRD_SIZE = (unsigned long)&__rd_end -
331 (unsigned long)&__rd_start;
330 } 332 }
331 333
332 if (LOADER_TYPE && INITRD_START) { 334 if (LOADER_TYPE && INITRD_START) {
333 if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) { 335 if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
334 reserve_bootmem_node(NODE_DATA(0), INITRD_START+__MEMORY_START, INITRD_SIZE); 336 reserve_bootmem_node(NODE_DATA(0), INITRD_START +
335 initrd_start = INITRD_START + PAGE_OFFSET + __MEMORY_START; 337 __MEMORY_START, INITRD_SIZE);
338 initrd_start = INITRD_START + PAGE_OFFSET +
339 __MEMORY_START;
336 initrd_end = initrd_start + INITRD_SIZE; 340 initrd_end = initrd_start + INITRD_SIZE;
337 } else { 341 } else {
338 printk("initrd extends beyond end of memory " 342 printk("initrd extends beyond end of memory "
@@ -404,7 +408,7 @@ static const char *cpu_name[] = {
404 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", 408 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
405 [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780", 409 [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780",
406 [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343", 410 [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343",
407 [CPU_SH7785] = "SH7785", 411 [CPU_SH7785] = "SH7785", [CPU_SH7722] = "SH7722",
408 [CPU_SH_NONE] = "Unknown" 412 [CPU_SH_NONE] = "Unknown"
409}; 413};
410 414
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 4e0362f50384..29f4ee35c6dc 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -35,6 +35,9 @@ config CPU_SUBTYPE_ST40
35 select CPU_SH4 35 select CPU_SH4
36 select CPU_HAS_INTC2_IRQ 36 select CPU_HAS_INTC2_IRQ
37 37
38config CPU_SHX2
39 bool
40
38# 41#
39# Processor subtypes 42# Processor subtypes
40# 43#
@@ -180,6 +183,7 @@ config CPU_SUBTYPE_SH7780
180config CPU_SUBTYPE_SH7785 183config CPU_SUBTYPE_SH7785
181 bool "Support SH7785 processor" 184 bool "Support SH7785 processor"
182 select CPU_SH4A 185 select CPU_SH4A
186 select CPU_SHX2
183 select CPU_HAS_INTC2_IRQ 187 select CPU_HAS_INTC2_IRQ
184 188
185comment "SH4AL-DSP Processor Support" 189comment "SH4AL-DSP Processor Support"
@@ -192,6 +196,12 @@ config CPU_SUBTYPE_SH7343
192 bool "Support SH7343 processor" 196 bool "Support SH7343 processor"
193 select CPU_SH4AL_DSP 197 select CPU_SH4AL_DSP
194 198
199config CPU_SUBTYPE_SH7722
200 bool "Support SH7722 processor"
201 select CPU_SH4AL_DSP
202 select CPU_SHX2
203 select CPU_HAS_IPR_IRQ
204
195endmenu 205endmenu
196 206
197menu "Memory management options" 207menu "Memory management options"
@@ -250,7 +260,7 @@ config 32BIT
250 260
251config X2TLB 261config X2TLB
252 bool "Enable extended TLB mode" 262 bool "Enable extended TLB mode"
253 depends on CPU_SUBTYPE_SH7785 && MMU && EXPERIMENTAL 263 depends on CPU_SHX2 && MMU && EXPERIMENTAL
254 help 264 help
255 Selecting this option will enable the extended mode of the SH-X2 265 Selecting this option will enable the extended mode of the SH-X2
256 TLB. For legacy SH-X behaviour and interoperability, say N. For 266 TLB. For legacy SH-X behaviour and interoperability, say N. For
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 9031b57f12dd..c53b69610a51 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -319,6 +319,28 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
319 319
320 sci_out(port, SCFCR, fcr_val); 320 sci_out(port, SCFCR, fcr_val);
321} 321}
322#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
323static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
324{
325 unsigned int fcr_val = 0;
326
327 if (cflag & CRTSCTS) {
328 fcr_val |= SCFCR_MCE;
329
330 ctrl_outw(0x0000, PORT_PSCR);
331 } else {
332 unsigned short data;
333
334 data = ctrl_inw(PORT_PSCR);
335 data &= 0x033f;
336 data |= 0x0400;
337 ctrl_outw(data, PORT_PSCR);
338
339 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
340 }
341
342 sci_out(port, SCFCR, fcr_val);
343}
322#else 344#else
323/* For SH7750 */ 345/* For SH7750 */
324static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 346static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index d84c1f9f8a39..77f7d6351ab1 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -90,6 +90,13 @@
90# define SCSPTR3 0xffe30010 /* 16 bit SCIF */ 90# define SCSPTR3 0xffe30010 /* 16 bit SCIF */
91# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ 91# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
92# define SCIF_ONLY 92# define SCIF_ONLY
93#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
94# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
95# define SCSPTR0 SCPDR0
96# define SCIF_ORER 0x0001 /* overrun error bit */
97# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
98# define SCIF_ONLY
99# define PORT_PSCR 0xA405011E
93#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 100#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
94# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 101# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
95# define SCIF_ORER 0x0001 /* overrun error bit */ 102# define SCIF_ORER 0x0001 /* overrun error bit */
@@ -522,6 +529,13 @@ static inline int sci_rxd_in(struct uart_port *port)
522 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 529 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
523 return 1; 530 return 1;
524} 531}
532#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
533static inline int sci_rxd_in(struct uart_port *port)
534{
535 if (port->mapbase == 0xffe00000)
536 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
537 return 1;
538}
525#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) 539#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
526static inline int sci_rxd_in(struct uart_port *port) 540static inline int sci_rxd_in(struct uart_port *port)
527{ 541{
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index 795047da5e17..a294997a8412 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -16,9 +16,8 @@
16 16
17static void __init check_bugs(void) 17static void __init check_bugs(void)
18{ 18{
19 extern char *get_cpu_subtype(void);
20 extern unsigned long loops_per_jiffy; 19 extern unsigned long loops_per_jiffy;
21 char *p= &init_utsname()->machine[2]; /* "sh" */ 20 char *p = &init_utsname()->machine[2]; /* "sh" */
22 21
23 cpu_data->loops_per_jiffy = loops_per_jiffy; 22 cpu_data->loops_per_jiffy = loops_per_jiffy;
24 23
@@ -40,6 +39,15 @@ static void __init check_bugs(void)
40 *p++ = '4'; 39 *p++ = '4';
41 *p++ = 'a'; 40 *p++ = 'a';
42 break; 41 break;
42 case CPU_SH73180 ... CPU_SH7722:
43 *p++ = '4';
44 *p++ = 'a';
45 *p++ = 'l';
46 *p++ = '-';
47 *p++ = 'd';
48 *p++ = 's';
49 *p++ = 'p';
50 break;
43 default: 51 default:
44 *p++ = '?'; 52 *p++ = '?';
45 *p++ = '!'; 53 *p++ = '!';
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h
index 6e9c7e6ee8e4..f92b20a0983d 100644
--- a/include/asm-sh/cpu-sh4/cache.h
+++ b/include/asm-sh/cpu-sh4/cache.h
@@ -22,7 +22,7 @@
22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ 22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ 23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ 24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
25#ifndef CONFIG_CPU_SUBTYPE_SH7780 25#ifndef CONFIG_CPU_SH4A
26#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ 26#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */
27#endif 27#endif
28 28
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index ef2b9b1ae41f..602d061ca2dc 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -10,7 +10,7 @@
10#ifndef __ASM_CPU_SH4_FREQ_H 10#ifndef __ASM_CPU_SH4_FREQ_H
11#define __ASM_CPU_SH4_FREQ_H 11#define __ASM_CPU_SH4_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH73180) 13#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722)
14#define FRQCR 0xa4150000 14#define FRQCR 0xa4150000
15#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 15#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
16#define FRQCR 0xffc80000 16#define FRQCR 0xffc80000
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index fd576088e47e..bff965ef4b95 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -37,7 +37,8 @@
37# define ONCHIP_NR_IRQS 144 37# define ONCHIP_NR_IRQS 144
38#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ 38#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
39 defined(CONFIG_CPU_SUBTYPE_SH73180) || \ 39 defined(CONFIG_CPU_SUBTYPE_SH73180) || \
40 defined(CONFIG_CPU_SUBTYPE_SH7343) 40 defined(CONFIG_CPU_SUBTYPE_SH7343) || \
41 defined(CONFIG_CPU_SUBTYPE_SH7722)
41# define ONCHIP_NR_IRQS 109 42# define ONCHIP_NR_IRQS 109
42#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 43#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
43# define ONCHIP_NR_IRQS 111 44# define ONCHIP_NR_IRQS 111
@@ -79,6 +80,8 @@
79# define OFFCHIP_NR_IRQS 16 80# define OFFCHIP_NR_IRQS 16
80#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) 81#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)
81# define OFFCHIP_NR_IRQS 12 82# define OFFCHIP_NR_IRQS 12
83#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
84# define OFFCHIP_NR_IRQS 14
82#elif defined(CONFIG_SH_UNKNOWN) 85#elif defined(CONFIG_SH_UNKNOWN)
83# define OFFCHIP_NR_IRQS 16 /* Must also be last */ 86# define OFFCHIP_NR_IRQS 16 /* Must also be last */
84#else 87#else
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 6f1dd7ca1b1d..e29f2abb92de 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -27,6 +27,8 @@
27#define CCN_CVR 0xff000040 27#define CCN_CVR 0xff000040
28#define CCN_PRR 0xff000044 28#define CCN_PRR 0xff000044
29 29
30const char *get_cpu_subtype(void);
31
30/* 32/*
31 * CPU type and hardware bug flags. Kept separately for each CPU. 33 * CPU type and hardware bug flags. Kept separately for each CPU.
32 * 34 *
@@ -52,8 +54,10 @@ enum cpu_type {
52 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, 54 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
53 55
54 /* SH-4A types */ 56 /* SH-4A types */
55 CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781, 57 CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
56 CPU_SH7785, 58
59 /* SH4AL-DSP types */
60 CPU_SH73180, CPU_SH7343, CPU_SH7722,
57 61
58 /* Unknown subtype */ 62 /* Unknown subtype */
59 CPU_SH_NONE 63 CPU_SH_NONE