aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRA-Jay Hung <Jay_Hung@ralinktech.com>2010-12-13 06:31:27 -0500
committerJohn W. Linville <linville@tuxdriver.com>2010-12-13 15:23:33 -0500
commit38c8a566fcfe080c910bb6b348d40121df2b8e88 (patch)
tree105b594ab0c3c5d5c04948e42e75428b8d345fa6
parent7a7793ef078e56fa395f96567630032c44ab5951 (diff)
rt2x00: Add rt2800 EEPROM definition
Add and modify NIC Configuration and LED definition of EEPROM Signed-off-by: RA-Jay Hung <jay_hung@ralinktech.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h94
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c111
2 files changed, 119 insertions, 86 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index a81c4371835b..9dcbf87156b6 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -1841,32 +1841,51 @@ struct mac_iveiv_entry {
1841#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00) 1841#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
1842 1842
1843/* 1843/*
1844 * EEPROM ANTENNA config 1844 * EEPROM NIC Configuration 0
1845 * RXPATH: 1: 1R, 2: 2R, 3: 3R 1845 * RXPATH: 1: 1R, 2: 2R, 3: 3R
1846 * TXPATH: 1: 1T, 2: 2T 1846 * TXPATH: 1: 1T, 2: 2T, 3: 3T
1847 */ 1847 * RF_TYPE: RFIC type
1848#define EEPROM_ANTENNA 0x001a 1848 */
1849#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f) 1849#define EEPROM_NIC_CONF0 0x001a
1850#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0) 1850#define EEPROM_NIC_CONF0_RXPATH FIELD16(0x000f)
1851#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00) 1851#define EEPROM_NIC_CONF0_TXPATH FIELD16(0x00f0)
1852 1852#define EEPROM_NIC_CONF0_RF_TYPE FIELD16(0x0f00)
1853/* 1853
1854 * EEPROM NIC config 1854/*
1855 * CARDBUS_ACCEL: 0 - enable, 1 - disable 1855 * EEPROM NIC Configuration 1
1856 */ 1856 * HW_RADIO: 0: disable, 1: enable
1857#define EEPROM_NIC 0x001b 1857 * EXTERNAL_TX_ALC: 0: disable, 1: enable
1858#define EEPROM_NIC_HW_RADIO FIELD16(0x0001) 1858 * EXTERNAL_LNA_2G: 0: disable, 1: enable
1859#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002) 1859 * EXTERNAL_LNA_5G: 0: disable, 1: enable
1860#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004) 1860 * CARDBUS_ACCEL: 0: enable, 1: disable
1861#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008) 1861 * BW40M_SB_2G: 0: disable, 1: enable
1862#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010) 1862 * BW40M_SB_5G: 0: disable, 1: enable
1863#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020) 1863 * WPS_PBC: 0: disable, 1: enable
1864#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040) 1864 * BW40M_2G: 0: enable, 1: disable
1865#define EEPROM_NIC_WPS_PBC FIELD16(0x0080) 1865 * BW40M_5G: 0: enable, 1: disable
1866#define EEPROM_NIC_BW40M_BG FIELD16(0x0100) 1866 * BROADBAND_EXT_LNA: 0: disable, 1: enable
1867#define EEPROM_NIC_BW40M_A FIELD16(0x0200) 1867 * ANT_DIVERSITY: 00: Disable, 01: Diversity,
1868#define EEPROM_NIC_ANT_DIVERSITY FIELD16(0x0800) 1868 * 10: Main antenna, 11: Aux antenna
1869#define EEPROM_NIC_DAC_TEST FIELD16(0x8000) 1869 * INTERNAL_TX_ALC: 0: disable, 1: enable
1870 * BT_COEXIST: 0: disable, 1: enable
1871 * DAC_TEST: 0: disable, 1: enable
1872 */
1873#define EEPROM_NIC_CONF1 0x001b
1874#define EEPROM_NIC_CONF1_HW_RADIO FIELD16(0x0001)
1875#define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC FIELD16(0x0002)
1876#define EEPROM_NIC_CONF1_EXTERNAL_LNA_2G FIELD16(0x0004)
1877#define EEPROM_NIC_CONF1_EXTERNAL_LNA_5G FIELD16(0x0008)
1878#define EEPROM_NIC_CONF1_CARDBUS_ACCEL FIELD16(0x0010)
1879#define EEPROM_NIC_CONF1_BW40M_SB_2G FIELD16(0x0020)
1880#define EEPROM_NIC_CONF1_BW40M_SB_5G FIELD16(0x0040)
1881#define EEPROM_NIC_CONF1_WPS_PBC FIELD16(0x0080)
1882#define EEPROM_NIC_CONF1_BW40M_2G FIELD16(0x0100)
1883#define EEPROM_NIC_CONF1_BW40M_5G FIELD16(0x0200)
1884#define EEPROM_NIC_CONF1_BROADBAND_EXT_LNA FIELD16(0x400)
1885#define EEPROM_NIC_CONF1_ANT_DIVERSITY FIELD16(0x1800)
1886#define EEPROM_NIC_CONF1_INTERNAL_TX_ALC FIELD16(0x2000)
1887#define EEPROM_NIC_CONF1_BT_COEXIST FIELD16(0x4000)
1888#define EEPROM_NIC_CONF1_DAC_TEST FIELD16(0x8000)
1870 1889
1871/* 1890/*
1872 * EEPROM frequency 1891 * EEPROM frequency
@@ -1888,9 +1907,9 @@ struct mac_iveiv_entry {
1888 * POLARITY_GPIO_4: Polarity GPIO4 setting. 1907 * POLARITY_GPIO_4: Polarity GPIO4 setting.
1889 * LED_MODE: Led mode. 1908 * LED_MODE: Led mode.
1890 */ 1909 */
1891#define EEPROM_LED1 0x001e 1910#define EEPROM_LED_AG_CONF 0x001e
1892#define EEPROM_LED2 0x001f 1911#define EEPROM_LED_ACT_CONF 0x001f
1893#define EEPROM_LED3 0x0020 1912#define EEPROM_LED_POLARITY 0x0020
1894#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001) 1913#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
1895#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002) 1914#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
1896#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004) 1915#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
@@ -1902,6 +1921,17 @@ struct mac_iveiv_entry {
1902#define EEPROM_LED_LED_MODE FIELD16(0x1f00) 1921#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
1903 1922
1904/* 1923/*
1924 * EEPROM NIC Configuration 2
1925 * RX_STREAM: 0: Reserved, 1: 1 Stream, 2: 2 Stream
1926 * TX_STREAM: 0: Reserved, 1: 1 Stream, 2: 2 Stream
1927 * CRYSTAL: 00: Reserved, 01: One crystal, 10: Two crystal, 11: Reserved
1928 */
1929#define EEPROM_NIC_CONF2 0x0021
1930#define EEPROM_NIC_CONF2_RX_STREAM FIELD16(0x000f)
1931#define EEPROM_NIC_CONF2_TX_STREAM FIELD16(0x00f0)
1932#define EEPROM_NIC_CONF2_CRYSTAL FIELD16(0x0600)
1933
1934/*
1905 * EEPROM LNA 1935 * EEPROM LNA
1906 */ 1936 */
1907#define EEPROM_LNA 0x0022 1937#define EEPROM_LNA 0x0022
@@ -1951,7 +1981,7 @@ struct mac_iveiv_entry {
1951 1981
1952/* 1982/*
1953 * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power. 1983 * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
1954 * This is delta in 40MHZ. 1984 * This is delta in 40MHZ.
1955 * VALUE: Tx Power dalta value (MAX=4) 1985 * VALUE: Tx Power dalta value (MAX=4)
1956 * TYPE: 1: Plus the delta value, 0: minus the delta value 1986 * TYPE: 1: Plus the delta value, 0: minus the delta value
1957 * TXPOWER: Enable: 1987 * TXPOWER: Enable:
@@ -2007,9 +2037,9 @@ struct mac_iveiv_entry {
2007#define MCU_CURRENT 0x36 2037#define MCU_CURRENT 0x36
2008#define MCU_LED 0x50 2038#define MCU_LED 0x50
2009#define MCU_LED_STRENGTH 0x51 2039#define MCU_LED_STRENGTH 0x51
2010#define MCU_LED_1 0x52 2040#define MCU_LED_AG_CONF 0x52
2011#define MCU_LED_2 0x53 2041#define MCU_LED_ACT_CONF 0x53
2012#define MCU_LED_3 0x54 2042#define MCU_LED_LED_POLARITY 0x54
2013#define MCU_RADAR 0x60 2043#define MCU_RADAR 0x60
2014#define MCU_BOOT_SIGNAL 0x72 2044#define MCU_BOOT_SIGNAL 0x72
2015#define MCU_BBP_SIGNAL 0x80 2045#define MCU_BBP_SIGNAL 0x80
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 75631614aba3..9b592d9481b4 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1930,8 +1930,8 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1930 if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || 1930 if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
1931 rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || 1931 rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) ||
1932 rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) { 1932 rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) {
1933 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); 1933 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
1934 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST)) 1934 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_DAC_TEST))
1935 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 1935 rt2800_register_write(rt2x00dev, TX_SW_CFG2,
1936 0x0000002c); 1936 0x0000002c);
1937 else 1937 else
@@ -2376,10 +2376,10 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
2376 rt2x00_rt(rt2x00dev, RT3390)) { 2376 rt2x00_rt(rt2x00dev, RT3390)) {
2377 rt2800_bbp_read(rt2x00dev, 138, &value); 2377 rt2800_bbp_read(rt2x00dev, 138, &value);
2378 2378
2379 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 2379 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
2380 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1) 2380 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) == 1)
2381 value |= 0x20; 2381 value |= 0x20;
2382 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1) 2382 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1)
2383 value &= ~0x02; 2383 value &= ~0x02;
2384 2384
2385 rt2800_bbp_write(rt2x00dev, 138, value); 2385 rt2800_bbp_write(rt2x00dev, 138, value);
@@ -2591,8 +2591,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
2591 rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1); 2591 rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);
2592 if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || 2592 if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
2593 rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E)) { 2593 rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E)) {
2594 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); 2594 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
2595 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST)) 2595 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_DAC_TEST))
2596 rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3); 2596 rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3);
2597 else 2597 else
2598 rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 0); 2598 rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 0);
@@ -2665,10 +2665,10 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
2665 if (rt2x00_rt(rt2x00dev, RT3090)) { 2665 if (rt2x00_rt(rt2x00dev, RT3090)) {
2666 rt2800_bbp_read(rt2x00dev, 138, &bbp); 2666 rt2800_bbp_read(rt2x00dev, 138, &bbp);
2667 2667
2668 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 2668 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
2669 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1) 2669 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1)
2670 rt2x00_set_field8(&bbp, BBP138_RX_ADC1, 0); 2670 rt2x00_set_field8(&bbp, BBP138_RX_ADC1, 0);
2671 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1) 2671 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) == 1)
2672 rt2x00_set_field8(&bbp, BBP138_TX_DAC1, 1); 2672 rt2x00_set_field8(&bbp, BBP138_TX_DAC1, 1);
2673 2673
2674 rt2800_bbp_write(rt2x00dev, 138, bbp); 2674 rt2800_bbp_write(rt2x00dev, 138, bbp);
@@ -2767,16 +2767,16 @@ int rt2800_enable_radio(struct rt2x00_dev *rt2x00dev)
2767 /* 2767 /*
2768 * Initialize LED control 2768 * Initialize LED control
2769 */ 2769 */
2770 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word); 2770 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED_AG_CONF, &word);
2771 rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff, 2771 rt2800_mcu_request(rt2x00dev, MCU_LED_AG_CONF, 0xff,
2772 word & 0xff, (word >> 8) & 0xff); 2772 word & 0xff, (word >> 8) & 0xff);
2773 2773
2774 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word); 2774 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED_ACT_CONF, &word);
2775 rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff, 2775 rt2800_mcu_request(rt2x00dev, MCU_LED_ACT_CONF, 0xff,
2776 word & 0xff, (word >> 8) & 0xff); 2776 word & 0xff, (word >> 8) & 0xff);
2777 2777
2778 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word); 2778 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED_POLARITY, &word);
2779 rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff, 2779 rt2800_mcu_request(rt2x00dev, MCU_LED_LED_POLARITY, 0xff,
2780 word & 0xff, (word >> 8) & 0xff); 2780 word & 0xff, (word >> 8) & 0xff);
2781 2781
2782 return 0; 2782 return 0;
@@ -2870,38 +2870,41 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
2870 EEPROM(rt2x00dev, "MAC: %pM\n", mac); 2870 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
2871 } 2871 }
2872 2872
2873 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); 2873 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &word);
2874 if (word == 0xffff) { 2874 if (word == 0xffff) {
2875 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2); 2875 rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 2);
2876 rt2x00_set_field16(&word, EEPROM_ANTENNA_TXPATH, 1); 2876 rt2x00_set_field16(&word, EEPROM_NIC_CONF0_TXPATH, 1);
2877 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820); 2877 rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF2820);
2878 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 2878 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
2879 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); 2879 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
2880 } else if (rt2x00_rt(rt2x00dev, RT2860) || 2880 } else if (rt2x00_rt(rt2x00dev, RT2860) ||
2881 rt2x00_rt(rt2x00dev, RT2872)) { 2881 rt2x00_rt(rt2x00dev, RT2872)) {
2882 /* 2882 /*
2883 * There is a max of 2 RX streams for RT28x0 series 2883 * There is a max of 2 RX streams for RT28x0 series
2884 */ 2884 */
2885 if (rt2x00_get_field16(word, EEPROM_ANTENNA_RXPATH) > 2) 2885 if (rt2x00_get_field16(word, EEPROM_NIC_CONF0_RXPATH) > 2)
2886 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2); 2886 rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 2);
2887 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 2887 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
2888 } 2888 }
2889 2889
2890 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); 2890 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &word);
2891 if (word == 0xffff) { 2891 if (word == 0xffff) {
2892 rt2x00_set_field16(&word, EEPROM_NIC_HW_RADIO, 0); 2892 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_HW_RADIO, 0);
2893 rt2x00_set_field16(&word, EEPROM_NIC_DYNAMIC_TX_AGC, 0); 2893 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_EXTERNAL_TX_ALC, 0);
2894 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0); 2894 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_EXTERNAL_LNA_2G, 0);
2895 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0); 2895 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_EXTERNAL_LNA_5G, 0);
2896 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); 2896 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_CARDBUS_ACCEL, 0);
2897 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_BG, 0); 2897 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_SB_2G, 0);
2898 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_A, 0); 2898 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_SB_5G, 0);
2899 rt2x00_set_field16(&word, EEPROM_NIC_WPS_PBC, 0); 2899 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_WPS_PBC, 0);
2900 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_BG, 0); 2900 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_2G, 0);
2901 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_A, 0); 2901 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BW40M_5G, 0);
2902 rt2x00_set_field16(&word, EEPROM_NIC_ANT_DIVERSITY, 0); 2902 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BROADBAND_EXT_LNA, 0);
2903 rt2x00_set_field16(&word, EEPROM_NIC_DAC_TEST, 0); 2903 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_ANT_DIVERSITY, 0);
2904 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); 2904 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_INTERNAL_TX_ALC, 0);
2905 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_BT_COEXIST, 0);
2906 rt2x00_set_field16(&word, EEPROM_NIC_CONF1_DAC_TEST, 0);
2907 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF1, word);
2905 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word); 2908 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
2906 } 2909 }
2907 2910
@@ -2916,9 +2919,9 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
2916 LED_MODE_TXRX_ACTIVITY); 2919 LED_MODE_TXRX_ACTIVITY);
2917 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0); 2920 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0);
2918 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word); 2921 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
2919 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED1, 0x5555); 2922 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED_AG_CONF, 0x5555);
2920 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED2, 0x2221); 2923 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED_ACT_CONF, 0x2221);
2921 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED3, 0xa9f8); 2924 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED_POLARITY, 0xa9f8);
2922 EEPROM(rt2x00dev, "Led Mode: 0x%04x\n", word); 2925 EEPROM(rt2x00dev, "Led Mode: 0x%04x\n", word);
2923 } 2926 }
2924 2927
@@ -2982,12 +2985,12 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
2982 /* 2985 /*
2983 * Read EEPROM word for configuration. 2986 * Read EEPROM word for configuration.
2984 */ 2987 */
2985 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 2988 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
2986 2989
2987 /* 2990 /*
2988 * Identify RF chipset. 2991 * Identify RF chipset.
2989 */ 2992 */
2990 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 2993 value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
2991 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg); 2994 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
2992 2995
2993 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), 2996 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
@@ -3023,9 +3026,9 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
3023 * Identify default antenna configuration. 3026 * Identify default antenna configuration.
3024 */ 3027 */
3025 rt2x00dev->default_ant.tx = 3028 rt2x00dev->default_ant.tx =
3026 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH); 3029 rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH);
3027 rt2x00dev->default_ant.rx = 3030 rt2x00dev->default_ant.rx =
3028 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH); 3031 rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH);
3029 3032
3030 /* 3033 /*
3031 * Read frequency offset and RF programming sequence. 3034 * Read frequency offset and RF programming sequence.
@@ -3036,17 +3039,17 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
3036 /* 3039 /*
3037 * Read external LNA informations. 3040 * Read external LNA informations.
3038 */ 3041 */
3039 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); 3042 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
3040 3043
3041 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A)) 3044 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_EXTERNAL_LNA_5G))
3042 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags); 3045 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
3043 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG)) 3046 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_EXTERNAL_LNA_2G))
3044 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags); 3047 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
3045 3048
3046 /* 3049 /*
3047 * Detect if this device has an hardware controlled radio. 3050 * Detect if this device has an hardware controlled radio.
3048 */ 3051 */
3049 if (rt2x00_get_field16(eeprom, EEPROM_NIC_HW_RADIO)) 3052 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_HW_RADIO))
3050 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags); 3053 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
3051 3054
3052 /* 3055 /*
@@ -3258,7 +3261,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
3258 rt2x00dev->hw->max_report_rates = 7; 3261 rt2x00dev->hw->max_report_rates = 7;
3259 rt2x00dev->hw->max_rate_tries = 1; 3262 rt2x00dev->hw->max_rate_tries = 1;
3260 3263
3261 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 3264 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
3262 3265
3263 /* 3266 /*
3264 * Initialize hw_mode information. 3267 * Initialize hw_mode information.
@@ -3302,11 +3305,11 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
3302 IEEE80211_HT_CAP_SGI_20 | 3305 IEEE80211_HT_CAP_SGI_20 |
3303 IEEE80211_HT_CAP_SGI_40; 3306 IEEE80211_HT_CAP_SGI_40;
3304 3307
3305 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) >= 2) 3308 if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) >= 2)
3306 spec->ht.cap |= IEEE80211_HT_CAP_TX_STBC; 3309 spec->ht.cap |= IEEE80211_HT_CAP_TX_STBC;
3307 3310
3308 spec->ht.cap |= 3311 spec->ht.cap |=
3309 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) << 3312 rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) <<
3310 IEEE80211_HT_CAP_RX_STBC_SHIFT; 3313 IEEE80211_HT_CAP_RX_STBC_SHIFT;
3311 3314
3312 spec->ht.ampdu_factor = 3; 3315 spec->ht.ampdu_factor = 3;
@@ -3314,10 +3317,10 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
3314 spec->ht.mcs.tx_params = 3317 spec->ht.mcs.tx_params =
3315 IEEE80211_HT_MCS_TX_DEFINED | 3318 IEEE80211_HT_MCS_TX_DEFINED |
3316 IEEE80211_HT_MCS_TX_RX_DIFF | 3319 IEEE80211_HT_MCS_TX_RX_DIFF |
3317 ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) << 3320 ((rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) - 1) <<
3318 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 3321 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3319 3322
3320 switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) { 3323 switch (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH)) {
3321 case 3: 3324 case 3:
3322 spec->ht.mcs.rx_mask[2] = 0xff; 3325 spec->ht.mcs.rx_mask[2] = 0xff;
3323 case 2: 3326 case 2: