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authorAndi Kleen <ak@suse.de>2006-07-29 15:42:46 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-29 23:59:55 -0400
commit355540f3338e1408dac98413f05d612a76d4f5e3 (patch)
tree4e9c208dca35a078a4e5900ee38543108feefa07
parentd2105b10fe0f460c388fe4e09226313f519d8c00 (diff)
[PATCH] x86_64: Revert k8-bus.c northbridge access change
As Travis Betak points out it accesses the wrong northbridge subfunction now. Switch back to the old code. Cc: "Travis Betak" <betak@mpdtxmail.amd.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/x86_64/pci/k8-bus.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86_64/pci/k8-bus.c b/arch/x86_64/pci/k8-bus.c
index b50a7c7c47f8..3acf60ded2a0 100644
--- a/arch/x86_64/pci/k8-bus.c
+++ b/arch/x86_64/pci/k8-bus.c
@@ -2,7 +2,6 @@
2#include <linux/pci.h> 2#include <linux/pci.h>
3#include <asm/mpspec.h> 3#include <asm/mpspec.h>
4#include <linux/cpumask.h> 4#include <linux/cpumask.h>
5#include <asm/k8.h>
6 5
7/* 6/*
8 * This discovers the pcibus <-> node mapping on AMD K8. 7 * This discovers the pcibus <-> node mapping on AMD K8.
@@ -19,6 +18,7 @@
19#define NR_LDT_BUS_NUMBER_REGISTERS 3 18#define NR_LDT_BUS_NUMBER_REGISTERS 3
20#define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 8) & 0xFF) 19#define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 8) & 0xFF)
21#define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF) 20#define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF)
21#define PCI_DEVICE_ID_K8HTCONFIG 0x1100
22 22
23/** 23/**
24 * fill_mp_bus_to_cpumask() 24 * fill_mp_bus_to_cpumask()
@@ -28,7 +28,8 @@
28__init static int 28__init static int
29fill_mp_bus_to_cpumask(void) 29fill_mp_bus_to_cpumask(void)
30{ 30{
31 int i, j, k; 31 struct pci_dev *nb_dev = NULL;
32 int i, j;
32 u32 ldtbus, nid; 33 u32 ldtbus, nid;
33 static int lbnr[3] = { 34 static int lbnr[3] = {
34 LDT_BUS_NUMBER_REGISTER_0, 35 LDT_BUS_NUMBER_REGISTER_0,
@@ -36,9 +37,8 @@ fill_mp_bus_to_cpumask(void)
36 LDT_BUS_NUMBER_REGISTER_2 37 LDT_BUS_NUMBER_REGISTER_2
37 }; 38 };
38 39
39 cache_k8_northbridges(); 40 while ((nb_dev = pci_get_device(PCI_VENDOR_ID_AMD,
40 for (k = 0; k < num_k8_northbridges; k++) { 41 PCI_DEVICE_ID_K8HTCONFIG, nb_dev))) {
41 struct pci_dev *nb_dev = k8_northbridges[k];
42 pci_read_config_dword(nb_dev, NODE_ID_REGISTER, &nid); 42 pci_read_config_dword(nb_dev, NODE_ID_REGISTER, &nid);
43 43
44 for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) { 44 for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) {