aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSuzuki Poulose <suzuki@in.ibm.com>2011-12-14 17:57:57 -0500
committerJosh Boyer <jwboyer@gmail.com>2011-12-20 10:20:38 -0500
commit239132454583d474932d8835f87a244f6f1bff9e (patch)
treea7c5730d7170270ebf6250a6d19ef484998a4853
parent0f890c8d205e47f7cb0d381ffba582a170fd4f72 (diff)
powerpc/44x: Enable DYNAMIC_MEMSTART for 440x
DYNAMIC_MEMSTART(old RELOCATABLE) was restricted only to PPC_47x variants of 44x. This patch enables DYNAMIC_MEMSTART for 440x based chipsets. Signed-off-by: Suzuki K. Poulose <suzuki@in.ibm.com> Cc: Josh Boyer <jwboyer@gmail.com> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linux ppc dev <linuxppc-dev@lists.ozlabs.org> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/powerpc/kernel/head_44x.S12
2 files changed, 13 insertions, 1 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 6c8475692322..8b323b7b0a61 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -833,7 +833,7 @@ config LOWMEM_CAM_NUM
833 833
834config DYNAMIC_MEMSTART 834config DYNAMIC_MEMSTART
835 bool "Enable page aligned dynamic load address for kernel (EXPERIMENTAL)" 835 bool "Enable page aligned dynamic load address for kernel (EXPERIMENTAL)"
836 depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || PPC_47x) 836 depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || 44x)
837 select NONSTATIC_KERNEL 837 select NONSTATIC_KERNEL
838 help 838 help
839 This option enables the kernel to be loaded at any page aligned 839 This option enables the kernel to be loaded at any page aligned
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index d7a1debda10b..0878bf5d8a68 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -804,12 +804,24 @@ skpinv: addi r4,r4,1 /* Increment */
804/* 804/*
805 * Configure and load pinned entry into TLB slot 63. 805 * Configure and load pinned entry into TLB slot 63.
806 */ 806 */
807#ifdef CONFIG_DYNAMIC_MEMSTART
808
809 /* Read the XLAT entry for our current mapping */
810 tlbre r25,r23,PPC44x_TLB_XLAT
811
812 lis r3,KERNELBASE@h
813 ori r3,r3,KERNELBASE@l
814
815 /* Use our current RPN entry */
816 mr r4,r25
817#else
807 818
808 lis r3,PAGE_OFFSET@h 819 lis r3,PAGE_OFFSET@h
809 ori r3,r3,PAGE_OFFSET@l 820 ori r3,r3,PAGE_OFFSET@l
810 821
811 /* Kernel is at the base of RAM */ 822 /* Kernel is at the base of RAM */
812 li r4, 0 /* Load the kernel physical address */ 823 li r4, 0 /* Load the kernel physical address */
824#endif
813 825
814 /* Load the kernel PID = 0 */ 826 /* Load the kernel PID = 0 */
815 li r0,0 827 li r0,0