diff options
author | Jiang Liu <jiang.liu@huawei.com> | 2012-07-24 05:20:07 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-08-23 12:11:11 -0400 |
commit | 028fbad480edfc73157408f894a29385afc9689e (patch) | |
tree | 764dce0d3268281709f8db52880f695933ca9847 | |
parent | 76b57c6700e56d146938ca9dc1d553557e940d9f (diff) |
PCI/hotplug: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify pcihp_slot.c.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
-rw-r--r-- | drivers/pci/hotplug/pcihp_slot.c | 20 |
1 files changed, 5 insertions, 15 deletions
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c index 8c05a18c9770..fec2d5b75440 100644 --- a/drivers/pci/hotplug/pcihp_slot.c +++ b/drivers/pci/hotplug/pcihp_slot.c | |||
@@ -96,17 +96,11 @@ static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp) | |||
96 | static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp) | 96 | static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp) |
97 | { | 97 | { |
98 | int pos; | 98 | int pos; |
99 | u16 reg16; | ||
100 | u32 reg32; | 99 | u32 reg32; |
101 | 100 | ||
102 | if (!hpp) | 101 | if (!hpp) |
103 | return; | 102 | return; |
104 | 103 | ||
105 | /* Find PCI Express capability */ | ||
106 | pos = pci_pcie_cap(dev); | ||
107 | if (!pos) | ||
108 | return; | ||
109 | |||
110 | if (hpp->revision > 1) { | 104 | if (hpp->revision > 1) { |
111 | dev_warn(&dev->dev, "PCIe settings rev %d not supported\n", | 105 | dev_warn(&dev->dev, "PCIe settings rev %d not supported\n", |
112 | hpp->revision); | 106 | hpp->revision); |
@@ -114,17 +108,13 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp) | |||
114 | } | 108 | } |
115 | 109 | ||
116 | /* Initialize Device Control Register */ | 110 | /* Initialize Device Control Register */ |
117 | pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, ®16); | 111 | pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL, |
118 | reg16 = (reg16 & hpp->pci_exp_devctl_and) | hpp->pci_exp_devctl_or; | 112 | ~hpp->pci_exp_devctl_and, hpp->pci_exp_devctl_or); |
119 | pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16); | ||
120 | 113 | ||
121 | /* Initialize Link Control Register */ | 114 | /* Initialize Link Control Register */ |
122 | if (dev->subordinate) { | 115 | if (dev->subordinate) |
123 | pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, ®16); | 116 | pcie_capability_clear_and_set_word(dev, PCI_EXP_LNKCTL, |
124 | reg16 = (reg16 & hpp->pci_exp_lnkctl_and) | 117 | ~hpp->pci_exp_lnkctl_and, hpp->pci_exp_lnkctl_or); |
125 | | hpp->pci_exp_lnkctl_or; | ||
126 | pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, reg16); | ||
127 | } | ||
128 | 118 | ||
129 | /* Find Advanced Error Reporting Enhanced Capability */ | 119 | /* Find Advanced Error Reporting Enhanced Capability */ |
130 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 120 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |