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authorPaul Walmsley <paul@pwsan.com>2009-01-28 14:08:17 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 12:50:33 -0500
commitc1bd7aaf678a7e35086520e284d5b44bc69b6599 (patch)
tree39295cebafbda2904c2a23e8035240e6e365aab2
parentb8168d1e3989bc141da6bba87ad49e218ff04658 (diff)
[ARM] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask
Convert struct dpll_data.idlest_bit field to idlest_mask. Needed since OMAP2 uses two bits for DPLL IDLEST rather than one. While here, add the missing idlest_* fields for DPLL3. linux-omap source commits are 25bab0f176b0a97be18a1b38153f266c3a155784 and b0f7fd17db2aaf8e6e9a2732ae3f4de0874db01c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-omap2/clock34xx.c6
-rw-r--r--arch/arm/mach-omap2/clock34xx.h10
-rw-r--r--arch/arm/plat-omap/include/mach/clock.h2
3 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index fdfc7d582913..aad77e0d43c7 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -314,14 +314,12 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state)
314 const struct dpll_data *dd; 314 const struct dpll_data *dd;
315 int i = 0; 315 int i = 0;
316 int ret = -EINVAL; 316 int ret = -EINVAL;
317 u32 idlest_mask;
318 317
319 dd = clk->dpll_data; 318 dd = clk->dpll_data;
320 319
321 state <<= dd->idlest_bit; 320 state <<= __ffs(dd->idlest_mask);
322 idlest_mask = 1 << dd->idlest_bit;
323 321
324 while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) && 322 while (((__raw_readl(dd->idlest_reg) & dd->idlest_mask) != state) &&
325 i < MAX_DPLL_WAIT_TRIES) { 323 i < MAX_DPLL_WAIT_TRIES) {
326 i++; 324 i++;
327 udelay(1); 325 udelay(1);
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index f8088c0ec018..7ee131202625 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -266,7 +266,7 @@ static struct dpll_data dpll1_dd = {
266 .autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL), 266 .autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL),
267 .autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK, 267 .autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK,
268 .idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), 268 .idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
269 .idlest_bit = OMAP3430_ST_MPU_CLK_SHIFT, 269 .idlest_mask = OMAP3430_ST_MPU_CLK_MASK,
270 .max_multiplier = OMAP3_MAX_DPLL_MULT, 270 .max_multiplier = OMAP3_MAX_DPLL_MULT,
271 .max_divider = OMAP3_MAX_DPLL_DIV, 271 .max_divider = OMAP3_MAX_DPLL_DIV,
272 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE 272 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -339,7 +339,7 @@ static struct dpll_data dpll2_dd = {
339 .autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL), 339 .autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL),
340 .autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK, 340 .autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK,
341 .idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL), 341 .idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL),
342 .idlest_bit = OMAP3430_ST_IVA2_CLK_SHIFT, 342 .idlest_mask = OMAP3430_ST_IVA2_CLK_MASK,
343 .max_multiplier = OMAP3_MAX_DPLL_MULT, 343 .max_multiplier = OMAP3_MAX_DPLL_MULT,
344 .max_divider = OMAP3_MAX_DPLL_DIV, 344 .max_divider = OMAP3_MAX_DPLL_DIV,
345 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE 345 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -397,6 +397,8 @@ static struct dpll_data dpll3_dd = {
397 .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT, 397 .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
398 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), 398 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
399 .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK, 399 .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
400 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
401 .idlest_mask = OMAP3430_ST_CORE_CLK_MASK,
400 .max_multiplier = OMAP3_MAX_DPLL_MULT, 402 .max_multiplier = OMAP3_MAX_DPLL_MULT,
401 .max_divider = OMAP3_MAX_DPLL_DIV, 403 .max_divider = OMAP3_MAX_DPLL_DIV,
402 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE 404 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -587,7 +589,7 @@ static struct dpll_data dpll4_dd = {
587 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), 589 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
588 .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK, 590 .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
589 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), 591 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
590 .idlest_bit = OMAP3430_ST_PERIPH_CLK_SHIFT, 592 .idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK,
591 .max_multiplier = OMAP3_MAX_DPLL_MULT, 593 .max_multiplier = OMAP3_MAX_DPLL_MULT,
592 .max_divider = OMAP3_MAX_DPLL_DIV, 594 .max_divider = OMAP3_MAX_DPLL_DIV,
593 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE 595 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -926,7 +928,7 @@ static struct dpll_data dpll5_dd = {
926 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL), 928 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL),
927 .autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK, 929 .autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK,
928 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), 930 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2),
929 .idlest_bit = OMAP3430ES2_ST_PERIPH2_CLK_SHIFT, 931 .idlest_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
930 .max_multiplier = OMAP3_MAX_DPLL_MULT, 932 .max_multiplier = OMAP3_MAX_DPLL_MULT,
931 .max_divider = OMAP3_MAX_DPLL_DIV, 933 .max_divider = OMAP3_MAX_DPLL_DIV,
932 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE 934 .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 681c65105e25..611df52a3242 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -54,10 +54,10 @@ struct dpll_data {
54 u32 enable_mask; 54 u32 enable_mask;
55 u32 autoidle_mask; 55 u32 autoidle_mask;
56 u32 freqsel_mask; 56 u32 freqsel_mask;
57 u32 idlest_mask;
57 u8 auto_recal_bit; 58 u8 auto_recal_bit;
58 u8 recal_en_bit; 59 u8 recal_en_bit;
59 u8 recal_st_bit; 60 u8 recal_st_bit;
60 u8 idlest_bit;
61# endif 61# endif
62}; 62};
63 63