diff options
author | Dipen Dudhat <Dipen.Dudhat@freescale.com> | 2011-05-19 02:38:23 -0400 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-05-19 02:45:07 -0400 |
commit | bbfff72ee3e76bd4712b87386af00bfe97114bc9 (patch) | |
tree | 7433be01b541d2ae506ec48f93adf302dcc2d32e | |
parent | 41cd08560bbf8371bbd00e783e992b0dc7e7c83d (diff) |
powerpc: Integrated Flash controller device tree bindings
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Acked-By: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/ifc.txt | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt b/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt new file mode 100644 index 000000000000..939a26d541f6 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt | |||
@@ -0,0 +1,76 @@ | |||
1 | Integrated Flash Controller | ||
2 | |||
3 | Properties: | ||
4 | - name : Should be ifc | ||
5 | - compatible : should contain "fsl,ifc". The version of the integrated | ||
6 | flash controller can be found in the IFC_REV register at | ||
7 | offset zero. | ||
8 | |||
9 | - #address-cells : Should be either two or three. The first cell is the | ||
10 | chipselect number, and the remaining cells are the | ||
11 | offset into the chipselect. | ||
12 | - #size-cells : Either one or two, depending on how large each chipselect | ||
13 | can be. | ||
14 | - reg : Offset and length of the register set for the device | ||
15 | - interrupts : IFC has two interrupts. The first one is the "common" | ||
16 | interrupt(CM_EVTER_STAT), and second is the NAND interrupt | ||
17 | (NAND_EVTER_STAT). | ||
18 | |||
19 | - ranges : Each range corresponds to a single chipselect, and covers | ||
20 | the entire access window as configured. | ||
21 | |||
22 | Child device nodes describe the devices connected to IFC such as NOR (e.g. | ||
23 | cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices | ||
24 | like FPGAs, CPLDs, etc. | ||
25 | |||
26 | Example: | ||
27 | |||
28 | ifc@ffe1e000 { | ||
29 | compatible = "fsl,ifc", "simple-bus"; | ||
30 | #address-cells = <2>; | ||
31 | #size-cells = <1>; | ||
32 | reg = <0x0 0xffe1e000 0 0x2000>; | ||
33 | interrupts = <16 2 19 2>; | ||
34 | |||
35 | /* NOR, NAND Flashes and CPLD on board */ | ||
36 | ranges = <0x0 0x0 0x0 0xee000000 0x02000000 | ||
37 | 0x1 0x0 0x0 0xffa00000 0x00010000 | ||
38 | 0x3 0x0 0x0 0xffb00000 0x00020000>; | ||
39 | |||
40 | flash@0,0 { | ||
41 | #address-cells = <1>; | ||
42 | #size-cells = <1>; | ||
43 | compatible = "cfi-flash"; | ||
44 | reg = <0x0 0x0 0x2000000>; | ||
45 | bank-width = <2>; | ||
46 | device-width = <1>; | ||
47 | |||
48 | partition@0 { | ||
49 | /* 32MB for user data */ | ||
50 | reg = <0x0 0x02000000>; | ||
51 | label = "NOR Data"; | ||
52 | }; | ||
53 | }; | ||
54 | |||
55 | flash@1,0 { | ||
56 | #address-cells = <1>; | ||
57 | #size-cells = <1>; | ||
58 | compatible = "fsl,ifc-nand"; | ||
59 | reg = <0x1 0x0 0x10000>; | ||
60 | |||
61 | partition@0 { | ||
62 | /* This location must not be altered */ | ||
63 | /* 1MB for u-boot Bootloader Image */ | ||
64 | reg = <0x0 0x00100000>; | ||
65 | label = "NAND U-Boot Image"; | ||
66 | read-only; | ||
67 | }; | ||
68 | }; | ||
69 | |||
70 | cpld@3,0 { | ||
71 | #address-cells = <1>; | ||
72 | #size-cells = <1>; | ||
73 | compatible = "fsl,p1010rdb-cpld"; | ||
74 | reg = <0x3 0x0 0x000001f>; | ||
75 | }; | ||
76 | }; | ||