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authorAurelien Jarno <aurelien@aurel32.net>2008-10-14 05:44:26 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-15 07:46:50 -0400
commitb06f3e19a673e44ff56ce265600c5c6eb99aa914 (patch)
tree50ae6bf47907f1f2e71f849e0638281a2d86f80d
parentd412283cef135811e1ed6c3840376c239f4920dd (diff)
MIPS: BCM47xx: Use the new SSB GPIO API
This patch simplifies the BCM47xx GPIO code by using the new SSB GPIO API, which does a lot things that were implemented directly in the BCM47xx code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/bcm47xx/gpio.c85
-rw-r--r--arch/mips/bcm47xx/setup.c5
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h41
4 files changed, 58 insertions, 74 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cd5fbf6f0784..b905744d7915 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -52,6 +52,7 @@ config BCM47XX
52 select SSB 52 select SSB
53 select SSB_DRIVER_MIPS 53 select SSB_DRIVER_MIPS
54 select SSB_DRIVER_EXTIF 54 select SSB_DRIVER_EXTIF
55 select SSB_EMBEDDED
55 select SSB_PCICORE_HOSTMODE if PCI 56 select SSB_PCICORE_HOSTMODE if PCI
56 select GENERIC_GPIO 57 select GENERIC_GPIO
57 select SYS_HAS_EARLY_PRINTK 58 select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index f5a53acf995a..9b798800258c 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -12,68 +12,51 @@
12#include <asm/mach-bcm47xx/bcm47xx.h> 12#include <asm/mach-bcm47xx/bcm47xx.h>
13#include <asm/mach-bcm47xx/gpio.h> 13#include <asm/mach-bcm47xx/gpio.h>
14 14
15int bcm47xx_gpio_to_irq(unsigned gpio) 15#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES)
16static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES);
17#else
18static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
19#endif
20
21int gpio_request(unsigned gpio, const char *tag)
16{ 22{
17 if (ssb_bcm47xx.chipco.dev) 23 if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
18 return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2; 24 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
19 else if (ssb_bcm47xx.extif.dev)
20 return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
21 else
22 return -EINVAL; 25 return -EINVAL;
23}
24EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq);
25 26
26int bcm47xx_gpio_get_value(unsigned gpio) 27 if (ssb_extif_available(&ssb_bcm47xx.extif) &&
27{ 28 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
28 if (ssb_bcm47xx.chipco.dev) 29 return -EINVAL;
29 return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio);
30 else if (ssb_bcm47xx.extif.dev)
31 return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio);
32 else
33 return 0;
34}
35EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value);
36 30
37void bcm47xx_gpio_set_value(unsigned gpio, int value) 31 if (test_and_set_bit(gpio, gpio_in_use))
38{ 32 return -EBUSY;
39 if (ssb_bcm47xx.chipco.dev)
40 ssb_chipco_gpio_out(&ssb_bcm47xx.chipco,
41 1 << gpio,
42 value ? 1 << gpio : 0);
43 else if (ssb_bcm47xx.extif.dev)
44 ssb_extif_gpio_out(&ssb_bcm47xx.extif,
45 1 << gpio,
46 value ? 1 << gpio : 0);
47}
48EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value);
49 33
50int bcm47xx_gpio_direction_input(unsigned gpio)
51{
52 if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
53 ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
54 1 << gpio, 0);
55 else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
56 ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
57 1 << gpio, 0);
58 else
59 return -EINVAL;
60 return 0; 34 return 0;
61} 35}
62EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input); 36EXPORT_SYMBOL(gpio_request);
63 37
64int bcm47xx_gpio_direction_output(unsigned gpio, int value) 38void gpio_free(unsigned gpio)
65{ 39{
66 bcm47xx_gpio_set_value(gpio, value); 40 if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
41 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
42 return;
43
44 if (ssb_extif_available(&ssb_bcm47xx.extif) &&
45 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
46 return;
47
48 clear_bit(gpio, gpio_in_use);
49}
50EXPORT_SYMBOL(gpio_free);
67 51
68 if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES)) 52int gpio_to_irq(unsigned gpio)
69 ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco, 53{
70 1 << gpio, 1 << gpio); 54 if (ssb_chipco_available(&ssb_bcm47xx.chipco))
71 else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES)) 55 return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
72 ssb_extif_gpio_outen(&ssb_bcm47xx.extif, 56 else if (ssb_extif_available(&ssb_bcm47xx.extif))
73 1 << gpio, 1 << gpio); 57 return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
74 else 58 else
75 return -EINVAL; 59 return -EINVAL;
76 return 0;
77} 60}
78EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output); 61EXPORT_SYMBOL_GPL(gpio_to_irq);
79 62
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 8d36f186890e..2f580fa160c9 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -27,6 +27,7 @@
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/ssb/ssb.h> 29#include <linux/ssb/ssb.h>
30#include <linux/ssb/ssb_embedded.h>
30#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
31#include <asm/reboot.h> 32#include <asm/reboot.h>
32#include <asm/time.h> 33#include <asm/time.h>
@@ -41,7 +42,7 @@ static void bcm47xx_machine_restart(char *command)
41 printk(KERN_ALERT "Please stand by while rebooting the system...\n"); 42 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
42 local_irq_disable(); 43 local_irq_disable();
43 /* Set the watchdog timer to reset immediately */ 44 /* Set the watchdog timer to reset immediately */
44 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1); 45 ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
45 while (1) 46 while (1)
46 cpu_relax(); 47 cpu_relax();
47} 48}
@@ -50,7 +51,7 @@ static void bcm47xx_machine_halt(void)
50{ 51{
51 /* Disable interrupts and watchdog and spin forever */ 52 /* Disable interrupts and watchdog and spin forever */
52 local_irq_disable(); 53 local_irq_disable();
53 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0); 54 ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
54 while (1) 55 while (1)
55 cpu_relax(); 56 cpu_relax();
56} 57}
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index cfc8f4d618ce..d8ff4cd89ab5 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -9,47 +9,46 @@
9#ifndef __BCM47XX_GPIO_H 9#ifndef __BCM47XX_GPIO_H
10#define __BCM47XX_GPIO_H 10#define __BCM47XX_GPIO_H
11 11
12#include <linux/ssb/ssb_embedded.h>
13#include <asm/mach-bcm47xx/bcm47xx.h>
14
12#define BCM47XX_EXTIF_GPIO_LINES 5 15#define BCM47XX_EXTIF_GPIO_LINES 5
13#define BCM47XX_CHIPCO_GPIO_LINES 16 16#define BCM47XX_CHIPCO_GPIO_LINES 16
14 17
15extern int bcm47xx_gpio_to_irq(unsigned gpio); 18extern int gpio_request(unsigned gpio, const char *label);
16extern int bcm47xx_gpio_get_value(unsigned gpio); 19extern void gpio_free(unsigned gpio);
17extern void bcm47xx_gpio_set_value(unsigned gpio, int value); 20extern int gpio_to_irq(unsigned gpio);
18extern int bcm47xx_gpio_direction_input(unsigned gpio);
19extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
20
21static inline int gpio_request(unsigned gpio, const char *label)
22{
23 return 0;
24}
25 21
26static inline void gpio_free(unsigned gpio) 22static inline int gpio_get_value(unsigned gpio)
27{ 23{
24 return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
28} 25}
29 26
30static inline int gpio_to_irq(unsigned gpio) 27static inline void gpio_set_value(unsigned gpio, int value)
31{ 28{
32 return bcm47xx_gpio_to_irq(gpio); 29 ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
33} 30}
34 31
35static inline int gpio_get_value(unsigned gpio) 32static inline int gpio_direction_input(unsigned gpio)
36{ 33{
37 return bcm47xx_gpio_get_value(gpio); 34 return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
38} 35}
39 36
40static inline void gpio_set_value(unsigned gpio, int value) 37static inline int gpio_direction_output(unsigned gpio, int value)
41{ 38{
42 bcm47xx_gpio_set_value(gpio, value); 39 return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
43} 40}
44 41
45static inline int gpio_direction_input(unsigned gpio) 42static int gpio_intmask(unsigned gpio, int value)
46{ 43{
47 return bcm47xx_gpio_direction_input(gpio); 44 return ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
45 value ? 1 << gpio : 0);
48} 46}
49 47
50static inline int gpio_direction_output(unsigned gpio, int value) 48static int gpio_polarity(unsigned gpio, int value)
51{ 49{
52 return bcm47xx_gpio_direction_output(gpio, value); 50 return ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
51 value ? 1 << gpio : 0);
53} 52}
54 53
55 54