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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-05 19:23:02 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-05 19:23:02 -0400
commita8c725045eb2eaa6c28a5493cb193f47a5c4afe4 (patch)
treec391726aa0daa077ef3675ab375c253814ae6f9b
parent2f9c3c2c24af5f2e6061756d6fc04fdf66f41106 (diff)
parente853534e6b94f87e48f29e1701c3f6f8a63669c5 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-serial
* master.kernel.org:/home/rmk/linux-2.6-serial: [SERIAL] typo: buad -> baud
-rw-r--r--arch/mips/ddb5xxx/ddb5476/dbg_io.c2
-rw-r--r--arch/mips/ddb5xxx/ddb5477/kgdb_io.c2
-rw-r--r--arch/mips/gt64120/ev64120/serialGT.c2
-rw-r--r--arch/mips/gt64120/momenco_ocelot/dbg_io.c2
-rw-r--r--arch/mips/ite-boards/generic/dbg_io.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/dbg_io.c2
-rw-r--r--arch/mips/momentum/ocelot_c/dbg_io.c2
-rw-r--r--arch/mips/momentum/ocelot_g/dbg_io.c2
-rw-r--r--include/asm-arm/arch-l7200/serial_l7200.h2
-rw-r--r--include/asm-arm/arch-l7200/uncompress.h2
10 files changed, 10 insertions, 10 deletions
diff --git a/arch/mips/ddb5xxx/ddb5476/dbg_io.c b/arch/mips/ddb5xxx/ddb5476/dbg_io.c
index 85e9e5013679..f2296a999953 100644
--- a/arch/mips/ddb5xxx/ddb5476/dbg_io.c
+++ b/arch/mips/ddb5xxx/ddb5476/dbg_io.c
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
86 /* disable interrupts */ 86 /* disable interrupts */
87 UART16550_WRITE(OFS_INTR_ENABLE, 0); 87 UART16550_WRITE(OFS_INTR_ENABLE, 0);
88 88
89 /* set up buad rate */ 89 /* set up baud rate */
90 { 90 {
91 uint32 divisor; 91 uint32 divisor;
92 92
diff --git a/arch/mips/ddb5xxx/ddb5477/kgdb_io.c b/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
index 1d18d590495b..385bbdb10170 100644
--- a/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
+++ b/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
86 /* disable interrupts */ 86 /* disable interrupts */
87 UART16550_WRITE(OFS_INTR_ENABLE, 0); 87 UART16550_WRITE(OFS_INTR_ENABLE, 0);
88 88
89 /* set up buad rate */ 89 /* set up baud rate */
90 { 90 {
91 uint32 divisor; 91 uint32 divisor;
92 92
diff --git a/arch/mips/gt64120/ev64120/serialGT.c b/arch/mips/gt64120/ev64120/serialGT.c
index 16e34a546e54..8f0d835491ff 100644
--- a/arch/mips/gt64120/ev64120/serialGT.c
+++ b/arch/mips/gt64120/ev64120/serialGT.c
@@ -149,7 +149,7 @@ void serial_set(int channel, unsigned long baud)
149#else 149#else
150 /* 150 /*
151 * Note: Set baud rate, hardcoded here for rate of 115200 151 * Note: Set baud rate, hardcoded here for rate of 115200
152 * since became unsure of above "buad rate" algorithm (??). 152 * since became unsure of above "baud rate" algorithm (??).
153 */ 153 */
154 outreg(channel, LCR, 0x83); 154 outreg(channel, LCR, 0x83);
155 outreg(channel, DLM, 0x00); // See note above 155 outreg(channel, DLM, 0x00); // See note above
diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
index 8720bccfdea2..f0a6a38fcf4d 100644
--- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c
+++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
73 /* disable interrupts */ 73 /* disable interrupts */
74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 74 UART16550_WRITE(OFS_INTR_ENABLE, 0);
75 75
76 /* set up buad rate */ 76 /* set up baud rate */
77 { 77 {
78 uint32 divisor; 78 uint32 divisor;
79 79
diff --git a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c
index c4f8530fd07e..6a7ccaf93502 100644
--- a/arch/mips/ite-boards/generic/dbg_io.c
+++ b/arch/mips/ite-boards/generic/dbg_io.c
@@ -72,7 +72,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
72 /* disable interrupts */ 72 /* disable interrupts */
73 UART16550_WRITE(OFS_INTR_ENABLE, 0); 73 UART16550_WRITE(OFS_INTR_ENABLE, 0);
74 74
75 /* set up buad rate */ 75 /* set up baud rate */
76 { 76 {
77 uint32 divisor; 77 uint32 divisor;
78 78
diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c
index 542eac82b63c..d7dea0a136aa 100644
--- a/arch/mips/momentum/jaguar_atx/dbg_io.c
+++ b/arch/mips/momentum/jaguar_atx/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
73 /* disable interrupts */ 73 /* disable interrupts */
74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 74 UART16550_WRITE(OFS_INTR_ENABLE, 0);
75 75
76 /* set up buad rate */ 76 /* set up baud rate */
77 { 77 {
78 uint32 divisor; 78 uint32 divisor;
79 79
diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c
index 8720bccfdea2..f0a6a38fcf4d 100644
--- a/arch/mips/momentum/ocelot_c/dbg_io.c
+++ b/arch/mips/momentum/ocelot_c/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
73 /* disable interrupts */ 73 /* disable interrupts */
74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 74 UART16550_WRITE(OFS_INTR_ENABLE, 0);
75 75
76 /* set up buad rate */ 76 /* set up baud rate */
77 { 77 {
78 uint32 divisor; 78 uint32 divisor;
79 79
diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c
index 8720bccfdea2..f0a6a38fcf4d 100644
--- a/arch/mips/momentum/ocelot_g/dbg_io.c
+++ b/arch/mips/momentum/ocelot_g/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
73 /* disable interrupts */ 73 /* disable interrupts */
74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 74 UART16550_WRITE(OFS_INTR_ENABLE, 0);
75 75
76 /* set up buad rate */ 76 /* set up baud rate */
77 { 77 {
78 uint32 divisor; 78 uint32 divisor;
79 79
diff --git a/include/asm-arm/arch-l7200/serial_l7200.h b/include/asm-arm/arch-l7200/serial_l7200.h
index 238c595d97ea..b1008a9d23e5 100644
--- a/include/asm-arm/arch-l7200/serial_l7200.h
+++ b/include/asm-arm/arch-l7200/serial_l7200.h
@@ -28,7 +28,7 @@
28#define UARTDR 0x00 /* Tx/Rx data */ 28#define UARTDR 0x00 /* Tx/Rx data */
29#define RXSTAT 0x04 /* Rx status */ 29#define RXSTAT 0x04 /* Rx status */
30#define H_UBRLCR 0x08 /* mode register high */ 30#define H_UBRLCR 0x08 /* mode register high */
31#define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/ 31#define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/
32#define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ 32#define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/
33#define UARTCON 0x14 /* control register */ 33#define UARTCON 0x14 /* control register */
34#define UARTFLG 0x18 /* flag register */ 34#define UARTFLG 0x18 /* flag register */
diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h
index 9fcd40aee3e3..04be2a088639 100644
--- a/include/asm-arm/arch-l7200/uncompress.h
+++ b/include/asm-arm/arch-l7200/uncompress.h
@@ -6,7 +6,7 @@
6 * Changelog: 6 * Changelog:
7 * 05-01-2000 SJH Created 7 * 05-01-2000 SJH Created
8 * 05-13-2000 SJH Filled in function bodies 8 * 05-13-2000 SJH Filled in function bodies
9 * 07-26-2000 SJH Removed hard coded buad rate 9 * 07-26-2000 SJH Removed hard coded baud rate
10 */ 10 */
11 11
12#include <asm/hardware.h> 12#include <asm/hardware.h>