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authorIvo van Doorn <ivdoorn@gmail.com>2008-04-21 13:00:17 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-05-01 17:38:38 -0400
commit44a9809b97ec5acd1c549c3120bdd35613897d7c (patch)
treef2ac4a79828f06ccbff0a733c9886e32e3bed654
parent2218228392080f0ca2fc2974604e79f57b12c436 (diff)
rt2x00: Don't enable short preamble for 1MBs
The timing settings for 1MBs should exclude the short preamble bit since that only applies to 2MBs, 5.5MBs and 11MBs. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index b41187af1306..18e599e24020 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -363,7 +363,7 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
363 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 363 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
364 364
365 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg); 365 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg);
366 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00 | preamble_mask); 366 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00);
367 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04); 367 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04);
368 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10)); 368 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10));
369 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg); 369 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 5ade097ed45e..c54ea5afd51a 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -370,7 +370,7 @@ static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev,
370 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 370 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
371 371
372 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg); 372 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg);
373 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00 | preamble_mask); 373 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00);
374 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04); 374 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04);
375 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10)); 375 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10));
376 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg); 376 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);