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authorZhenyu Wang <zhenyuw@linux.intel.com>2009-11-10 12:25:25 -0500
committerEric Anholt <eric@anholt.net>2010-02-26 16:23:19 -0500
commit14bc490bbdf1b194ad1f5f3d2a0a27edfdf78986 (patch)
treeec3aa6b118d7f9750bdb12e45af122748978a6d6
parent21099537dbacc5c8999d833e6bfd1b72edd89189 (diff)
drm/i915, agp/intel: Fix stolen memory size on Sandybridge
New memory control config reg at 0x50 should be used for stolen memory size detection on Sandybridge. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat
-rw-r--r--drivers/char/agp/intel-agp.c78
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c156
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h19
3 files changed, 200 insertions, 53 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index c3c870bf5678..9a551bc34c39 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -150,6 +150,25 @@ extern int agp_memory_reserved;
150#define INTEL_I7505_AGPCTRL 0x70 150#define INTEL_I7505_AGPCTRL 0x70
151#define INTEL_I7505_MCHCFG 0x50 151#define INTEL_I7505_MCHCFG 0x50
152 152
153#define SNB_GMCH_CTRL 0x50
154#define SNB_GMCH_GMS_STOLEN_MASK 0xF8
155#define SNB_GMCH_GMS_STOLEN_32M (1 << 3)
156#define SNB_GMCH_GMS_STOLEN_64M (2 << 3)
157#define SNB_GMCH_GMS_STOLEN_96M (3 << 3)
158#define SNB_GMCH_GMS_STOLEN_128M (4 << 3)
159#define SNB_GMCH_GMS_STOLEN_160M (5 << 3)
160#define SNB_GMCH_GMS_STOLEN_192M (6 << 3)
161#define SNB_GMCH_GMS_STOLEN_224M (7 << 3)
162#define SNB_GMCH_GMS_STOLEN_256M (8 << 3)
163#define SNB_GMCH_GMS_STOLEN_288M (9 << 3)
164#define SNB_GMCH_GMS_STOLEN_320M (0xa << 3)
165#define SNB_GMCH_GMS_STOLEN_352M (0xb << 3)
166#define SNB_GMCH_GMS_STOLEN_384M (0xc << 3)
167#define SNB_GMCH_GMS_STOLEN_416M (0xd << 3)
168#define SNB_GMCH_GMS_STOLEN_448M (0xe << 3)
169#define SNB_GMCH_GMS_STOLEN_480M (0xf << 3)
170#define SNB_GMCH_GMS_STOLEN_512M (0x10 << 3)
171
153static const struct aper_size_info_fixed intel_i810_sizes[] = 172static const struct aper_size_info_fixed intel_i810_sizes[] =
154{ 173{
155 {64, 16384, 4}, 174 {64, 16384, 4},
@@ -621,7 +640,7 @@ static struct aper_size_info_fixed intel_i830_sizes[] =
621static void intel_i830_init_gtt_entries(void) 640static void intel_i830_init_gtt_entries(void)
622{ 641{
623 u16 gmch_ctrl; 642 u16 gmch_ctrl;
624 int gtt_entries; 643 int gtt_entries = 0;
625 u8 rdct; 644 u8 rdct;
626 int local = 0; 645 int local = 0;
627 static const int ddt[4] = { 0, 16, 32, 64 }; 646 static const int ddt[4] = { 0, 16, 32, 64 };
@@ -715,10 +734,61 @@ static void intel_i830_init_gtt_entries(void)
715 } 734 }
716 } else if (agp_bridge->dev->device == 735 } else if (agp_bridge->dev->device ==
717 PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB) { 736 PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB) {
718 /* XXX: This is what my A1 silicon has. What's the right 737 /*
719 * answer? 738 * SandyBridge has new memory control reg at 0x50.w
720 */ 739 */
721 gtt_entries = MB(64) - KB(size); 740 u16 snb_gmch_ctl;
741 pci_read_config_word(intel_private.pcidev, SNB_GMCH_CTRL, &snb_gmch_ctl);
742 switch (snb_gmch_ctl & SNB_GMCH_GMS_STOLEN_MASK) {
743 case SNB_GMCH_GMS_STOLEN_32M:
744 gtt_entries = MB(32) - KB(size);
745 break;
746 case SNB_GMCH_GMS_STOLEN_64M:
747 gtt_entries = MB(64) - KB(size);
748 break;
749 case SNB_GMCH_GMS_STOLEN_96M:
750 gtt_entries = MB(96) - KB(size);
751 break;
752 case SNB_GMCH_GMS_STOLEN_128M:
753 gtt_entries = MB(128) - KB(size);
754 break;
755 case SNB_GMCH_GMS_STOLEN_160M:
756 gtt_entries = MB(160) - KB(size);
757 break;
758 case SNB_GMCH_GMS_STOLEN_192M:
759 gtt_entries = MB(192) - KB(size);
760 break;
761 case SNB_GMCH_GMS_STOLEN_224M:
762 gtt_entries = MB(224) - KB(size);
763 break;
764 case SNB_GMCH_GMS_STOLEN_256M:
765 gtt_entries = MB(256) - KB(size);
766 break;
767 case SNB_GMCH_GMS_STOLEN_288M:
768 gtt_entries = MB(288) - KB(size);
769 break;
770 case SNB_GMCH_GMS_STOLEN_320M:
771 gtt_entries = MB(320) - KB(size);
772 break;
773 case SNB_GMCH_GMS_STOLEN_352M:
774 gtt_entries = MB(352) - KB(size);
775 break;
776 case SNB_GMCH_GMS_STOLEN_384M:
777 gtt_entries = MB(384) - KB(size);
778 break;
779 case SNB_GMCH_GMS_STOLEN_416M:
780 gtt_entries = MB(416) - KB(size);
781 break;
782 case SNB_GMCH_GMS_STOLEN_448M:
783 gtt_entries = MB(448) - KB(size);
784 break;
785 case SNB_GMCH_GMS_STOLEN_480M:
786 gtt_entries = MB(480) - KB(size);
787 break;
788 case SNB_GMCH_GMS_STOLEN_512M:
789 gtt_entries = MB(512) - KB(size);
790 break;
791 }
722 } else { 792 } else {
723 switch (gmch_ctrl & I855_GMCH_GMS_MASK) { 793 switch (gmch_ctrl & I855_GMCH_GMS_MASK) {
724 case I855_GMCH_GMS_STOLEN_1M: 794 case I855_GMCH_GMS_STOLEN_1M:
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 281faca3e37c..3e658d6a6b7d 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1099,60 +1099,118 @@ static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
1099 else 1099 else
1100 overhead = (*aperture_size / 1024) + 4096; 1100 overhead = (*aperture_size / 1024) + 4096;
1101 1101
1102 switch (tmp & INTEL_GMCH_GMS_MASK) { 1102 if (IS_GEN6(dev)) {
1103 case INTEL_855_GMCH_GMS_DISABLED: 1103 /* SNB has memory control reg at 0x50.w */
1104 /* XXX: This is what my A1 silicon has. */ 1104 pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &tmp);
1105 if (IS_GEN6(dev)) { 1105
1106 switch (tmp & SNB_GMCH_GMS_STOLEN_MASK) {
1107 case INTEL_855_GMCH_GMS_DISABLED:
1108 DRM_ERROR("video memory is disabled\n");
1109 return -1;
1110 case SNB_GMCH_GMS_STOLEN_32M:
1111 stolen = 32 * 1024 * 1024;
1112 break;
1113 case SNB_GMCH_GMS_STOLEN_64M:
1106 stolen = 64 * 1024 * 1024; 1114 stolen = 64 * 1024 * 1024;
1107 } else { 1115 break;
1116 case SNB_GMCH_GMS_STOLEN_96M:
1117 stolen = 96 * 1024 * 1024;
1118 break;
1119 case SNB_GMCH_GMS_STOLEN_128M:
1120 stolen = 128 * 1024 * 1024;
1121 break;
1122 case SNB_GMCH_GMS_STOLEN_160M:
1123 stolen = 160 * 1024 * 1024;
1124 break;
1125 case SNB_GMCH_GMS_STOLEN_192M:
1126 stolen = 192 * 1024 * 1024;
1127 break;
1128 case SNB_GMCH_GMS_STOLEN_224M:
1129 stolen = 224 * 1024 * 1024;
1130 break;
1131 case SNB_GMCH_GMS_STOLEN_256M:
1132 stolen = 256 * 1024 * 1024;
1133 break;
1134 case SNB_GMCH_GMS_STOLEN_288M:
1135 stolen = 288 * 1024 * 1024;
1136 break;
1137 case SNB_GMCH_GMS_STOLEN_320M:
1138 stolen = 320 * 1024 * 1024;
1139 break;
1140 case SNB_GMCH_GMS_STOLEN_352M:
1141 stolen = 352 * 1024 * 1024;
1142 break;
1143 case SNB_GMCH_GMS_STOLEN_384M:
1144 stolen = 384 * 1024 * 1024;
1145 break;
1146 case SNB_GMCH_GMS_STOLEN_416M:
1147 stolen = 416 * 1024 * 1024;
1148 break;
1149 case SNB_GMCH_GMS_STOLEN_448M:
1150 stolen = 448 * 1024 * 1024;
1151 break;
1152 case SNB_GMCH_GMS_STOLEN_480M:
1153 stolen = 480 * 1024 * 1024;
1154 break;
1155 case SNB_GMCH_GMS_STOLEN_512M:
1156 stolen = 512 * 1024 * 1024;
1157 break;
1158 default:
1159 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
1160 tmp & SNB_GMCH_GMS_STOLEN_MASK);
1161 return -1;
1162 }
1163 } else {
1164 switch (tmp & INTEL_GMCH_GMS_MASK) {
1165 case INTEL_855_GMCH_GMS_DISABLED:
1108 DRM_ERROR("video memory is disabled\n"); 1166 DRM_ERROR("video memory is disabled\n");
1109 return -1; 1167 return -1;
1168 case INTEL_855_GMCH_GMS_STOLEN_1M:
1169 stolen = 1 * 1024 * 1024;
1170 break;
1171 case INTEL_855_GMCH_GMS_STOLEN_4M:
1172 stolen = 4 * 1024 * 1024;
1173 break;
1174 case INTEL_855_GMCH_GMS_STOLEN_8M:
1175 stolen = 8 * 1024 * 1024;
1176 break;
1177 case INTEL_855_GMCH_GMS_STOLEN_16M:
1178 stolen = 16 * 1024 * 1024;
1179 break;
1180 case INTEL_855_GMCH_GMS_STOLEN_32M:
1181 stolen = 32 * 1024 * 1024;
1182 break;
1183 case INTEL_915G_GMCH_GMS_STOLEN_48M:
1184 stolen = 48 * 1024 * 1024;
1185 break;
1186 case INTEL_915G_GMCH_GMS_STOLEN_64M:
1187 stolen = 64 * 1024 * 1024;
1188 break;
1189 case INTEL_GMCH_GMS_STOLEN_128M:
1190 stolen = 128 * 1024 * 1024;
1191 break;
1192 case INTEL_GMCH_GMS_STOLEN_256M:
1193 stolen = 256 * 1024 * 1024;
1194 break;
1195 case INTEL_GMCH_GMS_STOLEN_96M:
1196 stolen = 96 * 1024 * 1024;
1197 break;
1198 case INTEL_GMCH_GMS_STOLEN_160M:
1199 stolen = 160 * 1024 * 1024;
1200 break;
1201 case INTEL_GMCH_GMS_STOLEN_224M:
1202 stolen = 224 * 1024 * 1024;
1203 break;
1204 case INTEL_GMCH_GMS_STOLEN_352M:
1205 stolen = 352 * 1024 * 1024;
1206 break;
1207 default:
1208 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
1209 tmp & INTEL_GMCH_GMS_MASK);
1210 return -1;
1110 } 1211 }
1111 break;
1112 case INTEL_855_GMCH_GMS_STOLEN_1M:
1113 stolen = 1 * 1024 * 1024;
1114 break;
1115 case INTEL_855_GMCH_GMS_STOLEN_4M:
1116 stolen = 4 * 1024 * 1024;
1117 break;
1118 case INTEL_855_GMCH_GMS_STOLEN_8M:
1119 stolen = 8 * 1024 * 1024;
1120 break;
1121 case INTEL_855_GMCH_GMS_STOLEN_16M:
1122 stolen = 16 * 1024 * 1024;
1123 break;
1124 case INTEL_855_GMCH_GMS_STOLEN_32M:
1125 stolen = 32 * 1024 * 1024;
1126 break;
1127 case INTEL_915G_GMCH_GMS_STOLEN_48M:
1128 stolen = 48 * 1024 * 1024;
1129 break;
1130 case INTEL_915G_GMCH_GMS_STOLEN_64M:
1131 stolen = 64 * 1024 * 1024;
1132 break;
1133 case INTEL_GMCH_GMS_STOLEN_128M:
1134 stolen = 128 * 1024 * 1024;
1135 break;
1136 case INTEL_GMCH_GMS_STOLEN_256M:
1137 stolen = 256 * 1024 * 1024;
1138 break;
1139 case INTEL_GMCH_GMS_STOLEN_96M:
1140 stolen = 96 * 1024 * 1024;
1141 break;
1142 case INTEL_GMCH_GMS_STOLEN_160M:
1143 stolen = 160 * 1024 * 1024;
1144 break;
1145 case INTEL_GMCH_GMS_STOLEN_224M:
1146 stolen = 224 * 1024 * 1024;
1147 break;
1148 case INTEL_GMCH_GMS_STOLEN_352M:
1149 stolen = 352 * 1024 * 1024;
1150 break;
1151 default:
1152 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
1153 tmp & INTEL_GMCH_GMS_MASK);
1154 return -1;
1155 } 1212 }
1213
1156 *preallocated_size = stolen - overhead; 1214 *preallocated_size = stolen - overhead;
1157 *start = overhead; 1215 *start = overhead;
1158 1216
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2a312b674a72..3d59862c7ccd 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -53,6 +53,25 @@
53#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) 53#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
54#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) 54#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
55 55
56#define SNB_GMCH_CTRL 0x50
57#define SNB_GMCH_GMS_STOLEN_MASK 0xF8
58#define SNB_GMCH_GMS_STOLEN_32M (1 << 3)
59#define SNB_GMCH_GMS_STOLEN_64M (2 << 3)
60#define SNB_GMCH_GMS_STOLEN_96M (3 << 3)
61#define SNB_GMCH_GMS_STOLEN_128M (4 << 3)
62#define SNB_GMCH_GMS_STOLEN_160M (5 << 3)
63#define SNB_GMCH_GMS_STOLEN_192M (6 << 3)
64#define SNB_GMCH_GMS_STOLEN_224M (7 << 3)
65#define SNB_GMCH_GMS_STOLEN_256M (8 << 3)
66#define SNB_GMCH_GMS_STOLEN_288M (9 << 3)
67#define SNB_GMCH_GMS_STOLEN_320M (0xa << 3)
68#define SNB_GMCH_GMS_STOLEN_352M (0xb << 3)
69#define SNB_GMCH_GMS_STOLEN_384M (0xc << 3)
70#define SNB_GMCH_GMS_STOLEN_416M (0xd << 3)
71#define SNB_GMCH_GMS_STOLEN_448M (0xe << 3)
72#define SNB_GMCH_GMS_STOLEN_480M (0xf << 3)
73#define SNB_GMCH_GMS_STOLEN_512M (0x10 << 3)
74
56/* PCI config space */ 75/* PCI config space */
57 76
58#define HPLLCC 0xc0 /* 855 only */ 77#define HPLLCC 0xc0 /* 855 only */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 02:46:40 -0500