diff options
author | Florian Fainelli <florian.fainelli@telecomint.eu> | 2008-01-30 07:33:36 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:33:36 -0500 |
commit | ff472a114ca11f5354912745fbb94bb66ec10916 (patch) | |
tree | fc3c539709c75ea0630987845dcb2ec811becbcb | |
parent | 5e3a77e9a9b7bfc1f69f51fe6d34aa649887980c (diff) |
x86: add the RDC machine specific reboot fixup
The RDC R-321x SoC needs a reboot fixup which
uses its internal hardware watchdog set to
reset the CPU on next tick.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/x86/kernel/reboot_fixups_32.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c index f452726c0fe2..dec0b5ec25c2 100644 --- a/arch/x86/kernel/reboot_fixups_32.c +++ b/arch/x86/kernel/reboot_fixups_32.c | |||
@@ -30,6 +30,19 @@ static void cs5536_warm_reset(struct pci_dev *dev) | |||
30 | udelay(50); /* shouldn't get here but be safe and spin a while */ | 30 | udelay(50); /* shouldn't get here but be safe and spin a while */ |
31 | } | 31 | } |
32 | 32 | ||
33 | static void rdc321x_reset(struct pci_dev *dev) | ||
34 | { | ||
35 | unsigned i; | ||
36 | /* Voluntary reset the watchdog timer */ | ||
37 | outl(0x80003840, 0xCF8); | ||
38 | /* Generate a CPU reset on next tick */ | ||
39 | i = inl(0xCFC); | ||
40 | /* Use the minimum timer resolution */ | ||
41 | i |= 0x1600; | ||
42 | outl(i, 0xCFC); | ||
43 | outb(1, 0x92); | ||
44 | } | ||
45 | |||
33 | struct device_fixup { | 46 | struct device_fixup { |
34 | unsigned int vendor; | 47 | unsigned int vendor; |
35 | unsigned int device; | 48 | unsigned int device; |
@@ -40,6 +53,7 @@ static struct device_fixup fixups_table[] = { | |||
40 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset }, | 53 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset }, |
41 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset }, | 54 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset }, |
42 | { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE, cs5530a_warm_reset }, | 55 | { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE, cs5530a_warm_reset }, |
56 | { PCI_VENDOR_ID_RDC, PCI_DEVICE_ID_RDC_R6030, rdc321x_reset }, | ||
43 | }; | 57 | }; |
44 | 58 | ||
45 | /* | 59 | /* |