aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSenthil Balasubramanian <senthilkumar@atheros.com>2009-09-18 05:37:03 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-07 16:39:40 -0400
commit63a75b912b00fbafeb54849ca3bcd0295ad68609 (patch)
tree6d7f0006efea33e4a87e58a4bdb7a45339b78392
parent1d50a69b18818b276333590d1f2c9382d292d84d (diff)
ath9k: Reduce PLL Settle time and eliminate redundant PLL calls.
Reduce PLL Settle time and eliminate redundant PLL calls. Also reduce the LoadNF timeout from 10 msec to 250usec as the 10 msec timeout was hit with AR9285 in some cases. Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c15
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h2
3 files changed, 14 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 9c46b54d2a98..d347ea79e778 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -653,11 +653,11 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
653 AR_PHY_AGC_CONTROL_NO_UPDATE_NF); 653 AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
654 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); 654 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
655 655
656 for (j = 0; j < 1000; j++) { 656 for (j = 0; j < 5; j++) {
657 if ((REG_READ(ah, AR_PHY_AGC_CONTROL) & 657 if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
658 AR_PHY_AGC_CONTROL_NF) == 0) 658 AR_PHY_AGC_CONTROL_NF) == 0)
659 break; 659 break;
660 udelay(10); 660 udelay(50);
661 } 661 }
662 662
663 for (i = 0; i < NUM_NF_READINGS; i++) { 663 for (i = 0; i < NUM_NF_READINGS; i++) {
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index eb408831f3cf..b53faa09bdb5 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1691,8 +1691,6 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
1691 if (!AR_SREV_9100(ah)) 1691 if (!AR_SREV_9100(ah))
1692 REG_WRITE(ah, AR_RC, 0); 1692 REG_WRITE(ah, AR_RC, 0);
1693 1693
1694 ath9k_hw_init_pll(ah, NULL);
1695
1696 if (AR_SREV_9100(ah)) 1694 if (AR_SREV_9100(ah))
1697 udelay(50); 1695 udelay(50);
1698 1696
@@ -2885,6 +2883,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
2885 ATH9K_RESET_POWER_ON) != true) { 2883 ATH9K_RESET_POWER_ON) != true) {
2886 return false; 2884 return false;
2887 } 2885 }
2886 ath9k_hw_init_pll(ah, NULL);
2888 } 2887 }
2889 if (AR_SREV_9100(ah)) 2888 if (AR_SREV_9100(ah))
2890 REG_SET_BIT(ah, AR_RTC_RESET, 2889 REG_SET_BIT(ah, AR_RTC_RESET,
@@ -3968,7 +3967,11 @@ void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
3968 3967
3969bool ath9k_hw_phy_disable(struct ath_hw *ah) 3968bool ath9k_hw_phy_disable(struct ath_hw *ah)
3970{ 3969{
3971 return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM); 3970 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM))
3971 return false;
3972
3973 ath9k_hw_init_pll(ah, NULL);
3974 return true;
3972} 3975}
3973 3976
3974bool ath9k_hw_disable(struct ath_hw *ah) 3977bool ath9k_hw_disable(struct ath_hw *ah)
@@ -3976,7 +3979,11 @@ bool ath9k_hw_disable(struct ath_hw *ah)
3976 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) 3979 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
3977 return false; 3980 return false;
3978 3981
3979 return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); 3982 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD))
3983 return false;
3984
3985 ath9k_hw_init_pll(ah, NULL);
3986 return true;
3980} 3987}
3981 3988
3982void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) 3989void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit)
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 6673a8103364..773f5c405c0e 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -102,7 +102,7 @@
102#define AR_GPIO_BIT(_gpio) (1 << (_gpio)) 102#define AR_GPIO_BIT(_gpio) (1 << (_gpio))
103 103
104#define BASE_ACTIVATE_DELAY 100 104#define BASE_ACTIVATE_DELAY 100
105#define RTC_PLL_SETTLE_DELAY 1000 105#define RTC_PLL_SETTLE_DELAY 100
106#define COEF_SCALE_S 24 106#define COEF_SCALE_S 24
107#define HT40_CHANNEL_CENTER_SHIFT 10 107#define HT40_CHANNEL_CENTER_SHIFT 10
108 108