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authorSriram <srk@ti.com>2010-05-10 17:29:17 -0400
committerTony Lindgren <tony@atomide.com>2010-05-20 13:53:55 -0400
commit56881d28b2eed78665daa1d680014e9ebaf8c0e3 (patch)
treea55628721b89bb980c37e3e2dc9ef4c3ebe526ec
parent39e799df2f504a160852342109d228abfe75fede (diff)
AM35xx: Platform specific hookup for EMAC module
Modified AM35xx EVM init sequence to handle EMAC initialization. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c98
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 6ca0075026ff..02e209743e1f 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -22,6 +22,7 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/i2c/pca953x.h> 23#include <linux/i2c/pca953x.h>
24#include <linux/can/platform/ti_hecc.h> 24#include <linux/can/platform/ti_hecc.h>
25#include <linux/davinci_emac.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/am35xx.h> 28#include <mach/am35xx.h>
@@ -31,11 +32,106 @@
31 32
32#include <plat/board.h> 33#include <plat/board.h>
33#include <plat/common.h> 34#include <plat/common.h>
35#include <plat/control.h>
34#include <plat/usb.h> 36#include <plat/usb.h>
35#include <plat/display.h> 37#include <plat/display.h>
36 38
37#include "mux.h" 39#include "mux.h"
38 40
41#define AM35XX_EVM_PHY_MASK (0xF)
42#define AM35XX_EVM_MDIO_FREQUENCY (1000000)
43
44static struct emac_platform_data am3517_evm_emac_pdata = {
45 .phy_mask = AM35XX_EVM_PHY_MASK,
46 .mdio_max_freq = AM35XX_EVM_MDIO_FREQUENCY,
47 .rmii_en = 1,
48};
49
50static struct resource am3517_emac_resources[] = {
51 {
52 .start = AM35XX_IPSS_EMAC_BASE,
53 .end = AM35XX_IPSS_EMAC_BASE + 0x3FFFF,
54 .flags = IORESOURCE_MEM,
55 },
56 {
57 .start = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
58 .end = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
63 .end = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
64 .flags = IORESOURCE_IRQ,
65 },
66 {
67 .start = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
68 .end = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
69 .flags = IORESOURCE_IRQ,
70 },
71 {
72 .start = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
73 .end = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
74 .flags = IORESOURCE_IRQ,
75 },
76};
77
78static struct platform_device am3517_emac_device = {
79 .name = "davinci_emac",
80 .id = -1,
81 .num_resources = ARRAY_SIZE(am3517_emac_resources),
82 .resource = am3517_emac_resources,
83};
84
85static void am3517_enable_ethernet_int(void)
86{
87 u32 regval;
88
89 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
90 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
91 AM35XX_CPGMAC_C0_TX_PULSE_CLR |
92 AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
93 AM35XX_CPGMAC_C0_RX_THRESH_CLR);
94 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
95 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
96}
97
98static void am3517_disable_ethernet_int(void)
99{
100 u32 regval;
101
102 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
103 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
104 AM35XX_CPGMAC_C0_TX_PULSE_CLR);
105 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
106 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
107}
108
109void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
110{
111 unsigned int regval;
112
113 pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET;
114 pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET;
115 pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET;
116 pdata->mdio_reg_offset = AM35XX_EMAC_MDIO_OFFSET;
117 pdata->ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE;
118 pdata->version = EMAC_VERSION_2;
119 pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR;
120 pdata->interrupt_enable = am3517_enable_ethernet_int;
121 pdata->interrupt_disable = am3517_disable_ethernet_int;
122 am3517_emac_device.dev.platform_data = pdata;
123 platform_device_register(&am3517_emac_device);
124
125 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
126 regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
127 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
128 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
129
130 return ;
131}
132
133
134
39#define LCD_PANEL_PWR 176 135#define LCD_PANEL_PWR 176
40#define LCD_PANEL_BKLIGHT_PWR 182 136#define LCD_PANEL_BKLIGHT_PWR 182
41#define LCD_PANEL_PWM 181 137#define LCD_PANEL_PWM 181
@@ -351,6 +447,8 @@ static void __init am3517_evm_init(void)
351 447
352 i2c_register_board_info(1, am3517evm_i2c_boardinfo, 448 i2c_register_board_info(1, am3517evm_i2c_boardinfo,
353 ARRAY_SIZE(am3517evm_i2c_boardinfo)); 449 ARRAY_SIZE(am3517evm_i2c_boardinfo));
450 /*Ethernet*/
451 am3517_evm_ethernet_init(&am3517_evm_emac_pdata);
354} 452}
355 453
356static void __init am3517_evm_map_io(void) 454static void __init am3517_evm_map_io(void)