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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2007-10-02 09:54:41 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:14 -0400
commitb4126e86301cfc6863cbc74bc4500a88b7c582df (patch)
tree45ab759f09e249b335208375d24a11c0797a200a
parentb1df86d6e148e3be6d1e43e604b19fbb6815b8ba (diff)
[MIPS] Cobalt: Move PCI definitions to arch/mips/pci/fixup-cobalt.c.
These PCI definitions are only used in arch/mips/pci/fixup-cobalt.c. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/pci/fixup-cobalt.c17
-rw-r--r--include/asm-mips/mach-cobalt/cobalt.h26
2 files changed, 19 insertions, 24 deletions
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 4eb5410f842a..f7df1142912b 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -20,6 +20,23 @@
20#include <cobalt.h> 20#include <cobalt.h>
21#include <irq.h> 21#include <irq.h>
22 22
23/*
24 * PCI slot numbers
25 */
26#define COBALT_PCICONF_CPU 0x06
27#define COBALT_PCICONF_ETH0 0x07
28#define COBALT_PCICONF_RAQSCSI 0x08
29#define COBALT_PCICONF_VIA 0x09
30#define COBALT_PCICONF_PCISLOT 0x0A
31#define COBALT_PCICONF_ETH1 0x0C
32
33/*
34 * The Cobalt board ID information. The boards have an ID number wired
35 * into the VIA that is available in the high nibble of register 94.
36 */
37#define VIA_COBALT_BRD_ID_REG 0x94
38#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char)(reg) >> 4)
39
23static void qube_raq_galileo_early_fixup(struct pci_dev *dev) 40static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
24{ 41{
25 if (dev->devfn == PCI_DEVFN(0, 0) && 42 if (dev->devfn == PCI_DEVFN(0, 0) &&
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index 408eeccbe512..f27fcef3e3ff 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -13,37 +13,15 @@
13#define __ASM_COBALT_H 13#define __ASM_COBALT_H
14 14
15/* 15/*
16 * PCI configuration space manifest constants. These are wired into 16 * The Cobalt board ID information.
17 * the board layout according to the PCI spec to enable the software
18 * to probe the hardware configuration space in a well defined manner.
19 *
20 * The PCI_DEVSHFT() macro transforms these values into numbers
21 * suitable for passing as the dev parameter to the various
22 * pcibios_read/write_config routines.
23 */ 17 */
24#define COBALT_PCICONF_CPU 0x06 18extern int cobalt_board_id;
25#define COBALT_PCICONF_ETH0 0x07
26#define COBALT_PCICONF_RAQSCSI 0x08
27#define COBALT_PCICONF_VIA 0x09
28#define COBALT_PCICONF_PCISLOT 0x0A
29#define COBALT_PCICONF_ETH1 0x0C
30
31 19
32/*
33 * The Cobalt board id information. The boards have an ID number wired
34 * into the VIA that is available in the high nibble of register 94.
35 * This register is available in the VIA configuration space through the
36 * interface routines qube_pcibios_read/write_config. See cobalt/pci.c
37 */
38#define VIA_COBALT_BRD_ID_REG 0x94
39#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char) (reg) >> 4)
40#define COBALT_BRD_ID_QUBE1 0x3 20#define COBALT_BRD_ID_QUBE1 0x3
41#define COBALT_BRD_ID_RAQ1 0x4 21#define COBALT_BRD_ID_RAQ1 0x4
42#define COBALT_BRD_ID_QUBE2 0x5 22#define COBALT_BRD_ID_QUBE2 0x5
43#define COBALT_BRD_ID_RAQ2 0x6 23#define COBALT_BRD_ID_RAQ2 0x6
44 24
45extern int cobalt_board_id;
46
47#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) 25#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
48# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ 26# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */
49# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */ 27# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */