diff options
author | Malli Chilakala <mallikarjuna.chilakala@intel.com> | 2005-04-28 22:03:32 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-05-12 20:54:41 -0400 |
commit | abf481d6af8670c89f33f354c6fbd9977b23cebc (patch) | |
tree | fc604f98db1a85be2c025c10192fd6cb767c29aa | |
parent | 41639fed1b32dde4ea3d94242a89308435d341be (diff) |
[PATCH] ixgb: Fix EEPROM functions to be endian-aware
Fix EEPROM functions to be endian-aware
Signed-off-by: Mallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com>
Signed-off-by: Ganesh Venkatesan <ganesh.venkatesan@intel.com>
Signed-off-by: John Ronciak <john.ronciak@intel.com>
diff -up net-drivers-2.6/drivers/net/ixgb/ixgb_ee.c net-drivers-2.6/drivers/net/ixgb.new/ixgb_ee.c
-rw-r--r-- | drivers/net/ixgb/ixgb_ee.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c index 653e99f919ce..3aae110c5560 100644 --- a/drivers/net/ixgb/ixgb_ee.c +++ b/drivers/net/ixgb/ixgb_ee.c | |||
@@ -411,7 +411,7 @@ ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data) | |||
411 | ixgb_cleanup_eeprom(hw); | 411 | ixgb_cleanup_eeprom(hw); |
412 | 412 | ||
413 | /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ | 413 | /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ |
414 | ee_map->init_ctrl_reg_1 = EEPROM_ICW1_SIGNATURE_CLEAR; | 414 | ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); |
415 | 415 | ||
416 | return; | 416 | return; |
417 | } | 417 | } |
@@ -483,7 +483,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw) | |||
483 | DEBUGOUT("ixgb_ee: Checksum invalid.\n"); | 483 | DEBUGOUT("ixgb_ee: Checksum invalid.\n"); |
484 | /* clear the init_ctrl_reg_1 to signify that the cache is | 484 | /* clear the init_ctrl_reg_1 to signify that the cache is |
485 | * invalidated */ | 485 | * invalidated */ |
486 | ee_map->init_ctrl_reg_1 = EEPROM_ICW1_SIGNATURE_CLEAR; | 486 | ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); |
487 | return (FALSE); | 487 | return (FALSE); |
488 | } | 488 | } |
489 | 489 | ||
@@ -579,7 +579,7 @@ ixgb_get_ee_compatibility(struct ixgb_hw *hw) | |||
579 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 579 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
580 | 580 | ||
581 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 581 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
582 | return(ee_map->compatibility); | 582 | return (le16_to_cpu(ee_map->compatibility)); |
583 | 583 | ||
584 | return(0); | 584 | return(0); |
585 | } | 585 | } |
@@ -616,7 +616,7 @@ ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw) | |||
616 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 616 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
617 | 617 | ||
618 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 618 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
619 | return(ee_map->init_ctrl_reg_1); | 619 | return (le16_to_cpu(ee_map->init_ctrl_reg_1)); |
620 | 620 | ||
621 | return(0); | 621 | return(0); |
622 | } | 622 | } |
@@ -635,7 +635,7 @@ ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw) | |||
635 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 635 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
636 | 636 | ||
637 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 637 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
638 | return(ee_map->init_ctrl_reg_2); | 638 | return (le16_to_cpu(ee_map->init_ctrl_reg_2)); |
639 | 639 | ||
640 | return(0); | 640 | return(0); |
641 | } | 641 | } |
@@ -654,7 +654,7 @@ ixgb_get_ee_subsystem_id(struct ixgb_hw *hw) | |||
654 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 654 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
655 | 655 | ||
656 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 656 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
657 | return(ee_map->subsystem_id); | 657 | return (le16_to_cpu(ee_map->subsystem_id)); |
658 | 658 | ||
659 | return(0); | 659 | return(0); |
660 | } | 660 | } |
@@ -673,7 +673,7 @@ ixgb_get_ee_subvendor_id(struct ixgb_hw *hw) | |||
673 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 673 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
674 | 674 | ||
675 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 675 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
676 | return(ee_map->subvendor_id); | 676 | return (le16_to_cpu(ee_map->subvendor_id)); |
677 | 677 | ||
678 | return(0); | 678 | return(0); |
679 | } | 679 | } |
@@ -692,7 +692,7 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw) | |||
692 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 692 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
693 | 693 | ||
694 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 694 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
695 | return(ee_map->device_id); | 695 | return (le16_to_cpu(ee_map->device_id)); |
696 | 696 | ||
697 | return(0); | 697 | return(0); |
698 | } | 698 | } |
@@ -711,7 +711,7 @@ ixgb_get_ee_vendor_id(struct ixgb_hw *hw) | |||
711 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 711 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
712 | 712 | ||
713 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 713 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
714 | return(ee_map->vendor_id); | 714 | return (le16_to_cpu(ee_map->vendor_id)); |
715 | 715 | ||
716 | return(0); | 716 | return(0); |
717 | } | 717 | } |
@@ -730,7 +730,7 @@ ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw) | |||
730 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 730 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
731 | 731 | ||
732 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 732 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
733 | return(ee_map->swdpins_reg); | 733 | return (le16_to_cpu(ee_map->swdpins_reg)); |
734 | 734 | ||
735 | return(0); | 735 | return(0); |
736 | } | 736 | } |
@@ -749,7 +749,7 @@ ixgb_get_ee_d3_power(struct ixgb_hw *hw) | |||
749 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 749 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
750 | 750 | ||
751 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 751 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
752 | return(ee_map->d3_power); | 752 | return (le16_to_cpu(ee_map->d3_power)); |
753 | 753 | ||
754 | return(0); | 754 | return(0); |
755 | } | 755 | } |
@@ -768,7 +768,7 @@ ixgb_get_ee_d0_power(struct ixgb_hw *hw) | |||
768 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | 768 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; |
769 | 769 | ||
770 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) | 770 | if(ixgb_check_and_get_eeprom_data(hw) == TRUE) |
771 | return(ee_map->d0_power); | 771 | return (le16_to_cpu(ee_map->d0_power)); |
772 | 772 | ||
773 | return(0); | 773 | return(0); |
774 | } | 774 | } |