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authorBen Dooks <ben-linux@fluff.org>2009-01-08 07:40:50 -0500
committerBen Dooks <ben-linux@fluff.org>2009-01-08 11:24:08 -0500
commit43ae6599fe99a22a98658f0d9d0d40a1f12653f4 (patch)
treed70546149c41ed8c98ca26de5a94971992978943
parent4d316fc5a34b073da4145a203101ec5b9553a634 (diff)
[ARM] S3C24XX: Add gpio_to_irq implementation
Add to_irq field handlers for the GPIO banks that are configurable as interripts. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index f95c6c9d9f1a..94a341aaa4e4 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -59,6 +59,22 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
59 return 0; 59 return 0;
60} 60}
61 61
62static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
63{
64 if (offset < 4)
65 return IRQ_EINT0 + offset;
66
67 if (offset < 8)
68 return IRQ_EINT4 + offset - 4;
69
70 return -EINVAL;
71}
72
73static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
74{
75 return IRQ_EINT8 + offset;
76}
77
62struct s3c_gpio_chip s3c24xx_gpios[] = { 78struct s3c_gpio_chip s3c24xx_gpios[] = {
63 [0] = { 79 [0] = {
64 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), 80 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
@@ -114,6 +130,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
114 .owner = THIS_MODULE, 130 .owner = THIS_MODULE,
115 .label = "GPIOF", 131 .label = "GPIOF",
116 .ngpio = 8, 132 .ngpio = 8,
133 .to_irq = s3c24xx_gpiolib_bankf_toirq,
117 }, 134 },
118 }, 135 },
119 [6] = { 136 [6] = {
@@ -123,6 +140,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
123 .owner = THIS_MODULE, 140 .owner = THIS_MODULE,
124 .label = "GPIOG", 141 .label = "GPIOG",
125 .ngpio = 10, 142 .ngpio = 10,
143 .to_irq = s3c24xx_gpiolib_bankg_toirq,
126 }, 144 },
127 }, 145 },
128}; 146};