diff options
author | Greg Ungerer <gerg@uclinux.org> | 2009-04-27 20:57:36 -0400 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2009-09-15 19:43:41 -0400 |
commit | 1b718c71b7830c77a9b70826be83b899e314b585 (patch) | |
tree | eb7151576d1340a3aed8e3ba748161d27489d12f | |
parent | 2fba4f0b035f7723073068cf8b3a01ec38f72ed5 (diff) |
m68knommu: clean up ColdFire 527x interrupt setup
With the common intc-2 interrupt controller code in place the ColdFire
527x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r-- | arch/m68knommu/platform/527x/config.c | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c index f746439cfd3e..fa51be172830 100644 --- a/arch/m68knommu/platform/527x/config.c +++ b/arch/m68knommu/platform/527x/config.c | |||
@@ -116,23 +116,13 @@ static struct platform_device *m527x_devices[] __initdata = { | |||
116 | 116 | ||
117 | /***************************************************************************/ | 117 | /***************************************************************************/ |
118 | 118 | ||
119 | #define INTC0 (MCF_MBAR + MCFICM_INTC0) | ||
120 | |||
121 | static void __init m527x_uart_init_line(int line, int irq) | 119 | static void __init m527x_uart_init_line(int line, int irq) |
122 | { | 120 | { |
123 | u16 sepmask; | 121 | u16 sepmask; |
124 | u32 imr; | ||
125 | 122 | ||
126 | if ((line < 0) || (line > 2)) | 123 | if ((line < 0) || (line > 2)) |
127 | return; | 124 | return; |
128 | 125 | ||
129 | /* level 6, line based priority */ | ||
130 | writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line); | ||
131 | |||
132 | imr = readl(INTC0 + MCFINTC_IMRL); | ||
133 | imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1); | ||
134 | writel(imr, INTC0 + MCFINTC_IMRL); | ||
135 | |||
136 | /* | 126 | /* |
137 | * External Pin Mask Setting & Enable External Pin for Interface | 127 | * External Pin Mask Setting & Enable External Pin for Interface |
138 | */ | 128 | */ |
@@ -157,32 +147,11 @@ static void __init m527x_uarts_init(void) | |||
157 | 147 | ||
158 | /***************************************************************************/ | 148 | /***************************************************************************/ |
159 | 149 | ||
160 | static void __init m527x_fec_irq_init(int nr) | ||
161 | { | ||
162 | unsigned long base; | ||
163 | u32 imr; | ||
164 | |||
165 | base = MCF_IPSBAR + (nr ? MCFICM_INTC1 : MCFICM_INTC0); | ||
166 | |||
167 | writeb(0x28, base + MCFINTC_ICR0 + 23); | ||
168 | writeb(0x27, base + MCFINTC_ICR0 + 27); | ||
169 | writeb(0x26, base + MCFINTC_ICR0 + 29); | ||
170 | |||
171 | imr = readl(base + MCFINTC_IMRH); | ||
172 | imr &= ~0xf; | ||
173 | writel(imr, base + MCFINTC_IMRH); | ||
174 | imr = readl(base + MCFINTC_IMRL); | ||
175 | imr &= ~0xff800001; | ||
176 | writel(imr, base + MCFINTC_IMRL); | ||
177 | } | ||
178 | |||
179 | static void __init m527x_fec_init(void) | 150 | static void __init m527x_fec_init(void) |
180 | { | 151 | { |
181 | u16 par; | 152 | u16 par; |
182 | u8 v; | 153 | u8 v; |
183 | 154 | ||
184 | m527x_fec_irq_init(0); | ||
185 | |||
186 | /* Set multi-function pins to ethernet mode for fec0 */ | 155 | /* Set multi-function pins to ethernet mode for fec0 */ |
187 | #if defined(CONFIG_M5271) | 156 | #if defined(CONFIG_M5271) |
188 | v = readb(MCF_IPSBAR + 0x100047); | 157 | v = readb(MCF_IPSBAR + 0x100047); |
@@ -195,8 +164,6 @@ static void __init m527x_fec_init(void) | |||
195 | #endif | 164 | #endif |
196 | 165 | ||
197 | #ifdef CONFIG_FEC2 | 166 | #ifdef CONFIG_FEC2 |
198 | m527x_fec_irq_init(1); | ||
199 | |||
200 | /* Set multi-function pins to ethernet mode for fec1 */ | 167 | /* Set multi-function pins to ethernet mode for fec1 */ |
201 | par = readw(MCF_IPSBAR + 0x100082); | 168 | par = readw(MCF_IPSBAR + 0x100082); |
202 | writew(par | 0xa0, MCF_IPSBAR + 0x100082); | 169 | writew(par | 0xa0, MCF_IPSBAR + 0x100082); |
@@ -207,21 +174,6 @@ static void __init m527x_fec_init(void) | |||
207 | 174 | ||
208 | /***************************************************************************/ | 175 | /***************************************************************************/ |
209 | 176 | ||
210 | void mcf_disableall(void) | ||
211 | { | ||
212 | *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff; | ||
213 | *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff; | ||
214 | } | ||
215 | |||
216 | /***************************************************************************/ | ||
217 | |||
218 | void mcf_autovector(unsigned int vec) | ||
219 | { | ||
220 | /* Everything is auto-vectored on the 5272 */ | ||
221 | } | ||
222 | |||
223 | /***************************************************************************/ | ||
224 | |||
225 | static void m527x_cpu_reset(void) | 177 | static void m527x_cpu_reset(void) |
226 | { | 178 | { |
227 | local_irq_disable(); | 179 | local_irq_disable(); |
@@ -232,7 +184,6 @@ static void m527x_cpu_reset(void) | |||
232 | 184 | ||
233 | void __init config_BSP(char *commandp, int size) | 185 | void __init config_BSP(char *commandp, int size) |
234 | { | 186 | { |
235 | mcf_disableall(); | ||
236 | mach_reset = m527x_cpu_reset; | 187 | mach_reset = m527x_cpu_reset; |
237 | m527x_uarts_init(); | 188 | m527x_uarts_init(); |
238 | m527x_fec_init(); | 189 | m527x_fec_init(); |