diff options
author | Jeff Garzik <jeff@garzik.org> | 2008-07-29 18:23:13 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-07-29 18:23:13 -0400 |
commit | 16b237dc44c716dbd9aeee4ab8aa9c33a62d5998 (patch) | |
tree | 8375078159747d57c7f1b3d42b5a0b48afaad4a9 | |
parent | 8051367586314ab005dacead790a3b2e4e3dcc58 (diff) | |
parent | ac0a2d0c8ab18045ab217339a71e76c76e186ede (diff) |
Merge branch 'for-2.6.27' of git://git.marvell.com/mv643xx_eth into upstream-fixes
-rw-r--r-- | arch/arm/mach-kirkwood/rd88f6281-setup.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/wnr854t-setup.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/wrt350n-v2-setup.c | 3 | ||||
-rw-r--r-- | drivers/net/mv643xx_eth.c | 358 |
6 files changed, 251 insertions, 122 deletions
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index e1f8de2c74a2..b6437f47a77f 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/timer.h> | 18 | #include <linux/timer.h> |
19 | #include <linux/ata_platform.h> | 19 | #include <linux/ata_platform.h> |
20 | #include <linux/mv643xx_eth.h> | 20 | #include <linux/mv643xx_eth.h> |
21 | #include <linux/ethtool.h> | ||
21 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
22 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
23 | #include <asm/mach/pci.h> | 24 | #include <asm/mach/pci.h> |
@@ -69,6 +70,8 @@ static struct platform_device rd88f6281_nand_flash = { | |||
69 | 70 | ||
70 | static struct mv643xx_eth_platform_data rd88f6281_ge00_data = { | 71 | static struct mv643xx_eth_platform_data rd88f6281_ge00_data = { |
71 | .phy_addr = -1, | 72 | .phy_addr = -1, |
73 | .speed = SPEED_1000, | ||
74 | .duplex = DUPLEX_FULL, | ||
72 | }; | 75 | }; |
73 | 76 | ||
74 | static struct mv_sata_platform_data rd88f6281_sata_data = { | 77 | static struct mv_sata_platform_data rd88f6281_sata_data = { |
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index d50e3650a09e..73e9242da7ad 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/mtd/physmap.h> | 16 | #include <linux/mtd/physmap.h> |
17 | #include <linux/mv643xx_eth.h> | 17 | #include <linux/mv643xx_eth.h> |
18 | #include <linux/ethtool.h> | ||
18 | #include <asm/mach-types.h> | 19 | #include <asm/mach-types.h> |
19 | #include <asm/gpio.h> | 20 | #include <asm/gpio.h> |
20 | #include <asm/leds.h> | 21 | #include <asm/leds.h> |
@@ -88,6 +89,8 @@ static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = { | |||
88 | 89 | ||
89 | static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = { | 90 | static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = { |
90 | .phy_addr = -1, | 91 | .phy_addr = -1, |
92 | .speed = SPEED_1000, | ||
93 | .duplex = DUPLEX_FULL, | ||
91 | }; | 94 | }; |
92 | 95 | ||
93 | static void __init rd88f5181l_fxo_init(void) | 96 | static void __init rd88f5181l_fxo_init(void) |
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index b56447d32e17..ac482019abbf 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/mtd/physmap.h> | 16 | #include <linux/mtd/physmap.h> |
17 | #include <linux/mv643xx_eth.h> | 17 | #include <linux/mv643xx_eth.h> |
18 | #include <linux/ethtool.h> | ||
18 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
19 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
20 | #include <asm/gpio.h> | 21 | #include <asm/gpio.h> |
@@ -89,6 +90,8 @@ static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = { | |||
89 | 90 | ||
90 | static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = { | 91 | static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = { |
91 | .phy_addr = -1, | 92 | .phy_addr = -1, |
93 | .speed = SPEED_1000, | ||
94 | .duplex = DUPLEX_FULL, | ||
92 | }; | 95 | }; |
93 | 96 | ||
94 | static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = { | 97 | static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = { |
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index 1af093ff8cf3..25568c2a3d29 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/delay.h> | 14 | #include <linux/delay.h> |
15 | #include <linux/mtd/physmap.h> | 15 | #include <linux/mtd/physmap.h> |
16 | #include <linux/mv643xx_eth.h> | 16 | #include <linux/mv643xx_eth.h> |
17 | #include <linux/ethtool.h> | ||
17 | #include <asm/mach-types.h> | 18 | #include <asm/mach-types.h> |
18 | #include <asm/gpio.h> | 19 | #include <asm/gpio.h> |
19 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
@@ -92,6 +93,8 @@ static struct platform_device wnr854t_nor_flash = { | |||
92 | 93 | ||
93 | static struct mv643xx_eth_platform_data wnr854t_eth_data = { | 94 | static struct mv643xx_eth_platform_data wnr854t_eth_data = { |
94 | .phy_addr = -1, | 95 | .phy_addr = -1, |
96 | .speed = SPEED_1000, | ||
97 | .duplex = DUPLEX_FULL, | ||
95 | }; | 98 | }; |
96 | 99 | ||
97 | static void __init wnr854t_init(void) | 100 | static void __init wnr854t_init(void) |
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index aeab55c6a82d..9b8ee8c48bf0 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/delay.h> | 14 | #include <linux/delay.h> |
15 | #include <linux/mtd/physmap.h> | 15 | #include <linux/mtd/physmap.h> |
16 | #include <linux/mv643xx_eth.h> | 16 | #include <linux/mv643xx_eth.h> |
17 | #include <linux/ethtool.h> | ||
17 | #include <asm/mach-types.h> | 18 | #include <asm/mach-types.h> |
18 | #include <asm/gpio.h> | 19 | #include <asm/gpio.h> |
19 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
@@ -100,6 +101,8 @@ static struct platform_device wrt350n_v2_nor_flash = { | |||
100 | 101 | ||
101 | static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { | 102 | static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { |
102 | .phy_addr = -1, | 103 | .phy_addr = -1, |
104 | .speed = SPEED_1000, | ||
105 | .duplex = DUPLEX_FULL, | ||
103 | }; | 106 | }; |
104 | 107 | ||
105 | static void __init wrt350n_v2_init(void) | 108 | static void __init wrt350n_v2_init(void) |
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 8a97a0066a88..46819af3b062 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -55,7 +55,7 @@ | |||
55 | #include <asm/system.h> | 55 | #include <asm/system.h> |
56 | 56 | ||
57 | static char mv643xx_eth_driver_name[] = "mv643xx_eth"; | 57 | static char mv643xx_eth_driver_name[] = "mv643xx_eth"; |
58 | static char mv643xx_eth_driver_version[] = "1.1"; | 58 | static char mv643xx_eth_driver_version[] = "1.2"; |
59 | 59 | ||
60 | #define MV643XX_ETH_CHECKSUM_OFFLOAD_TX | 60 | #define MV643XX_ETH_CHECKSUM_OFFLOAD_TX |
61 | #define MV643XX_ETH_NAPI | 61 | #define MV643XX_ETH_NAPI |
@@ -90,12 +90,21 @@ static char mv643xx_eth_driver_version[] = "1.1"; | |||
90 | #define PORT_SERIAL_CONTROL(p) (0x043c + ((p) << 10)) | 90 | #define PORT_SERIAL_CONTROL(p) (0x043c + ((p) << 10)) |
91 | #define PORT_STATUS(p) (0x0444 + ((p) << 10)) | 91 | #define PORT_STATUS(p) (0x0444 + ((p) << 10)) |
92 | #define TX_FIFO_EMPTY 0x00000400 | 92 | #define TX_FIFO_EMPTY 0x00000400 |
93 | #define TX_IN_PROGRESS 0x00000080 | ||
94 | #define PORT_SPEED_MASK 0x00000030 | ||
95 | #define PORT_SPEED_1000 0x00000010 | ||
96 | #define PORT_SPEED_100 0x00000020 | ||
97 | #define PORT_SPEED_10 0x00000000 | ||
98 | #define FLOW_CONTROL_ENABLED 0x00000008 | ||
99 | #define FULL_DUPLEX 0x00000004 | ||
100 | #define LINK_UP 0x00000002 | ||
93 | #define TXQ_COMMAND(p) (0x0448 + ((p) << 10)) | 101 | #define TXQ_COMMAND(p) (0x0448 + ((p) << 10)) |
94 | #define TXQ_FIX_PRIO_CONF(p) (0x044c + ((p) << 10)) | 102 | #define TXQ_FIX_PRIO_CONF(p) (0x044c + ((p) << 10)) |
95 | #define TX_BW_RATE(p) (0x0450 + ((p) << 10)) | 103 | #define TX_BW_RATE(p) (0x0450 + ((p) << 10)) |
96 | #define TX_BW_MTU(p) (0x0458 + ((p) << 10)) | 104 | #define TX_BW_MTU(p) (0x0458 + ((p) << 10)) |
97 | #define TX_BW_BURST(p) (0x045c + ((p) << 10)) | 105 | #define TX_BW_BURST(p) (0x045c + ((p) << 10)) |
98 | #define INT_CAUSE(p) (0x0460 + ((p) << 10)) | 106 | #define INT_CAUSE(p) (0x0460 + ((p) << 10)) |
107 | #define INT_TX_END_0 0x00080000 | ||
99 | #define INT_TX_END 0x07f80000 | 108 | #define INT_TX_END 0x07f80000 |
100 | #define INT_RX 0x0007fbfc | 109 | #define INT_RX 0x0007fbfc |
101 | #define INT_EXT 0x00000002 | 110 | #define INT_EXT 0x00000002 |
@@ -127,21 +136,21 @@ static char mv643xx_eth_driver_version[] = "1.1"; | |||
127 | /* | 136 | /* |
128 | * SDMA configuration register. | 137 | * SDMA configuration register. |
129 | */ | 138 | */ |
130 | #define RX_BURST_SIZE_4_64BIT (2 << 1) | 139 | #define RX_BURST_SIZE_16_64BIT (4 << 1) |
131 | #define BLM_RX_NO_SWAP (1 << 4) | 140 | #define BLM_RX_NO_SWAP (1 << 4) |
132 | #define BLM_TX_NO_SWAP (1 << 5) | 141 | #define BLM_TX_NO_SWAP (1 << 5) |
133 | #define TX_BURST_SIZE_4_64BIT (2 << 22) | 142 | #define TX_BURST_SIZE_16_64BIT (4 << 22) |
134 | 143 | ||
135 | #if defined(__BIG_ENDIAN) | 144 | #if defined(__BIG_ENDIAN) |
136 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ | 145 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ |
137 | RX_BURST_SIZE_4_64BIT | \ | 146 | RX_BURST_SIZE_16_64BIT | \ |
138 | TX_BURST_SIZE_4_64BIT | 147 | TX_BURST_SIZE_16_64BIT |
139 | #elif defined(__LITTLE_ENDIAN) | 148 | #elif defined(__LITTLE_ENDIAN) |
140 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ | 149 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ |
141 | RX_BURST_SIZE_4_64BIT | \ | 150 | RX_BURST_SIZE_16_64BIT | \ |
142 | BLM_RX_NO_SWAP | \ | 151 | BLM_RX_NO_SWAP | \ |
143 | BLM_TX_NO_SWAP | \ | 152 | BLM_TX_NO_SWAP | \ |
144 | TX_BURST_SIZE_4_64BIT | 153 | TX_BURST_SIZE_16_64BIT |
145 | #else | 154 | #else |
146 | #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined | 155 | #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined |
147 | #endif | 156 | #endif |
@@ -153,9 +162,7 @@ static char mv643xx_eth_driver_version[] = "1.1"; | |||
153 | #define SET_MII_SPEED_TO_100 (1 << 24) | 162 | #define SET_MII_SPEED_TO_100 (1 << 24) |
154 | #define SET_GMII_SPEED_TO_1000 (1 << 23) | 163 | #define SET_GMII_SPEED_TO_1000 (1 << 23) |
155 | #define SET_FULL_DUPLEX_MODE (1 << 21) | 164 | #define SET_FULL_DUPLEX_MODE (1 << 21) |
156 | #define MAX_RX_PACKET_1522BYTE (1 << 17) | ||
157 | #define MAX_RX_PACKET_9700BYTE (5 << 17) | 165 | #define MAX_RX_PACKET_9700BYTE (5 << 17) |
158 | #define MAX_RX_PACKET_MASK (7 << 17) | ||
159 | #define DISABLE_AUTO_NEG_SPEED_GMII (1 << 13) | 166 | #define DISABLE_AUTO_NEG_SPEED_GMII (1 << 13) |
160 | #define DO_NOT_FORCE_LINK_FAIL (1 << 10) | 167 | #define DO_NOT_FORCE_LINK_FAIL (1 << 10) |
161 | #define SERIAL_PORT_CONTROL_RESERVED (1 << 9) | 168 | #define SERIAL_PORT_CONTROL_RESERVED (1 << 9) |
@@ -228,6 +235,8 @@ struct tx_desc { | |||
228 | #define GEN_IP_V4_CHECKSUM 0x00040000 | 235 | #define GEN_IP_V4_CHECKSUM 0x00040000 |
229 | #define GEN_TCP_UDP_CHECKSUM 0x00020000 | 236 | #define GEN_TCP_UDP_CHECKSUM 0x00020000 |
230 | #define UDP_FRAME 0x00010000 | 237 | #define UDP_FRAME 0x00010000 |
238 | #define MAC_HDR_EXTRA_4_BYTES 0x00008000 | ||
239 | #define MAC_HDR_EXTRA_8_BYTES 0x00000200 | ||
231 | 240 | ||
232 | #define TX_IHL_SHIFT 11 | 241 | #define TX_IHL_SHIFT 11 |
233 | 242 | ||
@@ -404,6 +413,17 @@ static void rxq_disable(struct rx_queue *rxq) | |||
404 | udelay(10); | 413 | udelay(10); |
405 | } | 414 | } |
406 | 415 | ||
416 | static void txq_reset_hw_ptr(struct tx_queue *txq) | ||
417 | { | ||
418 | struct mv643xx_eth_private *mp = txq_to_mp(txq); | ||
419 | int off = TXQ_CURRENT_DESC_PTR(mp->port_num, txq->index); | ||
420 | u32 addr; | ||
421 | |||
422 | addr = (u32)txq->tx_desc_dma; | ||
423 | addr += txq->tx_curr_desc * sizeof(struct tx_desc); | ||
424 | wrl(mp, off, addr); | ||
425 | } | ||
426 | |||
407 | static void txq_enable(struct tx_queue *txq) | 427 | static void txq_enable(struct tx_queue *txq) |
408 | { | 428 | { |
409 | struct mv643xx_eth_private *mp = txq_to_mp(txq); | 429 | struct mv643xx_eth_private *mp = txq_to_mp(txq); |
@@ -614,6 +634,12 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget) | |||
614 | for (i = 0; i < 8; i++) | 634 | for (i = 0; i < 8; i++) |
615 | if (mp->txq_mask & (1 << i)) | 635 | if (mp->txq_mask & (1 << i)) |
616 | txq_reclaim(mp->txq + i, 0); | 636 | txq_reclaim(mp->txq + i, 0); |
637 | |||
638 | if (netif_carrier_ok(mp->dev)) { | ||
639 | spin_lock(&mp->lock); | ||
640 | __txq_maybe_wake(mp->txq + mp->txq_primary); | ||
641 | spin_unlock(&mp->lock); | ||
642 | } | ||
617 | } | 643 | } |
618 | #endif | 644 | #endif |
619 | 645 | ||
@@ -706,6 +732,7 @@ static inline __be16 sum16_as_be(__sum16 sum) | |||
706 | 732 | ||
707 | static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) | 733 | static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) |
708 | { | 734 | { |
735 | struct mv643xx_eth_private *mp = txq_to_mp(txq); | ||
709 | int nr_frags = skb_shinfo(skb)->nr_frags; | 736 | int nr_frags = skb_shinfo(skb)->nr_frags; |
710 | int tx_index; | 737 | int tx_index; |
711 | struct tx_desc *desc; | 738 | struct tx_desc *desc; |
@@ -732,12 +759,36 @@ static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) | |||
732 | desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE); | 759 | desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE); |
733 | 760 | ||
734 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 761 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
735 | BUG_ON(skb->protocol != htons(ETH_P_IP)); | 762 | int mac_hdr_len; |
763 | |||
764 | BUG_ON(skb->protocol != htons(ETH_P_IP) && | ||
765 | skb->protocol != htons(ETH_P_8021Q)); | ||
736 | 766 | ||
737 | cmd_sts |= GEN_TCP_UDP_CHECKSUM | | 767 | cmd_sts |= GEN_TCP_UDP_CHECKSUM | |
738 | GEN_IP_V4_CHECKSUM | | 768 | GEN_IP_V4_CHECKSUM | |
739 | ip_hdr(skb)->ihl << TX_IHL_SHIFT; | 769 | ip_hdr(skb)->ihl << TX_IHL_SHIFT; |
740 | 770 | ||
771 | mac_hdr_len = (void *)ip_hdr(skb) - (void *)skb->data; | ||
772 | switch (mac_hdr_len - ETH_HLEN) { | ||
773 | case 0: | ||
774 | break; | ||
775 | case 4: | ||
776 | cmd_sts |= MAC_HDR_EXTRA_4_BYTES; | ||
777 | break; | ||
778 | case 8: | ||
779 | cmd_sts |= MAC_HDR_EXTRA_8_BYTES; | ||
780 | break; | ||
781 | case 12: | ||
782 | cmd_sts |= MAC_HDR_EXTRA_4_BYTES; | ||
783 | cmd_sts |= MAC_HDR_EXTRA_8_BYTES; | ||
784 | break; | ||
785 | default: | ||
786 | if (net_ratelimit()) | ||
787 | dev_printk(KERN_ERR, &txq_to_mp(txq)->dev->dev, | ||
788 | "mac header length is %d?!\n", mac_hdr_len); | ||
789 | break; | ||
790 | } | ||
791 | |||
741 | switch (ip_hdr(skb)->protocol) { | 792 | switch (ip_hdr(skb)->protocol) { |
742 | case IPPROTO_UDP: | 793 | case IPPROTO_UDP: |
743 | cmd_sts |= UDP_FRAME; | 794 | cmd_sts |= UDP_FRAME; |
@@ -759,6 +810,10 @@ static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) | |||
759 | wmb(); | 810 | wmb(); |
760 | desc->cmd_sts = cmd_sts; | 811 | desc->cmd_sts = cmd_sts; |
761 | 812 | ||
813 | /* clear TX_END interrupt status */ | ||
814 | wrl(mp, INT_CAUSE(mp->port_num), ~(INT_TX_END_0 << txq->index)); | ||
815 | rdl(mp, INT_CAUSE(mp->port_num)); | ||
816 | |||
762 | /* ensure all descriptors are written before poking hardware */ | 817 | /* ensure all descriptors are written before poking hardware */ |
763 | wmb(); | 818 | wmb(); |
764 | txq_enable(txq); | 819 | txq_enable(txq); |
@@ -1112,10 +1167,28 @@ static int mv643xx_eth_get_settings(struct net_device *dev, struct ethtool_cmd * | |||
1112 | 1167 | ||
1113 | static int mv643xx_eth_get_settings_phyless(struct net_device *dev, struct ethtool_cmd *cmd) | 1168 | static int mv643xx_eth_get_settings_phyless(struct net_device *dev, struct ethtool_cmd *cmd) |
1114 | { | 1169 | { |
1170 | struct mv643xx_eth_private *mp = netdev_priv(dev); | ||
1171 | u32 port_status; | ||
1172 | |||
1173 | port_status = rdl(mp, PORT_STATUS(mp->port_num)); | ||
1174 | |||
1115 | cmd->supported = SUPPORTED_MII; | 1175 | cmd->supported = SUPPORTED_MII; |
1116 | cmd->advertising = ADVERTISED_MII; | 1176 | cmd->advertising = ADVERTISED_MII; |
1117 | cmd->speed = SPEED_1000; | 1177 | switch (port_status & PORT_SPEED_MASK) { |
1118 | cmd->duplex = DUPLEX_FULL; | 1178 | case PORT_SPEED_10: |
1179 | cmd->speed = SPEED_10; | ||
1180 | break; | ||
1181 | case PORT_SPEED_100: | ||
1182 | cmd->speed = SPEED_100; | ||
1183 | break; | ||
1184 | case PORT_SPEED_1000: | ||
1185 | cmd->speed = SPEED_1000; | ||
1186 | break; | ||
1187 | default: | ||
1188 | cmd->speed = -1; | ||
1189 | break; | ||
1190 | } | ||
1191 | cmd->duplex = (port_status & FULL_DUPLEX) ? DUPLEX_FULL : DUPLEX_HALF; | ||
1119 | cmd->port = PORT_MII; | 1192 | cmd->port = PORT_MII; |
1120 | cmd->phy_address = 0; | 1193 | cmd->phy_address = 0; |
1121 | cmd->transceiver = XCVR_INTERNAL; | 1194 | cmd->transceiver = XCVR_INTERNAL; |
@@ -1539,8 +1612,11 @@ static int txq_init(struct mv643xx_eth_private *mp, int index) | |||
1539 | 1612 | ||
1540 | tx_desc = (struct tx_desc *)txq->tx_desc_area; | 1613 | tx_desc = (struct tx_desc *)txq->tx_desc_area; |
1541 | for (i = 0; i < txq->tx_ring_size; i++) { | 1614 | for (i = 0; i < txq->tx_ring_size; i++) { |
1615 | struct tx_desc *txd = tx_desc + i; | ||
1542 | int nexti = (i + 1) % txq->tx_ring_size; | 1616 | int nexti = (i + 1) % txq->tx_ring_size; |
1543 | tx_desc[i].next_desc_ptr = txq->tx_desc_dma + | 1617 | |
1618 | txd->cmd_sts = 0; | ||
1619 | txd->next_desc_ptr = txq->tx_desc_dma + | ||
1544 | nexti * sizeof(struct tx_desc); | 1620 | nexti * sizeof(struct tx_desc); |
1545 | } | 1621 | } |
1546 | 1622 | ||
@@ -1577,8 +1653,11 @@ static void txq_reclaim(struct tx_queue *txq, int force) | |||
1577 | desc = &txq->tx_desc_area[tx_index]; | 1653 | desc = &txq->tx_desc_area[tx_index]; |
1578 | cmd_sts = desc->cmd_sts; | 1654 | cmd_sts = desc->cmd_sts; |
1579 | 1655 | ||
1580 | if (!force && (cmd_sts & BUFFER_OWNED_BY_DMA)) | 1656 | if (cmd_sts & BUFFER_OWNED_BY_DMA) { |
1581 | break; | 1657 | if (!force) |
1658 | break; | ||
1659 | desc->cmd_sts = cmd_sts & ~BUFFER_OWNED_BY_DMA; | ||
1660 | } | ||
1582 | 1661 | ||
1583 | txq->tx_used_desc = (tx_index + 1) % txq->tx_ring_size; | 1662 | txq->tx_used_desc = (tx_index + 1) % txq->tx_ring_size; |
1584 | txq->tx_desc_count--; | 1663 | txq->tx_desc_count--; |
@@ -1632,49 +1711,61 @@ static void txq_deinit(struct tx_queue *txq) | |||
1632 | 1711 | ||
1633 | 1712 | ||
1634 | /* netdev ops and related ***************************************************/ | 1713 | /* netdev ops and related ***************************************************/ |
1635 | static void update_pscr(struct mv643xx_eth_private *mp, int speed, int duplex) | 1714 | static void handle_link_event(struct mv643xx_eth_private *mp) |
1636 | { | 1715 | { |
1637 | u32 pscr_o; | 1716 | struct net_device *dev = mp->dev; |
1638 | u32 pscr_n; | 1717 | u32 port_status; |
1639 | 1718 | int speed; | |
1640 | pscr_o = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | 1719 | int duplex; |
1720 | int fc; | ||
1721 | |||
1722 | port_status = rdl(mp, PORT_STATUS(mp->port_num)); | ||
1723 | if (!(port_status & LINK_UP)) { | ||
1724 | if (netif_carrier_ok(dev)) { | ||
1725 | int i; | ||
1641 | 1726 | ||
1642 | /* clear speed, duplex and rx buffer size fields */ | 1727 | printk(KERN_INFO "%s: link down\n", dev->name); |
1643 | pscr_n = pscr_o & ~(SET_MII_SPEED_TO_100 | | ||
1644 | SET_GMII_SPEED_TO_1000 | | ||
1645 | SET_FULL_DUPLEX_MODE | | ||
1646 | MAX_RX_PACKET_MASK); | ||
1647 | 1728 | ||
1648 | if (speed == SPEED_1000) { | 1729 | netif_carrier_off(dev); |
1649 | pscr_n |= SET_GMII_SPEED_TO_1000 | MAX_RX_PACKET_9700BYTE; | 1730 | netif_stop_queue(dev); |
1650 | } else { | ||
1651 | if (speed == SPEED_100) | ||
1652 | pscr_n |= SET_MII_SPEED_TO_100; | ||
1653 | pscr_n |= MAX_RX_PACKET_1522BYTE; | ||
1654 | } | ||
1655 | 1731 | ||
1656 | if (duplex == DUPLEX_FULL) | 1732 | for (i = 0; i < 8; i++) { |
1657 | pscr_n |= SET_FULL_DUPLEX_MODE; | 1733 | struct tx_queue *txq = mp->txq + i; |
1658 | 1734 | ||
1659 | if (pscr_n != pscr_o) { | 1735 | if (mp->txq_mask & (1 << i)) { |
1660 | if ((pscr_o & SERIAL_PORT_ENABLE) == 0) | 1736 | txq_reclaim(txq, 1); |
1661 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n); | 1737 | txq_reset_hw_ptr(txq); |
1662 | else { | 1738 | } |
1663 | int i; | 1739 | } |
1740 | } | ||
1741 | return; | ||
1742 | } | ||
1664 | 1743 | ||
1665 | for (i = 0; i < 8; i++) | 1744 | switch (port_status & PORT_SPEED_MASK) { |
1666 | if (mp->txq_mask & (1 << i)) | 1745 | case PORT_SPEED_10: |
1667 | txq_disable(mp->txq + i); | 1746 | speed = 10; |
1747 | break; | ||
1748 | case PORT_SPEED_100: | ||
1749 | speed = 100; | ||
1750 | break; | ||
1751 | case PORT_SPEED_1000: | ||
1752 | speed = 1000; | ||
1753 | break; | ||
1754 | default: | ||
1755 | speed = -1; | ||
1756 | break; | ||
1757 | } | ||
1758 | duplex = (port_status & FULL_DUPLEX) ? 1 : 0; | ||
1759 | fc = (port_status & FLOW_CONTROL_ENABLED) ? 1 : 0; | ||
1668 | 1760 | ||
1669 | pscr_o &= ~SERIAL_PORT_ENABLE; | 1761 | printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " |
1670 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_o); | 1762 | "flow control %sabled\n", dev->name, |
1671 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n); | 1763 | speed, duplex ? "full" : "half", |
1672 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n); | 1764 | fc ? "en" : "dis"); |
1673 | 1765 | ||
1674 | for (i = 0; i < 8; i++) | 1766 | if (!netif_carrier_ok(dev)) { |
1675 | if (mp->txq_mask & (1 << i)) | 1767 | netif_carrier_on(dev); |
1676 | txq_enable(mp->txq + i); | 1768 | netif_wake_queue(dev); |
1677 | } | ||
1678 | } | 1769 | } |
1679 | } | 1770 | } |
1680 | 1771 | ||
@@ -1684,7 +1775,6 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1684 | struct mv643xx_eth_private *mp = netdev_priv(dev); | 1775 | struct mv643xx_eth_private *mp = netdev_priv(dev); |
1685 | u32 int_cause; | 1776 | u32 int_cause; |
1686 | u32 int_cause_ext; | 1777 | u32 int_cause_ext; |
1687 | u32 txq_active; | ||
1688 | 1778 | ||
1689 | int_cause = rdl(mp, INT_CAUSE(mp->port_num)) & | 1779 | int_cause = rdl(mp, INT_CAUSE(mp->port_num)) & |
1690 | (INT_TX_END | INT_RX | INT_EXT); | 1780 | (INT_TX_END | INT_RX | INT_EXT); |
@@ -1698,30 +1788,8 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1698 | wrl(mp, INT_CAUSE_EXT(mp->port_num), ~int_cause_ext); | 1788 | wrl(mp, INT_CAUSE_EXT(mp->port_num), ~int_cause_ext); |
1699 | } | 1789 | } |
1700 | 1790 | ||
1701 | if (int_cause_ext & (INT_EXT_PHY | INT_EXT_LINK)) { | 1791 | if (int_cause_ext & (INT_EXT_PHY | INT_EXT_LINK)) |
1702 | if (mp->phy_addr == -1 || mii_link_ok(&mp->mii)) { | 1792 | handle_link_event(mp); |
1703 | int i; | ||
1704 | |||
1705 | if (mp->phy_addr != -1) { | ||
1706 | struct ethtool_cmd cmd; | ||
1707 | |||
1708 | mii_ethtool_gset(&mp->mii, &cmd); | ||
1709 | update_pscr(mp, cmd.speed, cmd.duplex); | ||
1710 | } | ||
1711 | |||
1712 | for (i = 0; i < 8; i++) | ||
1713 | if (mp->txq_mask & (1 << i)) | ||
1714 | txq_enable(mp->txq + i); | ||
1715 | |||
1716 | if (!netif_carrier_ok(dev)) { | ||
1717 | netif_carrier_on(dev); | ||
1718 | __txq_maybe_wake(mp->txq + mp->txq_primary); | ||
1719 | } | ||
1720 | } else if (netif_carrier_ok(dev)) { | ||
1721 | netif_stop_queue(dev); | ||
1722 | netif_carrier_off(dev); | ||
1723 | } | ||
1724 | } | ||
1725 | 1793 | ||
1726 | /* | 1794 | /* |
1727 | * RxBuffer or RxError set for any of the 8 queues? | 1795 | * RxBuffer or RxError set for any of the 8 queues? |
@@ -1743,8 +1811,6 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1743 | } | 1811 | } |
1744 | #endif | 1812 | #endif |
1745 | 1813 | ||
1746 | txq_active = rdl(mp, TXQ_COMMAND(mp->port_num)); | ||
1747 | |||
1748 | /* | 1814 | /* |
1749 | * TxBuffer or TxError set for any of the 8 queues? | 1815 | * TxBuffer or TxError set for any of the 8 queues? |
1750 | */ | 1816 | */ |
@@ -1754,6 +1820,16 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1754 | for (i = 0; i < 8; i++) | 1820 | for (i = 0; i < 8; i++) |
1755 | if (mp->txq_mask & (1 << i)) | 1821 | if (mp->txq_mask & (1 << i)) |
1756 | txq_reclaim(mp->txq + i, 0); | 1822 | txq_reclaim(mp->txq + i, 0); |
1823 | |||
1824 | /* | ||
1825 | * Enough space again in the primary TX queue for a | ||
1826 | * full packet? | ||
1827 | */ | ||
1828 | if (netif_carrier_ok(dev)) { | ||
1829 | spin_lock(&mp->lock); | ||
1830 | __txq_maybe_wake(mp->txq + mp->txq_primary); | ||
1831 | spin_unlock(&mp->lock); | ||
1832 | } | ||
1757 | } | 1833 | } |
1758 | 1834 | ||
1759 | /* | 1835 | /* |
@@ -1763,19 +1839,25 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1763 | int i; | 1839 | int i; |
1764 | 1840 | ||
1765 | wrl(mp, INT_CAUSE(mp->port_num), ~(int_cause & INT_TX_END)); | 1841 | wrl(mp, INT_CAUSE(mp->port_num), ~(int_cause & INT_TX_END)); |
1842 | |||
1843 | spin_lock(&mp->lock); | ||
1766 | for (i = 0; i < 8; i++) { | 1844 | for (i = 0; i < 8; i++) { |
1767 | struct tx_queue *txq = mp->txq + i; | 1845 | struct tx_queue *txq = mp->txq + i; |
1768 | if (txq->tx_desc_count && !((txq_active >> i) & 1)) | 1846 | u32 hw_desc_ptr; |
1847 | u32 expected_ptr; | ||
1848 | |||
1849 | if ((int_cause & (INT_TX_END_0 << i)) == 0) | ||
1850 | continue; | ||
1851 | |||
1852 | hw_desc_ptr = | ||
1853 | rdl(mp, TXQ_CURRENT_DESC_PTR(mp->port_num, i)); | ||
1854 | expected_ptr = (u32)txq->tx_desc_dma + | ||
1855 | txq->tx_curr_desc * sizeof(struct tx_desc); | ||
1856 | |||
1857 | if (hw_desc_ptr != expected_ptr) | ||
1769 | txq_enable(txq); | 1858 | txq_enable(txq); |
1770 | } | 1859 | } |
1771 | } | 1860 | spin_unlock(&mp->lock); |
1772 | |||
1773 | /* | ||
1774 | * Enough space again in the primary TX queue for a full packet? | ||
1775 | */ | ||
1776 | if (int_cause_ext & INT_EXT_TX) { | ||
1777 | struct tx_queue *txq = mp->txq + mp->txq_primary; | ||
1778 | __txq_maybe_wake(txq); | ||
1779 | } | 1861 | } |
1780 | 1862 | ||
1781 | return IRQ_HANDLED; | 1863 | return IRQ_HANDLED; |
@@ -1785,14 +1867,14 @@ static void phy_reset(struct mv643xx_eth_private *mp) | |||
1785 | { | 1867 | { |
1786 | unsigned int data; | 1868 | unsigned int data; |
1787 | 1869 | ||
1788 | smi_reg_read(mp, mp->phy_addr, 0, &data); | 1870 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); |
1789 | data |= 0x8000; | 1871 | data |= BMCR_RESET; |
1790 | smi_reg_write(mp, mp->phy_addr, 0, data); | 1872 | smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); |
1791 | 1873 | ||
1792 | do { | 1874 | do { |
1793 | udelay(1); | 1875 | udelay(1); |
1794 | smi_reg_read(mp, mp->phy_addr, 0, &data); | 1876 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); |
1795 | } while (data & 0x8000); | 1877 | } while (data & BMCR_RESET); |
1796 | } | 1878 | } |
1797 | 1879 | ||
1798 | static void port_start(struct mv643xx_eth_private *mp) | 1880 | static void port_start(struct mv643xx_eth_private *mp) |
@@ -1801,23 +1883,6 @@ static void port_start(struct mv643xx_eth_private *mp) | |||
1801 | int i; | 1883 | int i; |
1802 | 1884 | ||
1803 | /* | 1885 | /* |
1804 | * Configure basic link parameters. | ||
1805 | */ | ||
1806 | pscr = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | ||
1807 | pscr &= ~(SERIAL_PORT_ENABLE | FORCE_LINK_PASS); | ||
1808 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1809 | pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL | | ||
1810 | DISABLE_AUTO_NEG_SPEED_GMII | | ||
1811 | DISABLE_AUTO_NEG_FOR_DUPLEX | | ||
1812 | DO_NOT_FORCE_LINK_FAIL | | ||
1813 | SERIAL_PORT_CONTROL_RESERVED; | ||
1814 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1815 | pscr |= SERIAL_PORT_ENABLE; | ||
1816 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1817 | |||
1818 | wrl(mp, SDMA_CONFIG(mp->port_num), PORT_SDMA_CONFIG_DEFAULT_VALUE); | ||
1819 | |||
1820 | /* | ||
1821 | * Perform PHY reset, if there is a PHY. | 1886 | * Perform PHY reset, if there is a PHY. |
1822 | */ | 1887 | */ |
1823 | if (mp->phy_addr != -1) { | 1888 | if (mp->phy_addr != -1) { |
@@ -1829,21 +1894,31 @@ static void port_start(struct mv643xx_eth_private *mp) | |||
1829 | } | 1894 | } |
1830 | 1895 | ||
1831 | /* | 1896 | /* |
1897 | * Configure basic link parameters. | ||
1898 | */ | ||
1899 | pscr = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | ||
1900 | |||
1901 | pscr |= SERIAL_PORT_ENABLE; | ||
1902 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1903 | |||
1904 | pscr |= DO_NOT_FORCE_LINK_FAIL; | ||
1905 | if (mp->phy_addr == -1) | ||
1906 | pscr |= FORCE_LINK_PASS; | ||
1907 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1908 | |||
1909 | wrl(mp, SDMA_CONFIG(mp->port_num), PORT_SDMA_CONFIG_DEFAULT_VALUE); | ||
1910 | |||
1911 | /* | ||
1832 | * Configure TX path and queues. | 1912 | * Configure TX path and queues. |
1833 | */ | 1913 | */ |
1834 | tx_set_rate(mp, 1000000000, 16777216); | 1914 | tx_set_rate(mp, 1000000000, 16777216); |
1835 | for (i = 0; i < 8; i++) { | 1915 | for (i = 0; i < 8; i++) { |
1836 | struct tx_queue *txq = mp->txq + i; | 1916 | struct tx_queue *txq = mp->txq + i; |
1837 | int off = TXQ_CURRENT_DESC_PTR(mp->port_num, i); | ||
1838 | u32 addr; | ||
1839 | 1917 | ||
1840 | if ((mp->txq_mask & (1 << i)) == 0) | 1918 | if ((mp->txq_mask & (1 << i)) == 0) |
1841 | continue; | 1919 | continue; |
1842 | 1920 | ||
1843 | addr = (u32)txq->tx_desc_dma; | 1921 | txq_reset_hw_ptr(txq); |
1844 | addr += txq->tx_curr_desc * sizeof(struct tx_desc); | ||
1845 | wrl(mp, off, addr); | ||
1846 | |||
1847 | txq_set_rate(txq, 1000000000, 16777216); | 1922 | txq_set_rate(txq, 1000000000, 16777216); |
1848 | txq_set_fixed_prio_mode(txq); | 1923 | txq_set_fixed_prio_mode(txq); |
1849 | } | 1924 | } |
@@ -1965,6 +2040,9 @@ static int mv643xx_eth_open(struct net_device *dev) | |||
1965 | napi_enable(&mp->napi); | 2040 | napi_enable(&mp->napi); |
1966 | #endif | 2041 | #endif |
1967 | 2042 | ||
2043 | netif_carrier_off(dev); | ||
2044 | netif_stop_queue(dev); | ||
2045 | |||
1968 | port_start(mp); | 2046 | port_start(mp); |
1969 | 2047 | ||
1970 | set_rx_coal(mp, 0); | 2048 | set_rx_coal(mp, 0); |
@@ -1999,8 +2077,14 @@ static void port_reset(struct mv643xx_eth_private *mp) | |||
1999 | if (mp->txq_mask & (1 << i)) | 2077 | if (mp->txq_mask & (1 << i)) |
2000 | txq_disable(mp->txq + i); | 2078 | txq_disable(mp->txq + i); |
2001 | } | 2079 | } |
2002 | while (!(rdl(mp, PORT_STATUS(mp->port_num)) & TX_FIFO_EMPTY)) | 2080 | |
2081 | while (1) { | ||
2082 | u32 ps = rdl(mp, PORT_STATUS(mp->port_num)); | ||
2083 | |||
2084 | if ((ps & (TX_IN_PROGRESS | TX_FIFO_EMPTY)) == TX_FIFO_EMPTY) | ||
2085 | break; | ||
2003 | udelay(10); | 2086 | udelay(10); |
2087 | } | ||
2004 | 2088 | ||
2005 | /* Reset the Enable bit in the Configuration Register */ | 2089 | /* Reset the Enable bit in the Configuration Register */ |
2006 | data = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | 2090 | data = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); |
@@ -2202,7 +2286,8 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev) | |||
2202 | int ret; | 2286 | int ret; |
2203 | 2287 | ||
2204 | if (!mv643xx_eth_version_printed++) | 2288 | if (!mv643xx_eth_version_printed++) |
2205 | printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); | 2289 | printk(KERN_NOTICE "MV-643xx 10/100/1000 ethernet " |
2290 | "driver version %s\n", mv643xx_eth_driver_version); | ||
2206 | 2291 | ||
2207 | ret = -EINVAL; | 2292 | ret = -EINVAL; |
2208 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2293 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -2338,14 +2423,14 @@ static int phy_detect(struct mv643xx_eth_private *mp) | |||
2338 | unsigned int data; | 2423 | unsigned int data; |
2339 | unsigned int data2; | 2424 | unsigned int data2; |
2340 | 2425 | ||
2341 | smi_reg_read(mp, mp->phy_addr, 0, &data); | 2426 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); |
2342 | smi_reg_write(mp, mp->phy_addr, 0, data ^ 0x1000); | 2427 | smi_reg_write(mp, mp->phy_addr, MII_BMCR, data ^ BMCR_ANENABLE); |
2343 | 2428 | ||
2344 | smi_reg_read(mp, mp->phy_addr, 0, &data2); | 2429 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data2); |
2345 | if (((data ^ data2) & 0x1000) == 0) | 2430 | if (((data ^ data2) & BMCR_ANENABLE) == 0) |
2346 | return -ENODEV; | 2431 | return -ENODEV; |
2347 | 2432 | ||
2348 | smi_reg_write(mp, mp->phy_addr, 0, data); | 2433 | smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); |
2349 | 2434 | ||
2350 | return 0; | 2435 | return 0; |
2351 | } | 2436 | } |
@@ -2393,12 +2478,39 @@ static int phy_init(struct mv643xx_eth_private *mp, | |||
2393 | cmd.duplex = pd->duplex; | 2478 | cmd.duplex = pd->duplex; |
2394 | } | 2479 | } |
2395 | 2480 | ||
2396 | update_pscr(mp, cmd.speed, cmd.duplex); | ||
2397 | mv643xx_eth_set_settings(mp->dev, &cmd); | 2481 | mv643xx_eth_set_settings(mp->dev, &cmd); |
2398 | 2482 | ||
2399 | return 0; | 2483 | return 0; |
2400 | } | 2484 | } |
2401 | 2485 | ||
2486 | static void init_pscr(struct mv643xx_eth_private *mp, int speed, int duplex) | ||
2487 | { | ||
2488 | u32 pscr; | ||
2489 | |||
2490 | pscr = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | ||
2491 | if (pscr & SERIAL_PORT_ENABLE) { | ||
2492 | pscr &= ~SERIAL_PORT_ENABLE; | ||
2493 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
2494 | } | ||
2495 | |||
2496 | pscr = MAX_RX_PACKET_9700BYTE | SERIAL_PORT_CONTROL_RESERVED; | ||
2497 | if (mp->phy_addr == -1) { | ||
2498 | pscr |= DISABLE_AUTO_NEG_SPEED_GMII; | ||
2499 | if (speed == SPEED_1000) | ||
2500 | pscr |= SET_GMII_SPEED_TO_1000; | ||
2501 | else if (speed == SPEED_100) | ||
2502 | pscr |= SET_MII_SPEED_TO_100; | ||
2503 | |||
2504 | pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL; | ||
2505 | |||
2506 | pscr |= DISABLE_AUTO_NEG_FOR_DUPLEX; | ||
2507 | if (duplex == DUPLEX_FULL) | ||
2508 | pscr |= SET_FULL_DUPLEX_MODE; | ||
2509 | } | ||
2510 | |||
2511 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
2512 | } | ||
2513 | |||
2402 | static int mv643xx_eth_probe(struct platform_device *pdev) | 2514 | static int mv643xx_eth_probe(struct platform_device *pdev) |
2403 | { | 2515 | { |
2404 | struct mv643xx_eth_platform_data *pd; | 2516 | struct mv643xx_eth_platform_data *pd; |
@@ -2452,6 +2564,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
2452 | } else { | 2564 | } else { |
2453 | SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops_phyless); | 2565 | SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops_phyless); |
2454 | } | 2566 | } |
2567 | init_pscr(mp, pd->speed, pd->duplex); | ||
2455 | 2568 | ||
2456 | 2569 | ||
2457 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 2570 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
@@ -2478,6 +2591,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
2478 | * have to map the buffers to ISA memory which is only 16 MB | 2591 | * have to map the buffers to ISA memory which is only 16 MB |
2479 | */ | 2592 | */ |
2480 | dev->features = NETIF_F_SG | NETIF_F_IP_CSUM; | 2593 | dev->features = NETIF_F_SG | NETIF_F_IP_CSUM; |
2594 | dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM; | ||
2481 | #endif | 2595 | #endif |
2482 | 2596 | ||
2483 | SET_NETDEV_DEV(dev, &pdev->dev); | 2597 | SET_NETDEV_DEV(dev, &pdev->dev); |