aboutsummaryrefslogblamecommitdiffstats
path: root/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
blob: 5180d9d37989000f37e4b45ad98fcb766d39c500 (plain) (tree)
































































































































































































                                                                                
/*
 * BSC9131 Silicon/SoC Device Tree Source (post include)
 *
 * Copyright 2011-2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

&ifc {
	#address-cells = <2>;
	#size-cells = <1>;
	compatible = "fsl,ifc", "simple-bus";
	interrupts = <16 2 0 0 20 2 0 0>;
};

&soc {
	#address-cells = <1>;
	#size-cells = <1>;
	device_type = "soc";
	compatible = "fsl,bsc9131-immr", "simple-bus";
	bus-frequency = <0>;		// Filled out by uboot.

	ecm-law@0 {
		compatible = "fsl,ecm-law";
		reg = <0x0 0x1000>;
		fsl,num-laws = <12>;
	};

	ecm@1000 {
		compatible = "fsl,bsc9131-ecm", "fsl,ecm";
		reg = <0x1000 0x1000>;
		interrupts = <16 2 0 0>;
	};

	memory-controller@2000 {
		compatible = "fsl,bsc9131-memory-controller";
		reg = <0x2000 0x1000>;
		interrupts = <16 2 0 0>;
	};

/include/ "pq3-i2c-0.dtsi"
	i2c@3000 {
		interrupts = <17 2 0 0>;
	};

/include/ "pq3-i2c-1.dtsi"
	i2c@3100 {
		interrupts = <17 2 0 0>;
	};

/include/ "pq3-duart-0.dtsi"
	serial0: serial@4500 {
		interrupts = <18 2 0 0>;
	};

	serial1: serial@4600 {
		interrupts = <18 2 0 0 >;
	};
/include/ "pq3-espi-0.dtsi"
	spi0: spi@7000 {
		fsl,espi-num-chipselects = <1>;
		interrupts = <22 0x2 0 0>;
	};

/include/ "pq3-gpio-0.dtsi"
	gpio-controller@f000 {
		interrupts = <19 0x2 0 0>;
		};

	L2: l2-cache-controller@20000 {
		compatible = "fsl,bsc9131-l2-cache-controller";
		reg = <0x20000 0x1000>;
		cache-line-size = <32>;	// 32 bytes
		cache-size = <0x40000>; // L2,256K
		interrupts = <16 2 0 0>;
	};

/include/ "pq3-dma-0.dtsi"

dma@21300 {

	dma-channel@0 {
		interrupts = <62 2 0 0>;
	};

	dma-channel@80 {
		interrupts = <63 2 0 0>;
	};

	dma-channel@100 {
		interrupts = <64 2 0 0>;
	};

	dma-channel@180 {
		interrupts = <65 2 0 0>;
	};
};

/include/ "pq3-usb2-dr-0.dtsi"
usb@22000 {
	compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
	interrupts = <40 0x2 0 0>;
};

/include/ "pq3-esdhc-0.dtsi"
	sdhc@2e000 {
		fsl,sdhci-auto-cmd12;
		interrupts = <41 0x2 0 0>;
	};

/include/ "pq3-sec4.4-0.dtsi"
crypto@30000 {
	interrupts	 = <57 2 0 0>;

	sec_jr0: jr@1000 {
		interrupts	 = <58 2 0 0>;
	};

	sec_jr1: jr@2000 {
		interrupts	 = <59 2 0 0>;
	};

	sec_jr2: jr@3000 {
		interrupts	 = <60 2 0 0>;
	};

	sec_jr3: jr@4000 {
		interrupts	 = <61 2 0 0>;
	};
};

/include/ "pq3-mpic.dtsi"

timer@41100 {
	compatible = "fsl,mpic-v1.2-msgr", "fsl,mpic-msg";
	reg = <0x41400 0x200>;
	interrupts = <
		0xb0 2
		0xb1 2
		0xb2 2
		0xb3 2>;
};

/include/ "pq3-etsec2-0.dtsi"
enet0: ethernet@b0000 {
	queue-group@b0000 {
		fsl,rx-bit-map = <0xff>;
		fsl,tx-bit-map = <0xff>;
		interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
	};
};

/include/ "pq3-etsec2-1.dtsi"
enet1: ethernet@b1000 {
	queue-group@b1000 {
		fsl,rx-bit-map = <0xff>;
		fsl,tx-bit-map = <0xff>;
		interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
	};
};

global-utilities@e0000 {
		compatible = "fsl,bsc9131-guts";
		reg = <0xe0000 0x1000>;
		fsl,has-rstcr;
	};
};