<feed xmlns='http://www.w3.org/2005/Atom'>
<title>litmus-rt.git/include/uapi/linux/serial_core.h, branch v2015.1</title>
<subtitle>The LITMUS^RT kernel.</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/'/>
<entry>
<title>serial: driver for ETRAX FS UART</title>
<updated>2015-02-07T10:43:16+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>nks@flawful.org</email>
</author>
<published>2015-02-02T22:19:20+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=692132b5b1c5ce97076915d4aed0c61513e18b03'/>
<id>692132b5b1c5ce97076915d4aed0c61513e18b03</id>
<content type='text'>
This is the last missing piece to get a kernel booting to a prompt in qemu-cris.

Signed-off-by: Niklas Cassel &lt;nks@flawful.org&gt;
Acked-by: Jesper Nilsson &lt;jesper.nilsson@axis.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is the last missing piece to get a kernel booting to a prompt in qemu-cris.

Signed-off-by: Niklas Cassel &lt;nks@flawful.org&gt;
Acked-by: Jesper Nilsson &lt;jesper.nilsson@axis.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty/serial: Add Spreadtrum sc9836-uart driver support</title>
<updated>2015-02-02T18:11:28+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2015-01-28T11:08:44+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=b7396a38fb28db4ebbbf35da1057eb5206b4ad6c'/>
<id>b7396a38fb28db4ebbbf35da1057eb5206b4ad6c</id>
<content type='text'>
Add a full sc9836-uart driver for SC9836 SoC which is based on the
spreadtrum sharkl64 platform.
This driver also support earlycon.

Originally-by: Lanqing Liu &lt;lanqing.liu@spreadtrum.com&gt;
Signed-off-by: Orson Zhai &lt;orson.zhai@spreadtrum.com&gt;
Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a full sc9836-uart driver for SC9836 SoC which is based on the
spreadtrum sharkl64 platform.
This driver also support earlycon.

Originally-by: Lanqing Liu &lt;lanqing.liu@spreadtrum.com&gt;
Signed-off-by: Orson Zhai &lt;orson.zhai@spreadtrum.com&gt;
Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: 8250: Add 64byte UART support for FSL platforms</title>
<updated>2015-01-09T22:33:04+00:00</updated>
<author>
<name>Vijay Rai</name>
<email>vijay.rai@freescale.com</email>
</author>
<published>2015-01-05T15:44:42+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=fddceb8b5399083bcc042266f188116cc779fc80'/>
<id>fddceb8b5399083bcc042266f188116cc779fc80</id>
<content type='text'>
Some of FSL SoCs like T1040 has new version of UART controller which
can support 64byte FiFo.
To enable 64 byte support, following needs to be done:
-FCR[EN64] needs to be programmed to 1 to enable it.
-Also, when FCR[EN64]==1, RTL bits to be used as below
to define various Receive Trigger Levels:
        -FCR[RTL] = 00  1 byte
        -FCR[RTL] = 01  16 bytes
        -FCR[RTL] = 10  32 bytes
        -FCR[RTL] = 11  56 bytes
-tx_loadsz is set to 63-bytes instead of 64-bytes to implement
 workaround of errata A-008006 which states that tx_loadsz should
 be configured less than Maximum supported fifo bytes

Signed-off-by: Vijay Rai &lt;vijay.rai@freescale.com&gt;
Signed-off-by: Priyanka Jain &lt;Priyanka.Jain@freescale.com&gt;
Signed-off-by: Poonam Aggrwal &lt;poonam.aggrwal@freescale.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some of FSL SoCs like T1040 has new version of UART controller which
can support 64byte FiFo.
To enable 64 byte support, following needs to be done:
-FCR[EN64] needs to be programmed to 1 to enable it.
-Also, when FCR[EN64]==1, RTL bits to be used as below
to define various Receive Trigger Levels:
        -FCR[RTL] = 00  1 byte
        -FCR[RTL] = 01  16 bytes
        -FCR[RTL] = 10  32 bytes
        -FCR[RTL] = 11  56 bytes
-tx_loadsz is set to 63-bytes instead of 64-bytes to implement
 workaround of errata A-008006 which states that tx_loadsz should
 be configured less than Maximum supported fifo bytes

Signed-off-by: Vijay Rai &lt;vijay.rai@freescale.com&gt;
Signed-off-by: Priyanka Jain &lt;Priyanka.Jain@freescale.com&gt;
Signed-off-by: Poonam Aggrwal &lt;poonam.aggrwal@freescale.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: driver for Conexant Digicolor USART</title>
<updated>2015-01-09T22:30:16+00:00</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2014-12-18T19:45:24+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=5930cb3511dfb4392de1180c892b353316ef29ec'/>
<id>5930cb3511dfb4392de1180c892b353316ef29ec</id>
<content type='text'>
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: of: add a PORT_RT2880 definition</title>
<updated>2014-11-06T22:57:18+00:00</updated>
<author>
<name>John Crispin</name>
<email>blogic@openwrt.org</email>
</author>
<published>2014-10-16T19:48:21+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=9b8777e3473e31b2aabd669e5f34866d4a3afb6a'/>
<id>9b8777e3473e31b2aabd669e5f34866d4a3afb6a</id>
<content type='text'>
The Ralink RT2880 SoC and its successors have an internal 8250 core. This core
needs the same quirks applied as the AMD AU1xxx uart. In addition to these
quirks, the ports memory region is only 0x100 unlike the AU1xxx which has a
size of 0x1000.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Ralink RT2880 SoC and its successors have an internal 8250 core. This core
needs the same quirks applied as the AMD AU1xxx uart. In addition to these
quirks, the ports memory region is only 0x100 unlike the AU1xxx which has a
size of 0x1000.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: meson: serial: add MesonX SoC on-chip uart driver</title>
<updated>2014-09-08T23:12:40+00:00</updated>
<author>
<name>Carlo Caione</name>
<email>carlo@caione.org</email>
</author>
<published>2014-08-17T10:49:49+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=ff7693d079e58fb62d735b7b8085b53fcfb74528'/>
<id>ff7693d079e58fb62d735b7b8085b53fcfb74528</id>
<content type='text'>
The SoC has four fully functional UARTs which use the same programming
model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On)
which cannot be powered off.

Signed-off-by: Carlo Caione &lt;carlo@caione.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SoC has four fully functional UARTs which use the same programming
model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On)
which cannot be powered off.

Signed-off-by: Carlo Caione &lt;carlo@caione.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sc16is7xx</title>
<updated>2014-04-25T17:08:48+00:00</updated>
<author>
<name>Jon Ringle</name>
<email>jringle@gridpoint.com</email>
</author>
<published>2014-04-25T00:56:06+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=dfeae619d781dee61666d5551b93ba3be755a86b'/>
<id>dfeae619d781dee61666d5551b93ba3be755a86b</id>
<content type='text'>
The SC16IS7xx is a slave I2C-bus/SPI interface to a single-channel
high performance UART. The SC16IS7xx's internal register set is
backward-compatible with the widely used and widely popular 16C450.

The SC16IS7xx also provides additional advanced features such as
auto hardware and software flow control, automatic RS-485 support, and
software reset.

Signed-off-by: Jon Ringle &lt;jringle@gridpoint.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SC16IS7xx is a slave I2C-bus/SPI interface to a single-channel
high performance UART. The SC16IS7xx's internal register set is
backward-compatible with the widely used and widely popular 16C450.

The SC16IS7xx also provides additional advanced features such as
auto hardware and software flow control, automatic RS-485 support, and
software reset.

Signed-off-by: Jon Ringle &lt;jringle@gridpoint.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: Add driver for MEN's 16z135 High Speed UART.</title>
<updated>2014-04-24T23:24:25+00:00</updated>
<author>
<name>Johannes Thumshirn</name>
<email>johannes.thumshirn@men.de</email>
</author>
<published>2014-04-17T13:47:58+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=e264ebf4c81ac733642ed03ee3f0e26914ed3714'/>
<id>e264ebf4c81ac733642ed03ee3f0e26914ed3714</id>
<content type='text'>
Add driver for MEN's 16z135 High Speed UART.

The 16z135 is a memory mapped UART Core on an MCB FPGA and has 1024 byte
deep FIFO buffers for the RX and TX path. It also has configurable FIFO
fill level IRQs and data copied to and from the hardware has to be
acknowledged.

Signed-off-by: Johannes Thumshirn &lt;johannes.thumshirn@men.de&gt;
Reviewed-by: Alan Cox &lt;gnomes@lxorguk.ukuu.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver for MEN's 16z135 High Speed UART.

The 16z135 is a memory mapped UART Core on an MCB FPGA and has 1024 byte
deep FIFO buffers for the RX and TX path. It also has configurable FIFO
fill level IRQs and data copied to and from the hardware has to be
acknowledged.

Signed-off-by: Johannes Thumshirn &lt;johannes.thumshirn@men.de&gt;
Reviewed-by: Alan Cox &lt;gnomes@lxorguk.ukuu.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: xuartps: Rebrand driver as Cadence UART</title>
<updated>2014-04-24T23:21:51+00:00</updated>
<author>
<name>Soren Brinkmann</name>
<email>soren.brinkmann@xilinx.com</email>
</author>
<published>2014-04-05T00:23:43+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=d9bb3fb12685209765fd838bec69d701d7b479e5'/>
<id>d9bb3fb12685209765fd838bec69d701d7b479e5</id>
<content type='text'>
Zynq's UART is Cadence IP. Make this visible in the prompt in kconfig
and additional comments in the driver.
This also renames functions and symbols, as far as possible without
breaking user space API, to reflect the Cadence origin. This is achieved
through simple search and replace:
 - s/XUARTPS/CDNS_UART/g
 - s/xuartps/cdns_uart/g
The only exceptions are PORT_XUARTPS and the driver name, which stay as is,
due to their exposure to user space. As well as the - no legacy -
compatibility string 'xlnx,xuartps'

Signed-off-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Zynq's UART is Cadence IP. Make this visible in the prompt in kconfig
and additional comments in the driver.
This also renames functions and symbols, as far as possible without
breaking user space API, to reflect the Cadence origin. This is achieved
through simple search and replace:
 - s/XUARTPS/CDNS_UART/g
 - s/xuartps/cdns_uart/g
The only exceptions are PORT_XUARTPS and the driver name, which stay as is,
due to their exposure to user space. As well as the - no legacy -
compatibility string 'xlnx,xuartps'

Signed-off-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile</title>
<updated>2013-09-06T18:14:33+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-09-06T18:14:33+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=4de9ad9bc08b4953fc03336ad38908496e2f8826'/>
<id>4de9ad9bc08b4953fc03336ad38908496e2f8826</id>
<content type='text'>
Pull Tile arch updates from Chris Metcalf:
 "These changes bring in a bunch of new functionality that has been
  maintained internally at Tilera over the last year, plus other stray
  bits of work that I've taken into the tile tree from other folks.

  The changes include some PCI root complex work, interrupt-driven
  console support, support for performing fast-path unaligned data
  fixups by kernel-based JIT code generation, CONFIG_PREEMPT support,
  vDSO support for gettimeofday(), a serial driver for the tilegx
  on-chip UART, KGDB support, more optimized string routines, support
  for ftrace and kprobes, improved ASLR, and many bug fixes.

  We also remove support for the old TILE64 chip, which is no longer
  buildable"

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (85 commits)
  tile: refresh tile defconfig files
  tile: rework &lt;asm/cmpxchg.h&gt;
  tile PCI RC: make default consistent DMA mask 32-bit
  tile: add null check for kzalloc in tile/kernel/setup.c
  tile: make __write_once a synonym for __read_mostly
  tile: remove support for TILE64
  tile: use asm-generic/bitops/builtin-*.h
  tile: eliminate no-op "noatomichash" boot argument
  tile: use standard tile_bundle_bits type in traps.c
  tile: simplify code referencing hypervisor API addresses
  tile: change &lt;asm/system.h&gt; to &lt;asm/switch_to.h&gt; in comments
  tile: mark pcibios_init() as __init
  tile: check for correct compiler earlier in asm-offsets.c
  tile: use standard 'generic-y' model for &lt;asm/hw_irq.h&gt;
  tile: use asm-generic version of &lt;asm/local64.h&gt;
  tile PCI RC: add comment about "PCI hole" problem
  tile: remove DEBUG_EXTRA_FLAGS kernel config option
  tile: add virt_to_kpte() API and clean up and document behavior
  tile: support FRAME_POINTER
  tile: support reporting Tilera hypervisor statistics
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull Tile arch updates from Chris Metcalf:
 "These changes bring in a bunch of new functionality that has been
  maintained internally at Tilera over the last year, plus other stray
  bits of work that I've taken into the tile tree from other folks.

  The changes include some PCI root complex work, interrupt-driven
  console support, support for performing fast-path unaligned data
  fixups by kernel-based JIT code generation, CONFIG_PREEMPT support,
  vDSO support for gettimeofday(), a serial driver for the tilegx
  on-chip UART, KGDB support, more optimized string routines, support
  for ftrace and kprobes, improved ASLR, and many bug fixes.

  We also remove support for the old TILE64 chip, which is no longer
  buildable"

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (85 commits)
  tile: refresh tile defconfig files
  tile: rework &lt;asm/cmpxchg.h&gt;
  tile PCI RC: make default consistent DMA mask 32-bit
  tile: add null check for kzalloc in tile/kernel/setup.c
  tile: make __write_once a synonym for __read_mostly
  tile: remove support for TILE64
  tile: use asm-generic/bitops/builtin-*.h
  tile: eliminate no-op "noatomichash" boot argument
  tile: use standard tile_bundle_bits type in traps.c
  tile: simplify code referencing hypervisor API addresses
  tile: change &lt;asm/system.h&gt; to &lt;asm/switch_to.h&gt; in comments
  tile: mark pcibios_init() as __init
  tile: check for correct compiler earlier in asm-offsets.c
  tile: use standard 'generic-y' model for &lt;asm/hw_irq.h&gt;
  tile: use asm-generic version of &lt;asm/local64.h&gt;
  tile PCI RC: add comment about "PCI hole" problem
  tile: remove DEBUG_EXTRA_FLAGS kernel config option
  tile: add virt_to_kpte() API and clean up and document behavior
  tile: support FRAME_POINTER
  tile: support reporting Tilera hypervisor statistics
  ...
</pre>
</div>
</content>
</entry>
</feed>
