litmus-rt.git/drivers/gpio, branch linux-tip

cs5535-gpio: apply CS5536 errata workaround for GPIOs

2010-12-02T22:51:15+00:00

The AMD Geode CS5536 Companion Device Silicon Revision B1 Specification
Update mentions the follow as issue #36:

 "Atomic write transactions to the atomic GPIO High Bank Feature Bit
  registers should only affect the bits selected [...]"

 "after Suspend, an atomic write transaction [...] will clear all
  non-selected bits of the accessed register."

In other words, writing to the high bank for a single GPIO bit will
clear every other GPIO bit (but only sometimes after a suspend).

The workaround described is obvious and simple; do a read-modify-write.
This patch does that, and documents why we're doing it.

Signed-off-by: Andres Salomon 
Cc: 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

gpio: Add VIA VX855 GPIO driver

2010-10-28T22:29:51+00:00

This is needed for supporting the upcoming VX855 camera and OLPC DCON
drivers, as well as the advanced viafb features on non-OLPC hardware
based on this chip.

Based on earlier work by Harald Welte.

Signed-off-by: Daniel Drake 
Signed-off-by: Samuel Ortiz

gpio: Fix stmpe error path

2010-10-28T22:29:32+00:00

Free allocated memory.  Call stmpe_disable() if it was enabled.

Signed-off-by: Vasiliy Kulikov 
Acked-by: Wolfram Sang 
Acked-by: Rabin Vincent 
Signed-off-by: Samuel Ortiz

gpio: Handle stmpe-gpio platform data with no gpio base

2010-10-28T22:29:18+00:00

This patch removes the requirement that gpio base be supplied in
platform data.

Signed-off-by: Virupax Sadashivpetimath 
Acked-by: Linus Walleij 
Acked-by: Wolfram Sang 
Signed-off-by: Samuel Ortiz

gpio: Add bitmask to block requests to unavailable stmpe GPIOs

2010-10-28T22:28:43+00:00

GPIOs on these controller are multi-functional. If you decided to use
some of them e.g. as input channels for the ADC, you surely don't want
those pins to be reassigned as simple GPIOs (which may be triggered even
from userspace via 'export'). Same for the touchscreen controller pins.
Since knowledge about the hardware is needed to decide which GPIOs to
reserve, let this bitmask be inside platform_data and provide some
defines to assist potential users.

Signed-off-by: Wolfram Sang 
Acked-by: Rabin Vincent 
Cc: Linus Walleij 
Signed-off-by: Samuel Ortiz

gpiolib: Hook up WM8994 gpio_to_irq()

2010-10-28T22:28:39+00:00

Not sure where this went.

Signed-off-by: Mark Brown 
Signed-off-by: Samuel Ortiz

langwell_gpio: add support for whitney point

2010-10-28T01:03:07+00:00

In this case the logic is very similar but the IRQs are not exposed and
the device is not picked up via PCI

Based on a separate internal whitney point driver by Yin Kangkai.

Signed-off-by: Alan Cox 
Cc: Yin Kangkai 
Cc: Alek Du 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

drivers/gpio/langwell_gpio.c: remove semicolons after function definitions

2010-10-28T01:03:07+00:00

Deweird this driver.

Cc: Alek Du 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

gpio: add Topcliff PCH GPIO driver

2010-10-28T01:03:07+00:00

Topcliff PCH is the platform controller hub that is going to be used in
Intel's upcoming general embedded platform.  All IO peripherals in
Topcliff PCH are actually devices sitting on AMBA bus.  Topcliff PCH has
GPIO I/F.  Using this I/F, it is able to access system devices connected
to GPIO.

[akpm@linux-foundation.org: ese DEFINE_PCI_DEVICE_TABLE (per Joe Perches)]
Signed-off-by: Tomoya MORINAGA 
Reviewed-by: Mark Brown 
Cc: Rabin Vincent 
Cc: Samuel Ortiz 
Cc: Linus Walleij 
Cc: Tomoya MORINAGA 
Cc: Joe Perches 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

gpio: adp5588-gpio: support interrupt controller

2010-10-28T01:03:07+00:00

Implement irq_chip functionality on ADP5588/5587 GPIO expanders.  Only
level sensitive interrupts are supported.  Interrupts provided by this
irq_chip must be requested using request_threaded_irq().

Signed-off-by: Michael Hennerich 
Signed-off-by: Mike Frysinger 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds