<feed xmlns='http://www.w3.org/2005/Atom'>
<title>litmus-rt.git/arch/x86/kernel, branch master</title>
<subtitle>The LITMUS^RT kernel.</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/'/>
<entry>
<title>Revert "Add hrtimer_start_on() support"</title>
<updated>2016-02-08T03:11:15+00:00</updated>
<author>
<name>Pratyush Patel</name>
<email>pratyushpatel.1995@gmail.com</email>
</author>
<published>2016-02-08T03:11:15+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=ce90c1d314b15359d0595918c7dfa0ec1f5b9bb6'/>
<id>ce90c1d314b15359d0595918c7dfa0ec1f5b9bb6</id>
<content type='text'>
This reverts commit 5014e7011964ff46b2d73cf91a05ed9eed5a8fa2.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 5014e7011964ff46b2d73cf91a05ed9eed5a8fa2.
</pre>
</div>
</content>
</entry>
<entry>
<title>Integrate preemption state machine with Linux scheduler</title>
<updated>2015-08-09T10:21:19+00:00</updated>
<author>
<name>Bjoern Brandenburg</name>
<email>bbb@mpi-sws.org</email>
</author>
<published>2015-08-09T11:18:49+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=0db6e11e49f7bc4893ffff4d8a7af1235894d986'/>
<id>0db6e11e49f7bc4893ffff4d8a7af1235894d986</id>
<content type='text'>
Track when a processor is going to schedule "soon".
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Track when a processor is going to schedule "soon".
</pre>
</div>
</content>
</entry>
<entry>
<title>Add hrtimer_start_on() support</title>
<updated>2015-08-09T10:21:17+00:00</updated>
<author>
<name>Bjoern Brandenburg</name>
<email>bbb@mpi-sws.org</email>
</author>
<published>2015-08-09T11:18:46+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=5014e7011964ff46b2d73cf91a05ed9eed5a8fa2'/>
<id>5014e7011964ff46b2d73cf91a05ed9eed5a8fa2</id>
<content type='text'>
This patch adds hrtimer_start_on(), which allows arming timers on
remote CPUs.  This is needed to avoided timer interrupts on "shielded"
CPUs and is also useful for implementing semi-partitioned schedulers.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds hrtimer_start_on(), which allows arming timers on
remote CPUs.  This is needed to avoided timer interrupts on "shielded"
CPUs and is also useful for implementing semi-partitioned schedulers.
</pre>
</div>
</content>
</entry>
<entry>
<title>Feather-Trace: add x86 binary rewriting implementation</title>
<updated>2015-08-09T10:21:16+00:00</updated>
<author>
<name>Bjoern Brandenburg</name>
<email>bbb@mpi-sws.org</email>
</author>
<published>2015-08-09T11:18:44+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=ee573d8bfbd6397051f46fd3e52f0aa45b30a887'/>
<id>ee573d8bfbd6397051f46fd3e52f0aa45b30a887</id>
<content type='text'>
This patch adds the x86-specific implementation of Feather-Trace
triggers that works by rewriting jump instructions.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds the x86-specific implementation of Feather-Trace
triggers that works by rewriting jump instructions.
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Honor the architectural performance monitoring version</title>
<updated>2015-06-29T19:35:28+00:00</updated>
<author>
<name>Palik, Imre</name>
<email>imrep@amazon.de</email>
</author>
<published>2015-06-08T12:46:49+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=b675101824a103b3cf8f05c407a53ad50f987730'/>
<id>b675101824a103b3cf8f05c407a53ad50f987730</id>
<content type='text'>
commit 2c33645d366d13b969d936b68b9f4875b1fdddea upstream.

Architectural performance monitoring, version 1, doesn't support fixed counters.

Currently, even if a hypervisor advertises support for architectural
performance monitoring version 1, perf may still try to use the fixed
counters, as the constraints are set up based on the CPU model.

This patch ensures that perf honors the architectural performance monitoring
version returned by CPUID, and it only uses the fixed counters for version 2
and above.

(Some of the ideas in this patch came from Peter Zijlstra.)

Signed-off-by: Imre Palik &lt;imrep@amazon.de&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Anthony Liguori &lt;aliguori@amazon.com&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Oleg Nesterov &lt;oleg@redhat.com&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1433767609-1039-1-git-send-email-imrep.amz@gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 2c33645d366d13b969d936b68b9f4875b1fdddea upstream.

Architectural performance monitoring, version 1, doesn't support fixed counters.

Currently, even if a hypervisor advertises support for architectural
performance monitoring version 1, perf may still try to use the fixed
counters, as the constraints are set up based on the CPU model.

This patch ensures that perf honors the architectural performance monitoring
version returned by CPUID, and it only uses the fixed counters for version 2
and above.

(Some of the ideas in this patch came from Peter Zijlstra.)

Signed-off-by: Imre Palik &lt;imrep@amazon.de&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Anthony Liguori &lt;aliguori@amazon.com&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Oleg Nesterov &lt;oleg@redhat.com&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1433767609-1039-1-git-send-email-imrep.amz@gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/intel/bts: Fix DS area sharing with x86_pmu events</title>
<updated>2015-06-29T19:35:28+00:00</updated>
<author>
<name>Alexander Shishkin</name>
<email>alexander.shishkin@linux.intel.com</email>
</author>
<published>2015-06-11T12:13:56+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=55c9e52cf3b056109ab84de8d2a5b4b6e0a4cefa'/>
<id>55c9e52cf3b056109ab84de8d2a5b4b6e0a4cefa</id>
<content type='text'>
commit 6b099d9b040b0f3d0aec05b560d7caf879af5077 upstream.

Currently, the intel_bts driver relies on the DS area allocated by the x86_pmu
code in its event_init() path, which is a bug: creating a BTS event while
no x86_pmu events are present results in a NULL pointer dereference.

The same DS area is also used by PEBS sampling, which makes it quite a bit
trickier to have a separate one for intel_bts' purposes.

This patch makes intel_bts driver use the same DS allocation and reference
counting code as x86_pmu to make sure it is always present when either
intel_bts or x86_pmu need it.

Signed-off-by: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Oleg Nesterov &lt;oleg@redhat.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: acme@infradead.org
Cc: adrian.hunter@intel.com
Link: http://lkml.kernel.org/r/1434024837-9916-2-git-send-email-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 6b099d9b040b0f3d0aec05b560d7caf879af5077 upstream.

Currently, the intel_bts driver relies on the DS area allocated by the x86_pmu
code in its event_init() path, which is a bug: creating a BTS event while
no x86_pmu events are present results in a NULL pointer dereference.

The same DS area is also used by PEBS sampling, which makes it quite a bit
trickier to have a separate one for intel_bts' purposes.

This patch makes intel_bts driver use the same DS allocation and reference
counting code as x86_pmu to make sure it is always present when either
intel_bts or x86_pmu need it.

Signed-off-by: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Oleg Nesterov &lt;oleg@redhat.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: acme@infradead.org
Cc: adrian.hunter@intel.com
Link: http://lkml.kernel.org/r/1434024837-9916-2-git-send-email-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Add more Broadwell model numbers</title>
<updated>2015-06-29T19:35:28+00:00</updated>
<author>
<name>Andi Kleen</name>
<email>ak@linux.intel.com</email>
</author>
<published>2015-06-11T20:52:22+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=0432ca1ad0d399d40db32c4364143b1d741e18c5'/>
<id>0432ca1ad0d399d40db32c4364143b1d741e18c5</id>
<content type='text'>
commit 4b36f1a4139c9284df74c0f5d7655603d67807df upstream.

This patch adds additional model numbers for Broadwell to perf.
Support for Broadwell with Iris Pro (Intel Core i7-57xxC)
and support for Broadwell Server Xeon.

Signed-off-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Oleg Nesterov &lt;oleg@redhat.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1434055942-28253-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 4b36f1a4139c9284df74c0f5d7655603d67807df upstream.

This patch adds additional model numbers for Broadwell to perf.
Support for Broadwell with Iris Pro (Intel Core i7-57xxC)
and support for Broadwell Server Xeon.

Signed-off-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Oleg Nesterov &lt;oleg@redhat.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1434055942-28253-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>x86/boot: Fix overflow warning with 32-bit binutils</title>
<updated>2015-06-29T19:35:28+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@alien8.de</email>
</author>
<published>2015-06-19T11:49:06+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=51fbd77c171936aed07cf5081741d8e3437d683b'/>
<id>51fbd77c171936aed07cf5081741d8e3437d683b</id>
<content type='text'>
commit 04c17341b42699a5859a8afa05e64ba08a4e5235 upstream.

When building the kernel with 32-bit binutils built with support
only for the i386 target, we get the following warning:

  arch/x86/kernel/head_32.S:66: Warning: shift count out of range (32 is not between 0 and 31)

The problem is that in that case, binutils' internal type
representation is 32-bit wide and the shift range overflows.

In order to fix this, manipulate the shift expression which
creates the 4GiB constant to not overflow the shift count.

Suggested-by: Michael Matz &lt;matz@suse.de&gt;
Reported-and-tested-by: Enrico Mioso &lt;mrkiko.rs@gmail.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 04c17341b42699a5859a8afa05e64ba08a4e5235 upstream.

When building the kernel with 32-bit binutils built with support
only for the i386 target, we get the following warning:

  arch/x86/kernel/head_32.S:66: Warning: shift count out of range (32 is not between 0 and 31)

The problem is that in that case, binutils' internal type
representation is 32-bit wide and the shift range overflows.

In order to fix this, manipulate the shift expression which
creates the 4GiB constant to not overflow the shift count.

Suggested-by: Michael Matz &lt;matz@suse.de&gt;
Reported-and-tested-by: Enrico Mioso &lt;mrkiko.rs@gmail.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "perf/x86/intel/uncore: Move uncore_box_init() out of driver initialization"</title>
<updated>2015-06-09T09:44:37+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2015-06-09T09:40:28+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=15c1247953e8a45232ed5a5540f291d2d0a77665'/>
<id>15c1247953e8a45232ed5a5540f291d2d0a77665</id>
<content type='text'>
This reverts commit c05199e5a57a579fea1e8fa65e2b511ceb524ffc.

Vince Weaver reported the following crash while perf fuzzing:

[   79.473121] kernel BUG at mm/vmalloc.c:1335!
[   79.694391] Call Trace:
[   79.696997]  &lt;IRQ&gt;
[   79.699090]  [&lt;ffffffff811b2130&gt;] get_vm_area_caller+0x40/0x50
[   79.705505]  [&lt;ffffffff81039f4d&gt;] ? snb_uncore_imc_init_box+0x6d/0x90
[   79.712414]  [&lt;ffffffff810635e5&gt;] __ioremap_caller+0x195/0x350
[   79.718610]  [&lt;ffffffff81039f4d&gt;] ? snb_uncore_imc_init_box+0x6d/0x90
[   79.725462]  [&lt;ffffffff81427f6b&gt;] ? debug_object_activate+0x14b/0x1e0
[   79.732346]  [&lt;ffffffff810637b7&gt;] ioremap_nocache+0x17/0x20
[   79.738283]  [&lt;ffffffff81039f4d&gt;] snb_uncore_imc_init_box+0x6d/0x90
[   79.744945]  [&lt;ffffffff81039cf7&gt;] snb_uncore_imc_event_start+0xb7/0x110
[   79.752020]  [&lt;ffffffff81039d97&gt;] snb_uncore_imc_event_add+0x47/0x60
[   79.758832]  [&lt;ffffffff81162cbb&gt;] event_sched_in.isra.85+0xfb/0x330
[   79.765519]  [&lt;ffffffff81162f5f&gt;] group_sched_in+0x6f/0x1e0
[   79.771481]  [&lt;ffffffff8101df1a&gt;] ? native_sched_clock+0x2a/0x90
[   79.777858]  [&lt;ffffffff811637bc&gt;] __perf_event_enable+0x25c/0x2a0
[   79.784418]  [&lt;ffffffff810f3e69&gt;] ? tick_nohz_irq_exit+0x29/0x30
[   79.790820]  [&lt;ffffffff8115ef30&gt;] ? cpu_clock_event_start+0x40/0x40
[   79.797546]  [&lt;ffffffff8115ef80&gt;] remote_function+0x50/0x60
[   79.803535]  [&lt;ffffffff810f8cd1&gt;] flush_smp_call_function_queue+0x81/0x180
[   79.810840]  [&lt;ffffffff810f9763&gt;] generic_smp_call_function_single_interrupt+0x13/0x60
[   79.819328]  [&lt;ffffffff8104b5e8&gt;] smp_trace_call_function_single_interrupt+0x38/0xc0
[   79.827614]  [&lt;ffffffff816de9be&gt;] trace_call_function_single_interrupt+0x6e/0x80
[   79.835465]  &lt;EOI&gt;
[   79.837543]  [&lt;ffffffff8156e8b5&gt;] ? cpuidle_enter_state+0x65/0x160
[   79.844377]  [&lt;ffffffff8156e8a1&gt;] ? cpuidle_enter_state+0x51/0x160
[   79.851015]  [&lt;ffffffff8156e9e7&gt;] cpuidle_enter+0x17/0x20
[   79.856791]  [&lt;ffffffff810b6e39&gt;] cpu_startup_entry+0x399/0x440
[   79.863165]  [&lt;ffffffff816c9ddb&gt;] rest_init+0xbb/0xd0

The offending commit is clearly confused as it moves heavy initialization
work into IPI context.

Revert it.

Reported-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Kan Liang &lt;kan.liang@intel.com&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit c05199e5a57a579fea1e8fa65e2b511ceb524ffc.

Vince Weaver reported the following crash while perf fuzzing:

[   79.473121] kernel BUG at mm/vmalloc.c:1335!
[   79.694391] Call Trace:
[   79.696997]  &lt;IRQ&gt;
[   79.699090]  [&lt;ffffffff811b2130&gt;] get_vm_area_caller+0x40/0x50
[   79.705505]  [&lt;ffffffff81039f4d&gt;] ? snb_uncore_imc_init_box+0x6d/0x90
[   79.712414]  [&lt;ffffffff810635e5&gt;] __ioremap_caller+0x195/0x350
[   79.718610]  [&lt;ffffffff81039f4d&gt;] ? snb_uncore_imc_init_box+0x6d/0x90
[   79.725462]  [&lt;ffffffff81427f6b&gt;] ? debug_object_activate+0x14b/0x1e0
[   79.732346]  [&lt;ffffffff810637b7&gt;] ioremap_nocache+0x17/0x20
[   79.738283]  [&lt;ffffffff81039f4d&gt;] snb_uncore_imc_init_box+0x6d/0x90
[   79.744945]  [&lt;ffffffff81039cf7&gt;] snb_uncore_imc_event_start+0xb7/0x110
[   79.752020]  [&lt;ffffffff81039d97&gt;] snb_uncore_imc_event_add+0x47/0x60
[   79.758832]  [&lt;ffffffff81162cbb&gt;] event_sched_in.isra.85+0xfb/0x330
[   79.765519]  [&lt;ffffffff81162f5f&gt;] group_sched_in+0x6f/0x1e0
[   79.771481]  [&lt;ffffffff8101df1a&gt;] ? native_sched_clock+0x2a/0x90
[   79.777858]  [&lt;ffffffff811637bc&gt;] __perf_event_enable+0x25c/0x2a0
[   79.784418]  [&lt;ffffffff810f3e69&gt;] ? tick_nohz_irq_exit+0x29/0x30
[   79.790820]  [&lt;ffffffff8115ef30&gt;] ? cpu_clock_event_start+0x40/0x40
[   79.797546]  [&lt;ffffffff8115ef80&gt;] remote_function+0x50/0x60
[   79.803535]  [&lt;ffffffff810f8cd1&gt;] flush_smp_call_function_queue+0x81/0x180
[   79.810840]  [&lt;ffffffff810f9763&gt;] generic_smp_call_function_single_interrupt+0x13/0x60
[   79.819328]  [&lt;ffffffff8104b5e8&gt;] smp_trace_call_function_single_interrupt+0x38/0xc0
[   79.827614]  [&lt;ffffffff816de9be&gt;] trace_call_function_single_interrupt+0x6e/0x80
[   79.835465]  &lt;EOI&gt;
[   79.837543]  [&lt;ffffffff8156e8b5&gt;] ? cpuidle_enter_state+0x65/0x160
[   79.844377]  [&lt;ffffffff8156e8a1&gt;] ? cpuidle_enter_state+0x51/0x160
[   79.851015]  [&lt;ffffffff8156e9e7&gt;] cpuidle_enter+0x17/0x20
[   79.856791]  [&lt;ffffffff810b6e39&gt;] cpu_startup_entry+0x399/0x440
[   79.863165]  [&lt;ffffffff816c9ddb&gt;] rest_init+0xbb/0xd0

The offending commit is clearly confused as it moves heavy initialization
work into IPI context.

Revert it.

Reported-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Kan Liang &lt;kan.liang@intel.com&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/intel/uncore: Fix CBOX bit wide and UBOX reg on Haswell-EP</title>
<updated>2015-06-07T13:46:50+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@intel.com</email>
</author>
<published>2015-05-26T13:10:35+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt.git/commit/?id=8cf1a3de97804b047973dd44cfacdc1930da8403'/>
<id>8cf1a3de97804b047973dd44cfacdc1930da8403</id>
<content type='text'>
CBOX counters are increased to 48b on HSX.

Correct the MSR address for HSWEP_U_MSR_PMON_CTR0 and
HSWEP_U_MSR_PMON_CTL0.

See specification in:
http://www.intel.com/content/www/us/en/processors/xeon/
xeon-e5-v3-uncore-performance-monitoring.html

Signed-off-by: Kan Liang &lt;kan.liang@intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1432645835-7918-1-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CBOX counters are increased to 48b on HSX.

Correct the MSR address for HSWEP_U_MSR_PMON_CTR0 and
HSWEP_U_MSR_PMON_CTL0.

See specification in:
http://www.intel.com/content/www/us/en/processors/xeon/
xeon-e5-v3-uncore-performance-monitoring.html

Signed-off-by: Kan Liang &lt;kan.liang@intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1432645835-7918-1-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
