litmus-rt.git/arch/mips/mm/Makefile, branch v2.6.25 The LITMUS^RT kernel. [MIPS] Split the micro-assembler from tlbex.c. 2008-02-01T14:48:44+00:00 Thiemo Seufer ths@networkno.de 2008-01-28T20:05:38+00:00 e30ec4525d4731d828a754823a83a3d6b50bb230 This patch moves the micro-assembler in a separate implementation, as it is useful for further run-time optimizations. The only change in behaviour is cutting down printk noise at kernel startup time. Checkpatch complains about macro parameters which aren't protected by parentheses. I believe this is a flaw in checkpatch, the paste operator used in those macros won't work with parenthesised parameters. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
This patch moves the micro-assembler in a separate implementation, as
it is useful for further run-time optimizations. The only change in
behaviour is cutting down printk noise at kernel startup time.

Checkpatch complains about macro parameters which aren't protected by
parentheses. I believe this is a flaw in checkpatch, the paste operator
used in those macros won't work with parenthesised parameters.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. 2007-10-11T22:46:05+00:00 Ralf Baechle ralf@linux-mips.org 2007-10-11T22:46:05+00:00 641e97f318870921d048154af6807e46e43c307a It may not be perfect yet but the SB1 code is badly borken and has horrible performance issues. Downside: This seriously breaks support for pass 1 parts of the BCM1250 where indexed cacheops don't work quite reliable but I seem to be the last one on the planet with a pass 1 part anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
It may not be perfect yet but the SB1 code is badly borken and has
horrible performance issues.

Downside: This seriously breaks support for pass 1 parts of the BCM1250
where indexed cacheops don't work quite reliable but I seem to be the
last one on the planet with a pass 1 part anyway.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Use -Werror on subdirectories which build cleanly. 2007-07-31T20:35:33+00:00 Ralf Baechle ralf@linux-mips.org 2007-07-30T10:48:58+00:00 dde96ca8b398637e2b4442e312723f66fa6a8186 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 2007-07-10T16:33:02+00:00 Fuxin Zhang zhangfx@lemote.com 2007-06-06T06:52:43+00:00 2a21c7300b53b744d16903256a172d9cbcfdd03e Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Kill redundant EXTRA_AFLAGS 2007-02-26T23:06:05+00:00 Atsushi Nemoto anemo@mba.ocn.ne.jp 2007-02-22T15:39:48+00:00 d2af363cfb94f1bacb3e60327bc44a97881a38c2 Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line. This is redundant while AFLAGS contains $(cflags-y) and any options only listed in CFLAGS (not in cflags-y) should be unnecessary for asm sources. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line.  This
is redundant while AFLAGS contains $(cflags-y) and any options only
listed in CFLAGS (not in cflags-y) should be unnecessary for asm
sources.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Unify dma-{coherent,noncoherent.ip27,ip32} 2007-02-13T22:40:50+00:00 Ralf Baechle ralf@linux-mips.org 2006-11-16T02:56:12+00:00 9a88cbb5227970757881b1a65be01dea61fe2584 Platforms will now have to supply a function dma_device_is_coherent which returns if a particular device participates in the coherence domain. For most platforms this function will always return 0 or 1. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Platforms will now have to supply a function dma_device_is_coherent which
returns if a particular device participates in the coherence domain.  For
most platforms this function will always return 0 or 1.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] MIPS32/MIPS64 secondary cache management 2006-06-29T20:10:52+00:00 Chris Dearman chris@mips.com 2006-06-20T16:15:20+00:00 9318c51acd9689505850152cc98277a6d6f2d752 Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Kill tlb-andes.c. 2006-03-21T13:27:47+00:00 Thiemo Seufer ths@networkno.de 2006-03-14T14:35:27+00:00 c6281edb1d5e307f056fff0e174f60fa6133adc5 Basically identical to c-r4k.c, so maintaining one is really enough. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Basically identical to c-r4k.c, so maintaining one is really enough.
    
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Fixup a few lose ends in explicit support for MIPS R1/R2. 2005-10-29T18:32:37+00:00 Ralf Baechle ralf@linux-mips.org 2005-10-07T15:58:15+00:00 ec917c2c1ab4359a1d438e62daeb50cc42e632e1 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Use R4000 TLB routines for SB1 also. 2005-10-29T18:32:31+00:00 Ralf Baechle ralf@linux-mips.org 2005-10-01T10:14:17+00:00 f5cfa980e535e1f77038f8037422594592208695 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>