litmus-rt.git/arch/mips/kernel/Makefile, branch master

MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6

2015-02-17T15:37:37+00:00

MIPS R6 removed quite a few R2 instructions. However, there
is plenty of 
Signed-off-by: Markos Chandras

MIPS: asm: spram: Add new symbol for MIPS scratch pad storage

2015-02-17T15:37:20+00:00

MIPS R6, just like MIPS R2, have scratch pad storage, so add a new
symbol which is selected by MIPS R2 and R6.

Link: http://www.linux-mips.org/archives/linux-mips/2015-01/msg00389.html
Cc: Maciej W. Rozycki 
Signed-off-by: Markos Chandras

clocksource: mips-gic: Combine with GIC clockevent driver

2014-11-24T06:45:15+00:00

Combine the GIC clocksource driver with the GIC clockevent driver from
arch/mips/kernel/cevt-gic.c and remove the clockevent driver's separate
Kconfig symbol.

Signed-off-by: Andrew Bresticker 
Cc: Daniel Lezcano 
Cc: Thomas Gleixner 
Cc: Jason Cooper 
Cc: Andrew Bresticker 
Cc: Paul Burton 
Cc: Qais Yousef 
Cc: John Crispin 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8132/
Signed-off-by: Ralf Baechle

MIPS: Move GIC clocksource driver to drivers/clocksource/

2014-11-24T06:45:14+00:00

Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c.

Signed-off-by: Andrew Bresticker 
Cc: Daniel Lezcano 
Cc: Thomas Gleixner 
Cc: Jason Cooper 
Cc: Paul Burton 
Cc: Qais Yousef 
Cc: John Crispin 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8133/
Signed-off-by: Ralf Baechle

MIPS: ELF: Set FP mode according to .MIPS.abiflags

2014-11-24T06:45:07+00:00

This patch reads the .MIPS.abiflags section when it is present, and sets
the FP mode of the task accordingly. Any loaded ELF files which do not
contain a .MIPS.abiflags section will continue to observe the previous
behaviour, that is FR=1 if EF_MIPS_FP64 is set else FR=0.

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Cc: Alexander Viro 
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7681/
Signed-off-by: Ralf Baechle

MIPS: Move GIC to drivers/irqchip/

2014-11-24T06:44:54+00:00

Move GIC irqchip support to drivers/irqchip/ and rename the Kconfig
option from IRQ_GIC to MIPS_GIC to avoid confusion with the ARM GIC.

Signed-off-by: Andrew Bresticker 
Acked-by: Jason Cooper 
Reviewed-by: Qais Yousef 
Tested-by: Qais Yousef 
Cc: Thomas Gleixner 
Cc: Jeffrey Deans 
Cc: Markos Chandras 
Cc: Paul Burton 
Cc: Jonas Gorski 
Cc: John Crispin 
Cc: David Daney 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7812/
Signed-off-by: Ralf Baechle

MIPS: OCTEON: Enable use of FPU

2014-05-30T19:01:09+00:00

Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.

Add r4k_fpu.o to handle low level FPU initialization.

Modify octeon_switch.S to save the FPU registers.  And include
r4k_switch.S to pick up more FPU support.

Get rid of "#define cpu_has_fpu		0"

Signed-off-by: David Daney 
Signed-off-by: Andreas Herrmann 
Cc: linux-mips@linux-mips.org
Cc: James Hogan 
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7006/
Signed-off-by: Ralf Baechle

Merge branch 'wip-mips-pm' of https://github.com/paulburton/linux into mips-for-linux-next

2014-05-29T13:08:23+00:00

MIPS: pm-cps: add PM state entry code for CPS systems

2014-05-28T15:20:31+00:00

This patch adds code to generate entry & exit code for various low power
states available on systems based around the MIPS Coherent Processing
System architecture (ie. those with a Coherence Manager, Global
Interrupt Controller & for >=CM2 a Cluster Power Controller). States
supported are:

  - Non-coherent wait. This state first leaves the coherent domain and
    then executes a regular MIPS wait instruction. Power savings are
    found from the elimination of coherency interventions between the
    core and any other coherent requestors in the system.

  - Clock gated. This state leaves the coherent domain and then gates
    the clock input to the core. This removes all dynamic power from the
    core but leaves the core at the mercy of another to restart its
    clock. Register state is preserved, but the core can not service
    interrupts whilst its clock is gated.

  - Power gated. This deepest state removes all power input to the core.
    All register state is lost and the core will restart execution from
    its BEV when another core powers it back up. Because register state
    is lost this state requires cooperation with the CONFIG_MIPS_CPS SMP
    implementation in order for the core to exit the state successfully.

The code will detect which states are available on the current system
during boot & generate the entry/exit code for those states. This will
be used by cpuidle & hotplug implementations.

Signed-off-by: Paul Burton

MIPS: MT: Remove SMTC support

2014-05-23T22:07:01+00:00

Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell  is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras  patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle